With Rectifier Or Nonlinear Impedance Patents (Class 327/330)
  • Patent number: 10777238
    Abstract: A calibration circuit includes a reference resistor leg, a calibration code generation circuit, and an emphasis circuit. The reference resistor leg is coupled to an external reference resistor through a reference resistor node, and changes a voltage level of the reference resistor node based on a calibration code. The emphasis circuit accelerates a voltage level change of the reference resistor node based on the calibration code.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: September 15, 2020
    Assignee: SK hynix Inc.
    Inventor: Jung Il Ahn
  • Patent number: 10734974
    Abstract: A circuit includes a transmitter circuit which includes a single-to-complementary circuit, a driver stage, and a pre-emphasis control circuit. The single-to-complementary circuit generates complementary output signals from a single ended input signal. The driver stage includes inputs to receive the complementary output signals, the driver stage includes a main driver circuit and a pre-emphasis driver circuit, and the pre-emphasis driver circuit is active during transitions of the complementary output signals to provide additional current for the driver stage. The pre-emphasis control circuit includes an RC pulse generation circuit in which the RC pulse generation circuit includes a capacitance and a resistance, and the RC pulse generation circuit provides, based on edges of a signal, pulses having a duration based on an RC time constant of the capacitance and resistance. The pre-emphasis driver circuit is active to provide additional current for the driver stage in response to the pulses.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: August 4, 2020
    Assignee: NXP USA, Inc.
    Inventors: Srikanth Jagannathan, Kumar Abhishek
  • Patent number: 10700510
    Abstract: A wireless power transfer system is disclosed. The wireless power transfer system includes a first converting unit configured to convert a first DC voltage of an input power to an AC voltage. Further, the wireless power transfer system includes a contactless power transfer unit configured to transmit the input power having the AC voltage. Also, the wireless power transfer system includes a second converting unit configured to convert the AC voltage to a second DC voltage and transmit the input power having the second DC voltage to an electric load. Additionally, the wireless power transfer system includes a switching unit configured to decouple the electric load from the contactless power transfer unit if the second DC voltage across the electric load is greater than a first threshold value.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: June 30, 2020
    Assignee: General Electric Company
    Inventors: Kapil Jha, Arvind Kumar Tiwari, Yash Veer Singh, Olive Ray
  • Patent number: 10651763
    Abstract: A radio-frequency/direct-current (RF/DC) converter is operable to receive a high-frequency and high-power RF signal and convert to a DC power. The RF/DC converter includes a first field-effect transistor (FET), a second FET, a third FET and a sixth FET that are cross-coupled. Sources of the first FET and the second FET are connected to an RF signal receiving end. Sources of the third FET and the fourth FET are connected to a potential reference end. The RF/DC converter further includes a fifth FET and a sixth FET connected subsequently to the first FET, the second FET, the third FET and the fourth.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: May 12, 2020
    Assignee: National Chi Nan University
    Inventors: Yo-Sheng Lin, Chi-Hung Yeh
  • Patent number: 9960760
    Abstract: A power stage to generate an output voltage at one of a high reference voltage, an intermediate reference voltage and a low reference voltage, including a first switch stage connecting the output terminal to the high reference voltage, comprising a pair of transistors connected in series along their source-to-drain paths, a first transistor coupled to the output terminal and having its gate biased at the intermediate voltage, a second transistor having a gate that receives a first stage control signal that varies between the high reference voltage and the intermediate reference voltage, a second switch stage connecting the output terminal to the intermediate reference voltage, having a gate that receives a second stage control signal that varies among the high reference voltage, intermediate reference voltage and low reference voltage, a third switch stage connecting the output terminal to the low reference voltage, having a pair of transistors connected in series along their source-to-drain paths, a first tr
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: May 1, 2018
    Assignee: Analog Devices Global
    Inventor: Dan Li
  • Patent number: 9876497
    Abstract: An active diode having an improved transistor turn-off control method is disclosed. The active diode comprises: a comparator for comparing voltages of both ends of a parasitic diode of a transistor; and a gate driver for controlling a gate terminal of the transistor according to the comparison result of the comparator, and estimates a turn-on time of the transistor and uses the same to control the gate terminal of the transistor.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: January 23, 2018
    Assignee: MAPS, Inc.
    Inventors: Jong-Tae Hwang, Hyun-Ick Shin, Sang-O Jeon, Joon Rhee
  • Patent number: 9776013
    Abstract: A system for analyzing the energy delivered to ECG device from the defibrillator is disclosed. The system includes an energy analyzing unit configured to measure the energy delivered to the ECG device from the defibrillator, wherein the energy gets diverted to the ECG device during operation of the defibrillator; and a presentation unit capable of presenting the measured energy in the ECG device.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: October 3, 2017
    Assignee: General Electric Company
    Inventor: Manjunatha Kn
  • Patent number: 9704741
    Abstract: Methods, algorithm and signal processing means utilizing an explosively formed Harbinger (H) wave to forecast an imminent shock wave and in conjunction with the this trailing Main (M) shock wave determination of H wave velocity and M shock wave velocities, overpressure, dynamic pressure, and density and further the M shock wave epicenter location co-ordinates. These parameter determinations are based on the discovery of a Harbinger wave launched upon formation of the M shock wave which annunciates the incoming M shock wave before its arrival. These variables are further used to devise methods and systems to simultaneously detonate an array of munitions, deploy just in time personnel and/or equipment protection, determine the wave epicenter for identifying enemy combatants and terrorist positions, alert response teams to a deleterious event and its magnitude, signal the location of these deleterious events and determine if a munition has functioned.
    Type: Grant
    Filed: September 6, 2015
    Date of Patent: July 11, 2017
    Inventor: Ronald Gene Lundgren
  • Patent number: 9483039
    Abstract: A wireless field device for use in an industrial process includes input/output terminals configured to couple to a process interface element. A discrete input/output channel is configured to receive a discrete input from the process interface element through the input/output terminals when configured as a discrete input channel. The discrete input/output channel is further configured to provide a discrete output to the process interface element through the input/output terminals when the discrete input/output channel is configured as discrete output channel. Wireless communication circuitry is configured to transmit and receive information.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: November 1, 2016
    Assignee: Rosemount Inc.
    Inventors: James Johnson, Richard Nelson, Robert Michael Weinberger
  • Patent number: 9464948
    Abstract: In one aspect, wireless strain gauges are described herein. In some embodiments, a wireless strain gauge comprises a radio frequency identification (RFID) tag and a nano-composite backplane coupled to the RFID tag, wherein the resonant frequency of the RFID tag antenna demonstrates an exponential dependence or substantially exponential dependence on the strain sensed by the strain gauge.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: October 11, 2016
    Assignee: WAKE FOREST UNIVERSITY
    Inventors: David Loren Carroll, Tadhg O'Gara, Thomas Smith
  • Patent number: 9373381
    Abstract: A semiconductor apparatus includes a first memory, a second memory, and a shared reference resistor. The first memory is electrically coupled to the shared reference resistor, and the second memory is also electrically coupled to the shared reference resistor. Each of the first and second memories performs a basic calibration operation thereof by selectively using the shared reference resistor in response to a clock signal, and a mirror function signal, which has different logic levels according to which memory between the first and second memories performs calibration operations.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: June 21, 2016
    Assignee: SK hynix Inc.
    Inventor: Hyun Woo Lee
  • Patent number: 8975941
    Abstract: A signal processing circuit includes an input inverter and an output inverter. Each inverter has a signal input for receiving an input rectangular signal, a signal output for providing an inverted output rectangular signal, and a pair of voltage outputs for developing a rectified dc output voltage. A first circuit input terminal is connected to the output of the input inverter and the input of the output inverter. A second circuit input terminal is connected to the input of the input inverter and the output of the output inverter, wherein the signal input terminals receive an input signal having a data component. A pair of supply voltage output terminals is connected to the voltage output terminals of the inverters for providing a rectified dc supply voltage output.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: March 10, 2015
    Assignee: MED-EL Elektromedizinische Geraete GmbH
    Inventor: Clemens M. Zierhofer
  • Patent number: 8922148
    Abstract: A motor includes a rotor, a sensor unit, an offset unit, a rectification unit and a modulating unit. The sensor unit outputs a first signal in accordance with a magnetic field variation of the rotor. The offset unit is coupled to the sensor unit, and outputs a second signal in accordance with the first signal. The rectification unit is coupled to the offset unit, and outputs a third signal in accordance with the second signal. The modulating unit is coupled to the rectification unit, and outputs a control signal in accordance with a result by comparing the third signal with a periodic signal. The modulating unit controls a reverse rotation of the rotor smoothly in accordance with the control signal. A control method of the motor is also disclosed.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: December 30, 2014
    Assignee: Delta Electronics, Inc.
    Inventors: Yu-Liang Lin, Kun-Fu Chuang, Cheng-Chieh Liu
  • Patent number: 8854103
    Abstract: A clamping circuit includes a clamping element with a control terminal and a load path that is coupled between a first circuit node and a second circuit node. A control circuit is coupled between the first circuit node and the second circuit node and is also coupled to the control terminal of the clamping element. The control circuit includes at least one snap-back unit with two load terminals and is only coupled between the first circuit node and the control terminal of the clamping element. The snap-back unit has an electrical resistance between the two load terminals and is configured to reduce the electrical resistance when a voltage between the two load terminals reaches a given threshold value.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: October 7, 2014
    Assignee: Infineon Technologies AG
    Inventor: Joost Willemen
  • Patent number: 8854112
    Abstract: According to an embodiment, an FET drive circuit includes an FET, a first circuit, a resistor and a third rectifying device. The first circuit includes a first rectifying device, a second rectifying device and a capacitive element sequentially provided in series from a drain to a gate of the FET, the first rectifying device allowing a forward electric current flowing from the drain to the gate, and the second rectifying device having a predetermined breakdown voltage with respect to the electric current from the drain to the gate. The resistor is provided between a power source and a connecting point of the second rectifying device and the capacitive element; and the third rectifying device provided between a source and a gate of the FET.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: October 7, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kentaro Ikeda
  • Patent number: 8836405
    Abstract: A system for synchronizing a first clock and a second clock includes a receiver associated with the first clock, configured to receive a remote pulse from the second clock. The remote pulse has a pulse repetition frequency and spectral characteristics that are known to the local clock. The system also includes a local pulse emitter configured to create a local pulse at the first clock, and optics configured to align the local pulse and the remote pulse. The system further includes an interferometer configured to create an interference pattern between the local pulse and the remote pulse. A controller is provided that is configured to calculate a time delay between the first clock and the second clock based on the interference pattern between the local pulse and the remote pulse.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: September 16, 2014
    Assignee: Raytheon Company
    Inventors: Steven R. Wilkinson, Neil R. Nelson
  • Patent number: 8619442
    Abstract: A power factor correction circuit responsive to an input power supply signal at an input supply voltage is described. The circuit includes rectifier circuitry for largely performing full-wave rectification on the input supply signal to produce a full-wave rectified supply signal at a full-wave rectified voltage and a full-wave rectified current susceptible of having at least one overtone of the fundamental supply frequency. The circuit also includes a regulator for regulating the full-wave rectified voltage to produce a regulated power supply voltage with reduced voltage ripple, the regulator operating in buck-boost mode, and control circuitry for measuring at least one such overtone in the full-wave rectified current. The control circuitry also provides the regulator with a primary control signal that causes at least one such overtone to be largely removed from the full-wave rectified current.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: December 31, 2013
    Inventor: Robert S. Wrathall
  • Patent number: 8526487
    Abstract: Embodiments of the invention are generally directed to a high-speed differential energy difference integrator (EDI) for adaptive equalizers. In an embodiment, the EDI includes two differential full-wave rectifiers providing differential outputs that are cross-coupled to the inputs of an integration capacitor. In one embodiment, the active areas of the transistors of the differential full-wave rectifiers are substantially the same.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: September 3, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventor: Dusan Vecera
  • Patent number: 8493123
    Abstract: A system for synchronizing a first clock and a second clock includes a receiver associated with the first clock, configured to receive a remote pulse from the second clock. The remote pulse has a pulse repetition frequency and spectral characteristics that are known to the local clock. The system also includes a local pulse emitter configured to create a local pulse at the first clock, and optics configured to align the local pulse and the remote pulse. The system further includes an interferometer configured to create an interference pattern between the local pulse and the remote pulse. A controller is provided that is configured to calculate a time delay between the first clock and the second clock based on the interference pattern between the local pulse and the remote pulse.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: July 23, 2013
    Assignee: Raytheon Company
    Inventors: Steven R. Wilkinson, Neil R. Nelson
  • Patent number: 8476955
    Abstract: A signal processing circuit is provided that includes a CMOS bridge rectifier circuit having a first input terminal and a second input terminal for receiving a rectangular wave form that includes a data sequence. A first output terminal and a second output terminal provides a rectified dc output voltage. A first data output terminal is connected to one of the first and the second input terminals, and a second data output terminal is connected to one of the first and the second output terminals, wherein the data output terminals provide an output signal representative of the data sequence. A substantially resistive load may be operatively coupled between the first and second voltage output terminals, the resistive load without a discrete parallel capacitor.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: July 2, 2013
    Assignee: Med-El Elektromedizinische Geraete GmbH
    Inventor: Clemens M. Zierhofer
  • Patent number: 8416220
    Abstract: A rectifier circuit configured with a conventional configuration using an operational amplifier and a diode by a thin film transistor over an insulating substrate cannot exhibit the performance of a rectifier circuit due to the low stability of operational amplifier and the low high-frequency characteristic. Therefore, the rectifier circuit requires to be configured by using an IC outside of the insulating substrate in order to rectify a high-frequency signal. According to the invention, an amplifier circuit and a waveform shaping circuit are configured with a thin film transistor and a non-rectified signal is switched by a signal thereof, so that a rectifier circuit with the excellent high-frequency characteristic can be realized.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: April 9, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Takeshi Osada, Takanori Matsuzaki
  • Patent number: 8354871
    Abstract: Embodiments of the invention relate to an input-powered comparator. Embodiments of the invention also pertain to an active diode that includes an input-powered comparator and a switch. In a specific embodiment, the input-powered comparator only consumes power when an input source provides sufficiently high voltage. Embodiments of the active diode can be used in an energy harvesting system. The comparator can be powered by the input and the system can be configured such that the comparator only consumes power when the input is ready to provide power to the load or energy storage element. In a specific embodiment, when there is no input, or the input is too low for harvesting, the comparator does not draw any power from the energy storage element (e.g., battery or capacitor) of the system.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: January 15, 2013
    Assignee: University of Florida Research Foundation, Inc.
    Inventor: Yuan Rao
  • Patent number: 8300683
    Abstract: Embodiments of the invention are generally directed to a high-speed differential energy difference integrator (EDI) for adaptive equalizers. In an embodiment, the EDI includes two differential full-wave rectifiers providing differential outputs that are cross-coupled to the inputs of an integration capacitor. In one embodiment, the active areas of the transistors of the differential full-wave rectifiers are substantially the same.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: October 30, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventor: Dusan Vecera
  • Publication number: 20120242391
    Abstract: A voltage-limiting circuit, including a series branch circuit having a plurality of power switching devices, a plurality of energy temporary-storage circuits, and a centralized voltage-limiting circuit for limiting voltage for the series branch circuit. Each power switching device includes a control terminal, a high-end, and a low-end, and is connected in parallel with one energy temporary-storage circuit. The energy temporary-storage circuits include clamping diodes, energy storage capacitors, static voltage-sharing resistors, and energy return ends. In each energy temporary-storage circuit, the energy storage capacitors are connected in parallel with the static voltage-sharing resistors to form the energy return ends, and then connected in series with the clamping diodes. The centralized voltage-limiting circuit includes a voltage-limiting functional circuit and a plurality of energy concentration diodes for concentrating the energy temporarily stored by the corresponding energy temporary-storage circuits.
    Type: Application
    Filed: June 5, 2012
    Publication date: September 27, 2012
    Inventor: Jiashuan FAN
  • Patent number: 8248141
    Abstract: A signal processing circuit includes an input inverter and an output inverter. Each inverter has a signal input for receiving an input rectangular signal, a signal output for providing an inverted output rectangular signal, and a pair of voltage outputs for developing a rectified dc output voltage. A first circuit input terminal is connected to the output of the input inverter and the input of the output inverter. A second circuit input terminal is connected to the input of the input inverter and the output of the output inverter, wherein the signal input terminals receive an input signal having a data component. A pair of supply voltage output terminals is connected to the voltage output terminals of the inverters for providing a rectified dc supply voltage output.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: August 21, 2012
    Assignee: Med-El Elekromedizinische Geraete GmbH
    Inventor: Clemens M. Zierhofer
  • Patent number: 8232829
    Abstract: In accordance with the present invention, the active rectifier is a circuit which directly takes the place of a passive rectifier by using a switching module (or simply a device in cases where a single device is used) controlled by a sensing circuit. Where passive devices have a single knee value determined by the physical properties of the semi-conductive material being used, the active circuit can be designed to a range of knee voltages and other performance criterion. Additional flexibility is available to the designer through the active rectifiers ability to allow for manipulation of the curve of response from the circuit in the knee region. Flexibility both in production, in designs, and in characteristics make the active rectifier highly valuable for engineering firms designing larger electronic circuits.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: July 31, 2012
    Inventor: Andrew Frederick Robinson, III
  • Patent number: 8232830
    Abstract: A highly efficient rectifier can readily replace a two-terminal diode. Its conduction losses are reduced from that of the two-terminal diode. Connected between the source and drain of a MOSFET including a parasitic diode are a micro-power converter section for boosting a conduction voltage Vds between the source and drain to a predetermined voltage, and a self-drive control section that operates based on a voltage output from the micro-power converter section. When the source and drain are conductive with each other, the micro-power converter section generates, from the conduction voltage Vds, a power source voltage for the self-drive control section, and the self-drive control section (4) continues drive control of the MOSFET.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: July 31, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Miyuki Takeshita, Akihiko Iwata, Ikuro Suga, Shigeki Harada, Kenichi Kawabata, Takashi Kumagai, Kenji Fujiwara
  • Patent number: 8018744
    Abstract: A power factor correction circuit (42/44) responsive to an input power supply signal at an input supply voltage (VAC) that varies largely sinusoidally with time at a fundamental supply frequency contains regulator/control circuitry (60, 62, and 64) for measuring and removing overtones (ILDm or IFWRm) in the input supply current (ILD) or in a rectified form (IFWR) of the input supply current. Each overtone is expressible as the product of an amplitude component (Im) and a sinusoidal function (Im sin [(m+1)?ACt]) that varies with time at an integer multiple of the fundamental supply frequency. The regulator/control circuitry measures an overtone by determining the overtone's amplitude component. After generating an adjustment factor (SADJ) largely as the product of that overtone's amplitude component and an associated sinusoidal function, the regulator/control circuitry adjusts the input supply current or its rectified form by an amount corresponding to the adjustment factor for each measured overtone.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: September 13, 2011
    Inventor: Robert S. Wrathall
  • Patent number: 7816968
    Abstract: A signal-processing circuit has a first and a second input, which receive a first and a second differential signal, a third input, which receives a common-mode signal, the first and second differential signals having an equal and substantially opposite trend with respect to the common-mode signal, and a first output supplying a first processed signal, equivalent to the first differential signal rectified with respect to the common-mode signal, and satisfying throughout its course a first relation of comparison with the common-mode signal. The processing circuit is provided with first formation means for formation of the first processed signal, which operate on the basis of the first differential signal, and second formation means for formation of the first processed signal, which operate on the basis of the second differential signal; the first and second formation means co-operate in the formation of the first processed signal.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: October 19, 2010
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Danioni, Paolo Invernizzi
  • Patent number: 7719862
    Abstract: A power factor correction circuit (42/44) responsive to an input power supply signal at an input supply voltage (VAC) that varies largely sinusoidally with time at a fundamental supply frequency contains regulator/control circuitry (60, 62, and 64) for measuring and removing overtones (ILDm or IFWRm) in the input supply current (ILD) or in a rectified form (IFWR) of the input supply current. Each overtone is expressible as the product of an amplitude component (Im) and a sinusoidal function (Im sin [(m+1)?ACt]) that varies with time at an integer multiple of the fundamental supply frequency. The regulator/control circuitry measures an overtone by determining the overtone's amplitude component. After generating an adjustment factor (SADJ) largely as the product of that overtone's amplitude component and an associated sinusoidal function, the regulator/control circuitry adjusts the input supply current or its rectified form by an amount corresponding to the adjustment factor for each measured overtone.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: May 18, 2010
    Inventor: Robert S. Wrathall
  • Patent number: 7692469
    Abstract: In one embodiment, a voltage sense circuit receives an ac input signal and forms a rectified output voltage that is representative of the ac input signal.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: April 6, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Petr Kadanka
  • Patent number: 7650119
    Abstract: A wireless communication device is disclosed wherein the voltage swing of a local oscillator (LO) signal is controlled to prevent overstressing semiconductor devices in a mixer to which the LO signal is supplied. A quadrature divider supplies the LO signal to the mixer. Digital calibration methodology controls the current that the quadrature divider draws from a power supply to set the voltage swing of the LO signal that the quadrature divider generates.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: January 19, 2010
    Assignee: Silicon Laboratories Inc.
    Inventors: Aslam A. Rafi, Donald A. Kerth
  • Patent number: 7639051
    Abstract: In the case of a measuring device having a sensor supplied from an oscillator for a non-electrical variable and having a circuit arrangement downstream of the sensor for rectifying the output voltage of the sensor, interference pulses, which are superimposed on the output voltage of the movement sensor and are rectified when the output voltage of the movement sensor is rectified, falsify the measurement result. This is particularly true for spiked interference pulses having a high amplitude. In order to reduce such falsifications of the measurement result, the output voltage of the sensor is supplied to a ramp-generating circuit arrangement, in which the mathematical sign of the transmission behavior can be controlled. The mathematical sign of the transmission behavior of the ramp-generating circuit arrangement is controlled by a switching signal, whose flanks correspond to the zero crossings of the output voltage of the sensor.
    Type: Grant
    Filed: March 8, 2003
    Date of Patent: December 29, 2009
    Assignee: Bosch Rexroth AG
    Inventor: Karlheinz Panzer
  • Publication number: 20090278585
    Abstract: An attenuation system includes an attenuator, a control unit, a comparator, two couplers, and two convert circuits, wherein a signal is attenuated by the attenuator via the first coupler and sent to a functional unit. The signal is output to the first convert circuit via the first coupler to be converted to a first digital signal. The first digital signal is output to a first input end of the comparator. The damped signal is output to the second convert circuit via the second coupler to be converted to a second digital signal. The second digital signal is output to a second input end of the comparator. The comparator compares the first digital signal and the second digital signal, and transmits a factual decrement to the control unit. The control unit compares the factual decrement and the preset decrement, and accordingly adjusts the parameter of the attenuator.
    Type: Application
    Filed: August 12, 2008
    Publication date: November 12, 2009
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD ., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: SONG LI
  • Patent number: 7586081
    Abstract: A photo detector IC (PDIC) is connected with a flexible printed circuit board (FPC). A signal converted into a voltage through light-to-voltage conversion in the PDIC is connected with the drain of a field effect transistor (FET), while the source of the FET is connected to an output terminal. A signal from the output terminal is input into a signal processing board of the main body via the FPC serving as an equivalent circuit composed of a coil and a capacitor. The gate of the FET is connected with a variable voltage source. Peaking occurs due to inductor components and capacitance components of the FPC. However, by application of voltage to the variable voltage source, the gate voltage value of the FET is adjusted to be an optimal value, whereby the peaking is suppressed by the on-resistance of the FET.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: September 8, 2009
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Yamaguchi, Masaki Taniguchi
  • Publication number: 20090015312
    Abstract: A calibration circuit includes: a replica buffer that drives a calibration terminal; a pre-emphasis circuit connected in parallel to the replica buffer; and an up-down counter that changes impedances of the replica buffer and the pre-emphasis circuit. A replica control circuit causes the replica buffer to conduct based on an impedance code, and a pre-emphasis control circuit causes the pre-emphasis circuit to conduct in an initial stage of a conducting period of the replica buffer. Thereby, even when an external resistor is shared among a plurality of semiconductor devices, for example, a voltage appearing in the calibration terminal can be stabilized at a higher speed.
    Type: Application
    Filed: July 9, 2008
    Publication date: January 15, 2009
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Shunji Kuwahara, Hiroki Fujisawa
  • Publication number: 20090014765
    Abstract: A high voltage operating field effect transistor has a source region and a drain region spaced apart from each other in a surface of a substrate. The source region is operative to receive at least one of a signal electric potential and a signal current. A semiconductor channel formation region is disposed in the surface of the substrate between the source region and the drain region. A gate region is disposed above the channel formation region and is operative to receive a bias electric potential having an absolute value equal to or larger than a first constant electric potential which changes according to an increase or decrease in a drain electric potential. A gate insulating film region is disposed between the channel formation region and the gate region.
    Type: Application
    Filed: September 12, 2008
    Publication date: January 15, 2009
    Inventors: Yutaka Hayashi, Hisashi Hasegawa, Yoshifumi Yoshida, Jun Osanai
  • Patent number: 7454182
    Abstract: A high frequency part, which amplifies a high frequency signal outputted from an intermediate frequency part and supplies to an antenna, is equipped with a gain controller with switch function. The gain controller with switch function comprises an attenuator with switch function has a function of switching a selected band between two bands outputted from the intermediate frequency part and controlling the gain of the high frequency signal in the selected band. The attenuator with switch function comprises a first variable resistor which connects a signal input part with a signal output part and a second variable resistor which is disposed parallel to said first variable resistor and connects a signal input part with a signal output part. The first and the second variable resistors are controlled by a common gain control voltage and set such that the gain control voltage ranges, which are for changing the resistor values, will not overlap with each other.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: November 18, 2008
    Assignee: Panasonic Corporation
    Inventors: Masahiko Inamori, Takashi Yamamoto, Masao Nakayama, Kaname Motoyoshi
  • Patent number: 7417485
    Abstract: Embodiments of the invention are generally directed to a high-speed differential energy difference integrator (EDI) for adaptive equalizers. In an embodiment, the EDI includes two differential full-wave rectifiers providing differential outputs that are cross-coupled to the inputs of an integration capacitor. In one embodiment, the active areas of the transistors of the differential full-wave rectifiers are substantially the same.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: August 26, 2008
    Assignee: Cypress Semiconductor Corporation
    Inventor: Dusan Vecera
  • Patent number: 7408395
    Abstract: Fast settling circuits and methods designed to align input signal amplitude level and to remove DC offset voltages with minimal loss of low frequency signal in receiving analog circuits are disclosed. With the key innovative circuits and methods for signal peak alignment, the disclosed circuits and methods achieve fast settling without significant attenuation of the input signal. Peak aligning circuits and methods can be implemented along with conventional RC AC coupling circuits. In applying the aligning circuits and methods to differential signal pair, DC offsets can be easily removed.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: August 5, 2008
    Assignee: Hyperband Communication, Inc.
    Inventors: Kanyu Cao, Yiping Fan, Hongyu Li, Chieh-Yuan Chao
  • Patent number: 7365302
    Abstract: A photo detector IC (PDIC) is connected with a flexible printed circuit board (FPC). A signal converted into a voltage through light-to-voltage conversion in the PDIC is connected with the drain of a field effect transistor (FET), while the source of the FET is connected to an output terminal. A signal from the output terminal is input into a signal processing board of the main body via the FPC serving as an equivalent circuit composed of a coil and a capacitor. The gate of the FET is connected with a variable voltage source. Peaking occurs due to inductor components and capacitance components of the FPC. However, by application of voltage to the variable voltage source, the gate voltage value of the FET is adjusted to be an optimal value, whereby the peaking is suppressed by the on-resistance of the FET.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: April 29, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Yamaguchi, Masaki Taniguchi
  • Patent number: 7282980
    Abstract: A precision voltage rectifier comprises a source voltage input and a voltage reference. The rectifier comprises switching elements that, according to the sign of the source signal, change the connections to the inputs of a differential difference amplifier that is connected as a voltage inverter. Embodiments of the invention are fully-integrated and CMOS compatible with high-input impedance such that the invention can be operated in low-power situations. A preferred application involves the integration of several similar circuits in a high-density, low-power implantable medical device. Particular embodiments of the invention can be used to rectify nerve signals collected by electrodes for use in a system for manipulating a prosthetic device.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: October 16, 2007
    Assignee: Neurostream Technologies, Inc.
    Inventor: Marcelo Baru
  • Patent number: 7245895
    Abstract: A high frequency part, which amplifies a high frequency signal outputted from an intermediate frequency part and supplies to an antenna, is equipped with a gain controller with switch function. The gain controller with switch function comprises an attenuator with switch function has a function of switching a selected band between two bands outputted from the intermediate frequency part and controlling the gain of the high frequency signal in the selected band. The attenuator with switch function comprises a first variable resistor which connects a signal input part with a signal output part and a second variable resistor which is disposed parallel to said first variable resistor and connects a signal input part with a signal output part. The first and the second variable resistors are controlled by a common gain control voltage and set such that the gain control voltage ranges, which are for changing the resistor values, will not overlap with each other.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: July 17, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiko Inamori, Takashi Yamamoto, Masao Nakayama, Kaname Motoyoshi
  • Patent number: 7199637
    Abstract: A rectifier circuit is provided, which does not need a feedback function and prevents deterioration of a frequency characteristic, even if the rectifier circuit is configured with thin film transistors (TFTs). For example, the rectifier circuit is configured with an amplifier circuit, which compares an input signal with a voltage of a power source; a waveform shaping circuit for shaping a waveform of an output signal of the amplifier circuit; a resistor, which is connected to both an input terminal and output terminal; and a switching circuit, which is connected to both the output terminal and the power source, and is controlled by an output signal of the waveform shaping circuit. Then, either the input signal or the voltage of the power source is outputted in accordance with an operation of the switching circuit, so that the input signal is ideally rectified.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: April 3, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Takeshi Osada, Takanori Matsuzaki
  • Patent number: 7109845
    Abstract: A circuit arrangement for detecting a received signal includes a rectifier with an input connected to a receiving antenna for rectifying an encoded received signal, a signal capacitor connected to an output of the rectifier, a discharge current sink connected to the signal capacitor, and a signal evaluating circuit connected to the signal capacitor. The discharge current sink includes a current mirror circuit of cascode-connected transistors. Thereby, the discharge current is substantially independent of the signal voltage over a larger range of voltages. This signal detection circuit is useful in transponders or remote sensors that receive and detect a signal transmitted by a base station.
    Type: Grant
    Filed: February 4, 2004
    Date of Patent: September 19, 2006
    Assignee: Atmel Germany GmbH
    Inventor: Martin Fischer
  • Patent number: 6924688
    Abstract: A composite rectifying charge storage device, consisting of a rectifier and capacitor which share common elements, is combined in a circuit with an antenna for remote energization in response to an external electromagnetic or electrostatic AC field. The energized composite device extracts power (voltage or current) and may be implemented in a variety of circuit configurations, such as a power supply for driving circuit components, e.g., radio frequency identification (RFID) circuitry, or for use in parameter sensing applications which may include a light emitting component, and others.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: August 2, 2005
    Assignee: Precision Dynamics Corporation
    Inventor: Michael L. Beigel
  • Patent number: 6856185
    Abstract: A full-wave rectifier, two resistors forming a voltage divider across the rectifier outputs and a capacitor in parallel with one of the resistors, provide an output across the capacitor that approximates the RMS equivalent of an input signal to the rectifier. The capacitance value may be selected to attenuate certain AC components without significantly affecting the accuracy of the RMS approximation. The shape of the input-signal-may be rectangular, trapezoidal, sinusoidal, triangular, random, constant DC, or a combination thereof, without affecting conversion accuracy. A DC voltage charge is maintained on the capacitor, which has been charged via the voltage divider, to a proportionally scaled equivalent of the RMS voltage of the input signal, through switched, non-symmetrical charge/discharge paths of the rectifier and the resistors.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: February 15, 2005
    Assignee: Arris International, Inc.
    Inventor: Henry Herbert Sully
  • Patent number: 6781432
    Abstract: A control circuit for a MOSFET used in a synchronous rectification circuit applies a gate voltage to the MOSFET during most of a period in which a current flows in a MOSFET. As a result, conduction loss is decreased, making it possible to increase device efficiency and form a device that is compact and lightweight.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: August 24, 2004
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Yukihiro Nishikawa
  • Patent number: 6765425
    Abstract: A rectifying circuit and method to produce a DC output by rectifying a sinusoidal source having a plurality of output phase voltages and a plurality of phase-to-phase voltages, the rectifying circuit including a bridge circuit coupled to the output phase voltages, the bridge circuit having a plurality of switches; and a control circuit coupled to the output phase voltages and to the bridge circuit, the control circuit being configured to control the switches in accordance with respective absolute values of the phase-to-phase voltages; wherein the output phase voltages are rectified to produce the DC output. When the sinusoidal source is inductive, switch turn-off may be timed to provide synchronous rectification related to estimates of source periodicity.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: July 20, 2004
    Assignee: International Rectifier Corporation
    Inventor: Bertrand Vaysse
  • Patent number: 6703886
    Abstract: In a circuit arrangement for rectifying a signal, in which two transconductors are controllable with opposite phase by means of the signal to be rectified, the outputs of the transconductors are connected to a first circuit point via a first diode and to a second circuit point via a second diode having an opposite polarity with respect to the first diode. The circuit points are connected to a predetermined potential. A rectified signal can be derived from at least one of the circuit points.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: March 9, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Andreas Wichern