Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.

Abstract: A high-frequency switch module includes a multi-layer substrate, and a switch circuit mounted on the multi-layer substrate. The multi-layer substrate includes a terminal through which a plurality of high-frequency signals in a plurality of frequency bands are input and output, a plurality of switch terminals, terminals to which control signals to control the switch circuit are supplied, current paths that connect the terminals to the switch circuit, and resistors that are provided on the current paths and have resistance values greater than the resistance values of the current paths. The switch circuit connects the terminal to the switch terminals corresponding to the frequency bands of high-frequency signals input and output through the terminal based on the control signals.

Abstract: A power semiconductor device includes first and second power semiconductor elements connected in parallel to each other and a drive control unit. The drive control unit turns on or off each of the first and second power semiconductor elements in response to an ON instruction and an OFF instruction repeatedly received from outside. Specifically, the drive control unit can switch between a case where the first and second power semiconductor elements are simultaneously turned on and a case where one of the first and second power semiconductor elements is turned on first and thereafter the other thereof is turned on, in response to the ON instruction. The drive control unit turns off one of the first and second power semiconductor elements first and thereafter turns off the other thereof, in response to the OFF instruction.

Abstract: An integrated gate driver circuit receives a plurality of clocks and includes a plurality of driving units cascaded in series. Each driving unit is for driving a load and includes an input terminal, an output terminal, a first switch and a second switch. The first switch has a first terminal coupled to the input terminal, a second terminal coupled to a first node, and a control terminal receiving a first clock, and the first switch is turned on when the first clock is at high level. The second switch has a first terminal receiving a second clock, a second terminal coupled to the output terminal, and a control terminal coupled to the first node, wherein the second clock charges and discharges the load through the second switch when the first node is at high level; wherein the output terminal of each driving unit is coupled to the input terminal of the immediately succeeding driving unit.

Abstract: An analog switch configuration includes a gate control circuit coupled between an input of a switch and a gate of the switch. The gate control circuit passes voltage changes on the input of the switch to the gate of the switch to decrease the influence the inherent gate to input capacitance has on the bandwidth of the switch. By reducing the change in voltage across the inherent capacitance, the current through the capacitance in decreased as well as its influence on the bandwidth of the configuration.

Abstract: A High Voltage switch configuration having an input terminal which receives an input signal and an output terminal which issues an output signal to a load. The High Voltage switch configuration comprises at least a first and a second diode, being placed in antiseries between said input and output terminals and having a pair of corresponding terminals in common, in correspondence of a first internal circuit node.

Abstract: In a high-frequency switch module, a switch IC is mounted on a multilayer board to define a high-frequency switch module. The multilayer board includes two internal wirings and two internal ground electrodes. The internal ground electrodes are spaced apart from each other at an interval when viewed from a lamination direction of the multilayer board. The first internal wiring is located on the upper surface side of the first internal ground electrode, and is entirely separated from an RF wiring, and the first internal wiring includes a power supply wiring for supplying power to the switch IC. The second internal wiring is located on the upper surface side of the second internal ground electrode, and is entirely separated from the power supply wiring, and the second internal wiring includes a signal wiring through which an RF signal propagates.

Abstract: The number of power-gating transistors on an integrated circuit used for power reduction in a sleep mode is controlled during a wake state to adjust the current flow and hence voltage drop across the power-gating transistors as a function of aging of these transistors and/or a function of temperature of the integrated circuit. In this way, the supply voltage to the integrated circuit may be better tailored to minimize current leakage when the integrated circuit is young or operating at low temperatures.

Abstract: According to one embodiment, a power source controller has a first power source line supplied with a reference power source voltage, a second power source line connected to an internal circuit, a control circuit configured to control a connection between the first power source line and the second power source line, a control signal line connected to the control circuit, and configured to provide a control signal for controlling the connection, a transistor comprising a first terminal, a second terminal and a control terminal in the control circuit, the control terminal of the transistor being connected to the control signal line, a semiconductor substrate on which the transistor is formed, and first through third wires.

Abstract: A high-frequency switch module includes a multi-layer substrate, and a switch circuit mounted on the multi-layer substrate. The multi-layer substrate includes a terminal through which a plurality of high-frequency signals in a plurality of frequency bands are input and output, a plurality of switch terminals, terminals to which control signals to control the switch circuit are supplied, current paths that connect the terminals to the switch circuit, and resistors that are provided on the current paths and have resistance values greater than the resistance values of the current paths. The switch circuit connects the terminal to the switch terminals corresponding to the frequency bands of high-frequency signals input and output through the terminal based on the control signals.

Abstract: According to one embodiment, a semiconductor switch includes a main element including a switching element and an antiparallel diode, and a reverse voltage application circuit. The reverse voltage application circuit includes an auxiliary electric-power supply, a high-speed free wheeling diode, an auxiliary element, and a capacitor. The high-speed free wheeling diode comprises a plurality of diodes connected in series.

Abstract: A system and method are provided for biasing transistor switches in a semiconductor based high power switch. Off-state Vgsd biasing for the off transistor switches is based upon acceptable levels of spurious harmonic emissions and linearity.

Abstract: What is provided is a receiver-on-a-chip comprising a monolithic integrated circuit that reduces the receiver to a cigarette-pack-sized assembly mountable directly at an antenna element, with a much-increased operational bandwidth and instantaneous bandwidth, increased dynamic range and with a two-order-of-magnitude decrease in size and weight. Moreover, because of the elimination of all of the I/O drivers and attendant circuitry, power consumption is reduced by two-thirds, whereas the mean time before failure is increased to 10,000 hours due to the robustness of the monolithic integrated circuit and use of fiber optics.

Abstract: Systems and methods are herein disclosed for efficiently allowing current to bypass a group of solar cells having one or more malfunctioning or shaded solar cells without overwhelming a bypass diode. This can be done using a switch (e.g., a MOSFET) connected in parallel with the bypass diode. By turning the switch on and off, a majority of the bypass current can be routed through the switch, which is configured to handle larger currents than the bypass diode is designed for, leaving only a minority of the current to pass through the bypass diode.

Abstract: A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

Abstract: Disclosed herein is a device that includes a first terminal operatively supplied with a pulse signal, a second terminal, a set of third terminals operatively supplied with identification information, a storage unit configured to store the identification information in response to the pulse signal, and a control unit configured to electrically disconnect the first terminal from the second terminal until the storage unit stores the identification information and electrically connect the first terminal to the second terminal after the storage unit has stored the identification information. This device may be used as each of semiconductor chips that are stacked with each other.

Abstract: A battery pack is provided. The battery pack includes first battery cells, a second battery cell coupled to one of the first battery cells, a voltage sensing and balancing circuit for measuring voltages of the first battery cells and for maintaining voltage balance between the first battery cells, a controller that includes an analog-to-digital (A/D) converter, and an analog switch for measuring a voltage value of the second battery cell and for transferring the measured voltage value to the A/D converter. The controller is for controlling charging and discharging of the first and second battery cells. The analog switch includes a flying capacitor, a first switch unit for transferring a voltage between the second battery cell and the flying capacitor, a second switch unit for transferring a voltage of the flying capacitor to the A/D converter, and a first diode for protecting a voltage source from a surge current.

Abstract: A power supply switch apparatus includes a main outlet, first and second load outlets, a manual switch, and first and second electronic switches. The positive terminal of the main outlet is connected to the positive terminal of the first load outlet and connected to the second terminal of the first electronic switch. The third terminal of the first electronic switch is connected to the positive terminal of the second load outlet. The first terminal of the first electronic switch is connected to the second terminal of the second electronic switch and connected to a voltage terminal through a first resistor. The third terminal of the second electronic switch is grounded. The first terminal of the second electronic switch is connected to the voltage terminal through the manual switch and a second resistor in that order, and grounded through a third resistor.

Abstract: To operate a semiconductor power switch having a control electrode and a reference electrode in response to first and second switching commands, a control voltage between a first electric pole and a second electric pole is provided. Upon each first switching command, the control electrode is coupled to the first electric pole, and the reference electrode is coupled to the second electric pole; and upon each second switching command, the control electrode is coupled to the second electric pole, and the reference electrode is coupled to the first electric pole. Upon each switching command, continuously transitioning an electric potential of the one of the control and reference electrodes during a first transition period, and continuously transitioning an electric potential of the respective other of the control and reference electrodes during a second transition period occurs, wherein the first transition period beginning before and ending after the second transition period.

Abstract: In accordance with this invention the above and other problems are solved by a switching apparatus and method that uses a switching circuit having a pair of parallel solid-state diodes (e.g., PN diodes), one of which is connected to a transistor (e.g., power MOSFET or IGBT), to switch a capacitor in or out of a variable capacitance element of an impedance matching network. Charging a body capacitance of the transistor reverse biases one of the two diodes so as to isolate the transistor from the RF signal enabling a low-cost high capacitance transistor to be used. Multiple such switching circuits and capacitors are connected in parallel to provide variable impedance for the purpose of impedance matching.

Abstract: A power gating apparatus includes an integrated circuit package with a first voltage reference plane and a second voltage reference plane, and an integrated circuit that includes a circuit block, and a switch block. The first and second voltage reference planes may be electrically isolated from one another. The switch block may include a plurality of switches arranged in a ring surrounding the circuit block. The first voltage reference plane may be electrically coupled between an external voltage reference and the plurality of switches, and the second voltage reference plane may be electrically coupled between the plurality of switches and the circuit block. The second voltage reference plane may also distribute an electric current throughout the circuit block. In addition, each of the switches is configured to interrupt an electrical path between the first reference voltage plane and the circuit block in response to a control signal.

Abstract: Disclosed are method and apparatus for implementing power distribution unit with a hybrid switching module. The apparatus comprises multiple outlets coupled to a hybrid switching module that switches on or off the plurality of outlets. The apparatus further comprises a single SSR for the hybrid switching module and two EMRs for an outlet and a controller that communicates with the hybrid switching module via digital line(s) to control power distribution. The apparatus comprises a display for displaying information related to the power outlets, two current detection circuitries for monitoring the total input current and an individual outlet, and a voltage detection circuitry for sensing voltages. The number of outlets may be scaled by using one or more hybrid switching module that share the single SSR. The apparatus further comprises an Internet server running thereon to interface with remote users to process the user's requests for the apparatus.

Abstract: According to one embodiment, a semiconductor switch includes a power supply circuit, a control circuit and a switch circuit. The power supply circuit includes an internal potential generator connected to a power supply, and a first transistor connected between an input and an output of the internal potential generator. The internal potential generator generates a first potential higher than an input potential. The first transistor is turned on when the first potential becomes lower than the input potential and has a threshold voltage being set so as to keep the first potential not lower than the input potential. The control circuit is configured to receive the first potential to output a high-level or low-level control signal. The switch circuit is configured to receive an input of the control signal to switch connection between terminals.

Abstract: A power gate circuit includes: a power gate switch connected at least between a reference potential terminal of a circuit to be power-gated and a reference potential or between a power supply terminal of the circuit to be power-gated and a power supply; a capacity connected to a gate of the power gate switch; a pulse generating section supplying a pulse signal to the gate of the power gate switch according to a control signal; and a power gate control section outputting the control signal to the pulse generating section to supply the pulse signal to the gate of the power gate switch when the power gate switch is turned on and accumulating electrical charges in the capacity to control a gate potential of the power gate switch such that the potential gradually approaches a potential at which the power gate switch is turned on.

Abstract: A chip includes an RF switch arrangement that has a plurality of RF switches arranged jointly on the chip. Each of the RF switches has at least one first RF connection accessible from outside the chip and one second RF connection accessible from outside the chip. Furthermore, each of the RF switches is designed to activate, in response to a driving, at least one RF path between two of its RF connections. The RF connections of different switches from among the RF switches are separated from one another in terms of radio frequency.

Abstract: There is provided an electric circuit including a semiconductor switch that is inserted in a positive side power line; and converting means for converting an input voltage input to an input side terminal to a predetermined output voltage and for outputting the output voltage from an output side terminal, wherein the output side negative terminal of the converting means is connected to the positive side power line, and the output side positive terminal of the converting means is connected to a terminal that controls an opening and closing of the semiconductor switch.

Abstract: According to one embodiment, a high-frequency switch includes a high-frequency switch IC chip. The high-frequency switch IC chip has a high-frequency switching circuit section including an input terminal, a plurality of switching elements, a plurality of high-frequency signal lines, and a plurality of output terminals. The input terminal is connected to each of the plurality of output terminals via each of the plurality of switching elements with the high-frequency signal lines having the same lengths. The plurality of output terminals are arranged on a surface at an outer periphery of the high-frequency switch IC chip. The input terminal is arranged on the surface of the high-frequency switch IC chip at the center of the high-frequency switch IC circuit section.

Abstract: A circuit arrangement for identifying network zero crossings of a network voltage of an alternating current network is provided. A measurement current generated by the network voltage is supplied to a zero crossing detector in order to produce a network zero crossing signal. A current sink is arranged between a live conductor and a neutral conductor of the alternating current network, the current sink allowing the path of a current value of the measurement current generated by the network voltage to be defined.

Abstract: A circuit breaker is provided that includes primary and secondary paths that extend between first and second terminals. The primary path extends between the first and second terminals and through a first switch. The secondary path extends between the first and second terminals and through the second switch and a semiconductor switching element. During normal operation, a control system maintains the first and second switches in closed position and the semiconductor switching element in blocking state. When a fault condition occurs in the load current, the control system detects the fault condition and sets the semiconductor switching element to conducting state. The control system then sets the first switch to open position such that the load current flows between the first and second terminals through the secondary path. The control system then sets the second switch to open position and the semiconductor switching element to blocking state.

Abstract: A semiconductor device has pluralities of grid array terminals forming a grid array structure, e.g. a BGA structure, in which the output end of a built-in switch circuit is connected to multiple terminals of the grid array structure, thereby reducing the current that flows through each of the multiple terminals below a permissible level and minimizing the heat due to contact resistances of the multiple terminals in contact with the IC socket of the semiconductor device. Each pair of nearest neighbors of the multiple terminals is interposed by at least one further array terminal. The multiple terminals are all located at the outermost peripheral terminal positions of the grid array structure. Thus, the heat generated in the respective multiple terminals connected to the switch circuit is reduced, thereby minimizing the possibility of hazardous melting of the terminals.

Abstract: A disconnecting apparatus for direct current interruption between a direct current source and an electrical device, in particular between a photovoltaic generator and an inverter, has a current-conducting mechanical switching contact and semiconductor electronics connected in parallel with the switching contact. The semiconductor electronics are non-conducting when the switching contact is closed, wherein a control input of the semiconductor electronics is wired with the switching contact in such a way that, when the switching contact opens, an arc voltage generated as a result of an arc via the switching contact switches the semiconductor electronics to become conducting.

Abstract: The present disclosure relates to a high voltage switch which may comprise a chain of MOS field-effect transistors (MOSFETs). The current of the individual MOSFETS, and hence the chain, can be controlled by means of adding a current measuring resistance into the source path of the transistors and transmitting the voltage arising there via a capacitor to a gate connector of the transistors.

Abstract: A complementary high voltage switched current source circuit has a complementary current source pair, wherein a first of the current source pair is coupled to a positive voltage rail and a second of the current source pair is coupled to a negative voltage rail. A digital logic-level control interface circuit is coupled to the complementary current source pair and to the positive voltage rail and the negative voltage rail. A pair of high voltage switches is coupled to the complementary current source pair and the digital logic-level control interface circuit and controlled by the digital control interface circuit.

Abstract: A device that includes: (i) an evaluated circuit; (ii) a leakage current dependent oscillator configured to generate an oscillating signal that has an oscillating frequency that represents a leakage current of the evaluated circuit; (iii) a switching current dependent oscillator configured to generate an oscillating signal that has an oscillating frequency that represents a switching induced current of the evaluated circuit; (iv) a power reduction module that is configured to: (a) compare between an oscillation frequency of the leakage current dependent oscillator and an oscillation frequency of the switching current dependent oscillator, to provide a current comparison result; (b) select a power reduction technique out of a dynamic voltage and frequency scaling technique and a power gating technique in view of the current comparison result; and (c) apply the selected power reduction technique.

Abstract: An electricity charging module using a hysteresis switch includes a storage capacitor that preliminarily stores electrical energy supplied from an external power source, a charging unit for preventing over-charging or over-discharging through monitoring of the charging state of the rechargeable battery, and a hysteresis switch that has a larger turn-on voltage level than the turn-off voltage level, and located between the storage capacitor and the charging unit, thereby electrically connecting or disconnecting the storage capacitor with the charging unit.

Abstract: A two-wire AC switch suppressing heat from a bidirectional switch element inside the switch is provided. The two-wire AC switch 100a connected between an AC power supply 101 and a load 102 includes: a bidirectional switch element 103 which flows passing current bi-directionally, selects whether to flow or block the current, is connected in series with the AC power supply 101 and the load 102 to form a closed-loop circuit, and is made of a group-III nitride semiconductor; a full-wave rectifier 104 performing full-wave rectification on power supplied from the AC power supply 101; a power supply circuit 105 smoothing a voltage after the full-wave rectification to generate DC power; a first gate drive circuit 107 and a second gate drive circuit 108 each outputting a control signal to the bidirectional switch element 103; and a control circuit 106 controlling the first and second gate drive circuits 107 and 108.

Abstract: A switching-control circuit to control switching of a transistor whose input electrode is applied with an input voltage, and turn off the transistor, when an output current from the transistor is greater than a reference current, includes: a reference-voltage-generating circuit to generate such a first-reference voltage that the reference current is reduced with reduction in an output voltage; a comparing circuit to compare a voltage corresponding to the output current with the first-reference voltage; and a driving circuit to turn on/off the transistor based on a feedback voltage corresponding to the output voltage and a second reference voltage corresponding to a target level so that the output voltage reaches the target level, when the comparing circuit determines that the output current is smaller than the reference current, and turn off the transistor when the comparing circuit determines that the output current is greater than the reference current.

Abstract: A high-frequency switch module includes a multi-layer substrate, and a switch circuit mounted on the multi-layer substrate. The multi-layer substrate includes a terminal through which a plurality of high-frequency signals in a plurality of frequency bands are input and output, a plurality of switch terminals, terminals to which control signals to control the switch circuit are supplied, current paths that connect the terminals to the switch circuit, and resistors that are provided on the current paths and have resistance values greater than the resistance values of the current paths. The switch circuit connects the terminal to the switch terminals corresponding to the frequency bands of high-frequency signals input and output through the terminal based on the control signals.

Abstract: An integrated circuit, method of controlling power supplied to semiconductor devices, a method of designing an integrated circuit and a computer program product are disclosed. The integrated circuit comprises: a semiconductor device for handling data; a power source for powering said semiconductor device, said power source comprising a high voltage source for supplying a high voltage level and a low voltage source for supplying a low voltage level; a plurality of switching devices arranged between at least one of the high or low voltage sources and the semiconductor device. There is also a control device for controlling a first set of the plurality of switching devices to connect one of the high or low voltage sources to the semiconductor device and for controlling a second set of the plurality of switching devices to connect the one of the high or low voltage sources to the semiconductor device.

Abstract: There are provided a semiconductor device and a semiconductor chip, in which the interconnection is made to be highly reliable by stacking three or more layers of chips without contact therebetween. A semiconductor chip of the present invention comprises a first signal transmission circuit, a silicon substrate on which a first changeover switch is formed, and an interconnection layer on which a first capacitive-coupling upper electrode is formed, wherein a first capacitive-coupling lower electrode is additionally formed on the rear surface of the silicon substrate through a first via hole that penetrates the silicon substrate and, whereas the first capacitive-coupling upper electrode is directly connected to the first signal transmission circuit, the first capacitive-coupling lower electrode is connected to the first signal transmission circuit through the first via hole and through the first changeover switch.

Abstract: A body control apparatus for an analog switch for minimizing leakage current and keeping PN junctions reverse-biased. The analog switch has first and second switch device clusters coupled between input and output nodes and controlled by a control input, each having a corresponding body junction. The body control apparatus includes body control devices each controlled by one of the input and output nodes for coupling a body junction to the opposite one of the input and output nodes. Each switch device cluster may include a main switch and body devices which keep the body junction of the main switch at a voltage level between the input and output nodes when the analog switch is on. When the analog switch is off, the body control apparatus activates when voltage across the input and output nodes rises to keep the body junctions at desired voltage levels.

Abstract: An electronic component includes a III-N transistor and a III-N rectifying device both encased in a single package. A gate electrode of the III-N transistor is electrically connected to a first lead of the single package or to a conductive structural portion of the single package, a drain electrode of the III-N transistor is electrically connected to a second lead of the single package and to a first electrode of the III-N rectifying device, and a second electrode of the III-N rectifying device is electrically connected to a third lead of the single package.

Abstract: A switch can be configured to receive a first signal at a first input and provide an output signal at an output, depending on a state of the switch. A switch state change can be delayed until an indication of a requested switch state different than a current switch state is received and the first signal reaches a threshold.

Abstract: An analog switch configuration includes a gate control circuit coupled between an input of a switch and a gate of the switch. The gate control circuit passes voltage changes on the input of the switch to the gate of the switch to decrease the influence the inherent gate to input capacitance has on the bandwidth of the switch. By reducing the change in voltage across the inherent capacitance, the current through the capacitance in decreased as well as its influence on the bandwidth of the configuration.

Abstract: A current drive circuit allows for a reduction in chip size and prevents an output current from decreasing. The current drive circuit has an output terminal connected to a first resistor. The first resistor is connected to a second resistor and the drain of a first transistor. The gate of the first transistor is connected to the gate of a second transistor, a grounded first current source, and the source of a third transistor. A second current source and the third transistor are connected to a power supply line. The second current source is connected to the gate of the third transistor, the drain of a fourth transistor, the drain of a fifth transistor, and a second resistor. When the voltage decreases, the on resistance of the fourth transistor increases, the fifth transistor is then connected in series to the second transistor, which increases the gate voltage of the first transistor.

Abstract: A method of recovering gain in a bipolar transistor includes: providing a bipolar transistor including an emitter, a collector, and a base disposed between junctions at the emitter and the collector; reverse biasing the junction disposed between the emitter and the base with an operational voltage and for an operational time period, so that a current gain ? of the transistor is degraded; idling the transistor, and generating a repair current Ibr into the base, while forward biasing the junction disposed between the emitter and the base with a first repair voltage (VEBR), and while at least partly simultaneously reverse biasing the junction disposed between the collector and the base with a second repair voltage (VCBR), for a repair time period (TR), so that the gain is at least party recovered; wherein VEBR, VCBR and TR have the proportional relationship: TR ? (??)2×exp [1/(Tam+Rth×le×VCER)], VCER=VBER+VCBR, and le=?×Ibr, ? is the normal current gain of the transistor, ?? is the target recovery gain of the tr

Abstract: Systems and methods are provided for discharging a voltage bus. An electrical system comprises a first switch coupled to a first voltage rail, a second switch coupled between the first switch and a second voltage rail, and a control system coupled to the first switch and the second switch. The control system is configured to alternately activate the first switch and the second switch such that an energy potential between the first voltage rail and the second voltage rail is dissipated through the first switch and the second switch.

Abstract: A two-wire load control device, such as, a dimmer switch, for controlling the amount of power delivered from an AC power source to an electrical load comprise a bidirectional semiconductor switch having first and second anti-series connected switching transistors (such as, for example, field-effect transistors) that are adapted to be coupled between the source and the load, and are controlled to be conductive and non-conductive in a complementary basis. The bidirectional semiconductor switch is operable to be rendered conductive and to remain conductive independent of the magnitude of a load current conducted through semiconductor switch. The dimmer switch also comprises a drive circuit for rendering the first and second switching transistors conductive and non-conductive each half-cycle on the complementary basis, so as to control the amount of power delivered to the electrical load to a desired amount of power.

Abstract: A semiconductor device is provided. The semiconductor device includes an integrated circuit that senses a voltage of a battery cell and outputs a control signal; a charge switch that is electrically coupled to the integrated circuit and interrupts a charge path according to the control signal output from the integrated circuit; at least one first lead electrically coupled to the integrated circuit; a second lead electrically coupled to the charge switch; and a sealing portion that seals the integrated circuit, charge switch, the at least one first lead and the second lead.

Abstract: A semiconductor device includes a multiplexer and an output buffer. The multiplexer includes: n switches (n is an integer of 2 or greater) each including an input node receiving a different data signal and an output node coupled to an input node of the output buffer; and a plurality of switch control circuits each corresponding to a respective one of the n switches. Each of the plurality of switch control circuits turns on a corresponding one of the n switches based on a corresponding one of the signals each having a first cycle and a phase different by 1/n of the cycle from adjacent phases. When each of the plurality of switch control circuits detects that an input-side data signal of the corresponding one of the n switches appears at a corresponding output-side node, each of the plurality of switch control circuits turns off the corresponding switch.