Abstract: A gate drive unit includes a charging device, a switch, and a timing module. The charging device is conductively coupled with an electrical energy source and a power switch between the electric energy source and the charging device. The switch closes to transfer electrical energy from the energy source to the charging device. The timing module is configured to close the switch to direct the electrical energy from the electrical energy source to the charging device for a designated charging time period in order to charge the charging device with the electrical energy while the power switch is in an OFF state. The timing module opens the switch to cause the electrical energy stored in the charging device to be transferred out of the charging device in the form of a trigger current that is conducted to a gate terminal of the power switch to activate the power switch to an ON state from the OFF state.

Abstract: An electrical circuit device includes a semiconductor component which has power terminals and a control terminal electrically insulated from the power terminals, for applying a control voltage, and a control terminal contact surface for contacting the control terminal for measuring the electrical behavior of the semiconductor component. A connection device is provided, via which the control terminal is electrically connectable to a series device, the connection device being transferable from a nonconductive state into a conductive state, in which the control terminal is connected to the series device.

Abstract: In accordance with an embodiment, a light emitting element driving circuit includes a comparator having an input connected to smoothing circuit and an output connected to a voltage-dividing circuit through a transistor. A drain-to-source resistance of the transistor is connected in parallel with a portion of the voltage dividing circuit. An output signal of the voltage dividing circuit is connected to another comparator that generates a drive transistor drive signal. The drive transistor is connected to one or more light emitting elements. In accordance with another embodiment, a reference voltage is generated in response to a rectified signal and compared with a sense voltage to generate a drive signal that is used to drive the drive transistor. Light is emitted from the one or more light emitting elements in response to the drive signal and the rectified voltage being greater than the forward voltage drops of the one or more light emitting elements.

Abstract: According to one embodiment of a module, the module includes a plurality of gate driver chips coupled in parallel and having a common gate input, a common supply voltage and a common output. The chips are spaced apart from one another and have a combined width extending between an edge of a first outer one of the chips and an opposing edge of a second outer one of the chips. The module further includes a plurality of capacitors coupled in parallel between ground and the common supply voltage, and a transverse electromagnetic (TEM) transmission line medium coupled to the common output of the chips and having a current flow direction perpendicular to the combined width of the chips.

Abstract: In a circuit that turns off a fluorescent lamp, clamping circuitry is provided to dissipate energy stored in a ballast when the lamp is being turned off. In a normal state in which the lamp is on, or in a normal state in which the lamp is off, clamping is not performed as long the VDS of a power switch is below a voltage A. In a lamp turn off operation, the switch is turned on for a time period to extinguish the lamp, and is then made to operate as a clamp (operate in its linear region) for a second period of time to dissipate energy that was stored in the ballast. Clamping in the linear region continues for VDS voltages down to B as ballast energy is dissipated, where B is smaller than A. By clamping down to the lower voltage B, re-ignition of the lamp is prevented.

Abstract: The present invention discloses a voltage adjusting circuit including a first switch element, a second switch element, a third switch element, a fourth switch element, a fifth switch element, and a sixth switch element. At first, the voltage adjusting circuit performs a discharging operation on an output voltage toward a reference voltage source, and then when the output voltage level is approaching a voltage level of an input voltage source, the voltage adjusting circuit will perform the discharging operation on the output voltage toward the input voltage source instead, and thus the voltage adjusting circuit can avoid affecting the input voltage source when performing the discharging operation. In addition, the voltage adjusting circuit does not need a digital counter to perform the above dual-phase type discharging operation or multi-phase type discharging operation, and therefore cost of the voltage adjusting circuit is lower, and the voltage adjusting circuit has good accuracy.

Abstract: An integrated circuit includes a functional circuit module operating at a voltage range between a first voltage level and a second voltage level lower than the first voltage level. A power supply switch module, coupled between the functional circuit module and one or more power supplies, is controlled by one or more controlling biases of voltage levels outside the voltage range between the first and second voltage levels for more fully turning on and off the power supply switch module than biases that are within the range between the first and second voltage levels do.

Abstract: A method and a circuit for controlling at least one thyristor constitutive of a rectifying bridge with a filtered output, including closing the thyristor when the voltage thereacross becomes greater than zero, and making the gate current of the thyristor disappear when the current therein exceeds its latching current.

Abstract: The detection of the presence of a load associated with a power MOS transistor integrated with its control circuit using a filtering time delay in generating a detection signal with respect to the occurrence of a turn-off control order of the power transistor, and where the filtering time delay is controlled with the power transistor switching time.

Abstract: The detection of the presence of a load associated with a power MOS transistor integrated with its control circuit, using a delay determined taking into account the detection with respect to the occurrence of a turn-off control order of the power transistor, and where the filtering time is controlled with the power transistor switching time.

Abstract: The detection of the presence of a load associated with a power MOS transistor integrated with its control circuit, using a delay determined taking into account the detection with respect to the occurrence of a turn-off control order of the power transistor, and where the filtering time is controlled with the power transistor switching time.

Abstract: A decoder circuit includes a detecting device which detects a selecting signal for selecting the decoder circuit, a clock-signal supplying device which supplies a clock signal, and a decoded signal outputting device which outputs a decoded signal according to timing of the clock signal when the detecting device detects the selecting signal.

Abstract: A method for turning a GTO on and off and a corresponding driving circuit are specified. A turn-on current and a holding current are generated from voltage pulses which are converted into currents with the aid of an electric energy store. In terms of circuitry, it is particularly advantageous when the required voltage pulses are drawn from the same energy source, or the same energy store, as the pulse required to generate the turn-off current. The holding current is preferably generated by repeating voltage pulses. The repetition frequency of said voltage pulses can then be increased or reduced as required. The frequency is reduced, in particular, when the gate-cathode voltage becomes negative, and is increased again when the voltage is positive again.

Abstract: A power semiconductor circuit provides a simple gate drive for switch components for the use in parallel-connected half-bridges, taking into consideration a gate voltage limitation to achieve short-circuit resistance. The circuit consists of drive circuits and main power circuits. The present invention contributes to solving the problems of the influence of the main power circuit on the drive circuit. According to the invention, switching transistors connected in parallel to the driver through separate activation and deactivation resistors, the former of relatively low resistance and the latter of relatively high resistance. Each of the switching transistors has an emitter resistor connected in parallel with a respective clamping diode to a sum point at ground, the cathode to the emitter. Each of the activation resistors is connected in series to the driver through a respective diode whose cathode is connected to the activation resistor.

Abstract: In one aspect of the present invention a gate drive circuit is disclosed. The gate drive circuit includes a first voltage source, a power transistor, a first and second switching device, and a controller. The power transistor has a drain connected to the first voltage source and a source connected to a load. The first switching device is connected to the power transistor gate and biases the power transistor ON to transfer energy from the first voltage source to the load. The second switching device is connected to the power transistor gate and biases the power transistor OFF to block the transfer of energy from the first voltage source to the load.

Abstract: A driver circuit for high frequency transistor type switches, comprising two sections; a positive (+) drive and a negative (-) drive, both sections being supplied with a high frequency signal by a square wave oscillator source. The sections are connected in parallel to a control generated input drive signal. In the negative drive section, the input drive signal is first inverted before being processed. Each section contains precise circuits for routing a high frequency carrier signal, for increasing input drive signal power gain, for providing independent positive and negative slope control, for providing exceptionally high voltage and noise isolation to avoid transmission of harmful voltages or noise, and for delivering a positive or negative drive signal to the gate/emitter of an external transistor under drive. The invention is characterized by its high voltage and noise isolation, using few components and being small in size.

Abstract: A GTO gate driver circuit includes a GTO; a MOS gate driver; a turn-on rectifier for receiving power from a high voltage isolation transformer; a turn-on capacitor coupled in parallel with the turn-on rectifier; and a turn-on MOSFET having a drain coupled to a first side of the turn-on capacitor, a gate coupled to the MOS gate driver, and a source coupled to a gate of the GTO. In one embodiment the circuit includes a turn-off rectifier coupled to the turn-on rectifier; a turn-off capacitor coupled in parallel to the turn-off rectifier with a cathode of the GTO being coupled to a second side of the turn-on capacitor and a first side of the turn-off capacitor; and a turn-off MCT having a gate coupled to the MOS gate driver, an anode coupled to the source of the MOSFET and a cathode coupled to a second side of the turn-off capacitor.

Abstract: A gate drive circuit for a voltage-driven type power switching device, including a control device for generating a gate voltage for the voltage-driven type power switching device, and a correction device connected to the control device for receiving the gate voltage and for correcting an effect of a magnetic flux resulted from a main circuit current flowing in the voltage-driven type power switching device applied to the gate voltage to generate a corrected gate voltage. The corrected gate voltage is applied to a gate of the voltage-driven type power switching device.

Abstract: In one aspect of the present invention a gate drive circuit is disclosed. The gate drive circuit includes a high voltage and low voltage energy source, a power transistor, a switching transistor, and a charging capacitor. The charging capacitor stores energy from the low voltage energy source. The gate drive circuit further includes a circuit that biases the switching transistor OFF which causes the low voltage energy stored in the capacitor to bias the power transistor ON to transfer high voltage energy to the load. The circuit additionally biases the switching transistor ON which biases the power transistor OFF to block the transfer of high voltage energy. Finally, a protection device is included to limit the power transistor voltage to a maximum voltage level in response to the power transistor being biased ON.

Abstract: A control device for controlling a double gate semiconductor device having a second gate electrode for controlling transition from a thyristor operation to a transistor operation, and a first gate electrode for controlling transition from transistor operation to an ON/OFF operation, and for controlling a current passing from a collector electrode to an emitter electrode, includes a first gate control circuit for delaying a turn-off signal to the double gate semiconductor device and applying the turn-off signal to the first gate electrode.

Abstract: This application discloses circuit and method for reducing the turn-off time of a power transistor driving an inductive load. The circuit clamps the gate to source of a power transistor by using two field effect transistors as the current path across the gate and source of the power transistor. A zener diode connected from the source to gate of the two field effect transistors is used to provide high voltage protection.

Abstract: In a superconducting energy storage apparatus including an AC-DC converter unit, a superconducting coil, a quench protection unit and a mechanical type persistent current switch, a self-firing type thyristor switch is connected in parallel to the mechanical type persistent current switch to be first operated in the event of an occurrence of trouble in an associated electric power system, and a control unit generates an ON instruction signal for turning on the persistent current switch so as to immediately establish a persistent current mode.

Abstract: An integrated process is shown for the fabrication of one or more of the following devices: (n-) and (p-) channel low-voltage field-effect logic transistors (556/403); (n-) and (p-) channel high-voltage insulated-gate field-effect transistors (557, 405) for the gating of an EEPROM memory array or the like; a Fowler-Nordheim tunneling EEPROM cell (558); (n-) and (p-) channel drain-extended insulated-gate field-effect transistors (407, 560); vertical and lateral annular DMOS transistors (409, 561); a Schottky diode (411); and a FAMOS EPROM cell (562). A "non-stack" double-level poly EEPROM cell (676) with enhanced reliability (676) is also disclosed.

Abstract: A gate power supply circuit including a switching device and a gate drive circuit connected to the switching device for generating a gate signal to be supplied to a gate of the switching device. The gate power supply circuit further includes a series circuit of a snubber capacitor and a snubber diode connected in parallel with the switching device, and an inductor, a first terminal of which is connected to a connection point of the switching device and the snubber diode. The gate power supply circuit also includes a series circuit of power disposing circuit and a first diode, connected between a series connection point of the snubber capacitor and the snubber diode and a second terminal of the inductor. The gate power supply circuit further includes a series circuit of a power supplying capacitor and a second diode, connected in parallel with the inductor.