Abstract: The method includes an adjustment phase in which a filtering device is operated as an oscillator, the frequency of oscillation of the filtering device is determined, and the characteristics of the filtering device are corrected with respect to the determined oscillation frequency and to a pre-established relation between the frequency of oscillation and the theoretical cutoff frequency, in such a way as to confer upon the filtering device a cutoff frequency equal to the theoretical cutoff frequency to within a tolerance. After the adjustment phase, a working phase takes place in which the filtering device carries out its filtering function.

Abstract: An integrated circuit formed on a semiconductor chip, comprising a low pass filter circuit having a first resistor of a first resistance value and a capacitor of a first capacitance value, wherein the first resistance value and the first capacitance value determine a corner frequency of the filter; and a tuning circuit having a second resistor of a second resistance value, a switched-capacitor of a third resistance value and a comparator that compares two voltage signals to produce a control signal, wherein the control signal adjusts the first and second resistance values as a function of the third resistance value. The corner frequency of the filter can be adjusted by varying one or more reference voltage signals. In combination, the corner frequency of the filter is adjusted by changing the frequency of a clock that controls the switched-capacitor to decrease the circuit sensitivity.

Abstract: A low-pass filter configured as a switched capacitor circuit in which capacitor charge switching is performed by 2-phase clock signals that control respective sets of switching elements, wherein an interval between a first-phase clock signal pulse and a succeeding second-phase clock signal pulse, during which no charging/discharging of capacitors should occur, is made as short as possible while ensuring that the two sets of switching elements cannot enter the ON state simultaneously. A low cut-off frequency can thereby be achieved, while using very small capacitor values.

Abstract: A functional circuit and a filter are disposed between a first power supply wire capable of being set in a first electric potential of a semiconductor device and a second power supply wire capable of being set in a second electric potential, which is different from the first electric potential. The functional circuit is connected to the first power supply wire or the second power supply wire. Then, the filter transmits a signal inputted or outputted between the outside of the semiconductor device and the functional circuit.

Abstract: The invention relates to an electrical switching module with a current-controlled switch (1), which has a transmitter (2) and a receiver (3) input and an output (4) and which electrically connects one of the inputs (2, 3) to the output (4), as desired, and with passive components which form a low-pass filter (5, 6), which is electrically connected to a transmitter input (2) of the switch, where the passive components are part of a multi-layer ceramic passive module, which includes a main casting (7) made of superimposed dielelectric layers (8) and electrically conductive layers (9), and where the switch (1) is configured on the upper or lower side of the main casting (7). In addition, the invention relates to a switching module configuration and the use of the switching module and the switching module configuration. Due to the current-controlled switch (1) a switching module can be achieved using very little power.

Abstract: A voltage controlled low pass filter comprising first and second circuits connected in series between a filter input and a filter output and a third circuit for adding a DC bias voltage to the filter input with AC signals to be filtered. The first circuit has a gain inversely related to the DC bias voltage and is operative to convert any signal applied to the filter input into a first circuit output signal which is a logarithmic function of the applied signal. The second circuit has a gain directly related to the DC bias voltage such that the overall gain of the first and second circuits is unity. The second circuit also has a bandwidth which is inversely related to the gain of the second circuit, and is operative to convert the first circuit output signal into a signal at the filter output which is an exponential function of the first circuit output signal.

Abstract: A receiver which may be an xDSL receiver has improved dynamic range. The receiver has a first amplifier, a network of four impedances and a variable gain second amplifier. The variable gain second amplifier has an input connected to an ouput of the first amplifier, an output connected to the first amplifier, and a variable gain control input. The gain of the variable gain second amplifier is 1 K , and the pass-band gain of the receiver is K. By controlling the gain of the receiver with an AGC (automatic gain control), the receiver can amplify and filter inputs over a wide dynamic range with lower distortion and without saturation. Alternatively, the gain of the variable gain second amplifier is - 1 K . The four impedances can be arranged to realise low-pass or high-pass filters.

Abstract: A filter circuit includes two first differential circuits disposed on A and B sides, in each of which a ratio of the number of transistors to that of diodes is 1:4, and two second differential circuits disposed on the A and B sides, in each of which the ratio of the number of transistors to that of diodes is 4:1. Base electrodes of the transistors of the A-side first differential circuit and the A-side second differential circuit are connected to a circuit input terminal, while base electrodes of the transistors of the B-side first differential circuit and the B-side second differential circuit are connected to another circuit input terminal. A current source is connected to an A-side connection node for the A-side first differential circuit and the A-side second differential circuit and another current source is connected to a B-side connection node for the B-side first differential circuit and the B-side second differential circuit.

Abstract: The present invention relates to a replica network for linearizing switched capacitor circuits. A bridge circuit with a MOSFET resistor disposed in a resistor branch of the bridge circuit is provided. A noninverting terminal of an operational amplifier is connected to a first node of the bridge circuit and an inverting terminal of the operational amplifier is connected to a second node of the bridge circuit. The second node is separated from the first node by another node of the bridge circuit. An output of the operational amplifier is provided to a gate terminal of the MOSFET resistor and to the gate terminal of the MOSFET switch in a switched capacitor circuit, thereby controlling the resistance of the MOSFET switch so that it is independent of the signal voltage. In this manner, the replica network of the present invention linearizes the switched capacitor circuit. In this manner, the replica network of the present invention linearizes the switched capacitor circuit.

Abstract: An integrated circuit formed on a semiconductor chip, comprising a low pass filter circuit having a first resistor of a first resistance value and a capacitor of a first capacitance value, wherein the first resistance value and the first capacitance value determine a corner frequency of the filter; and a tuning circuit having a second resistor of a second resistance value, a switched-capacitor of a third resistance value and a comparator that compares two voltage signals to produce a control signal, wherein the control signal adjusts the first and second resistance values as a function of the third resistance value. The corner frequency of the filter can be adjusted by varying one or more reference voltage signals. In combination, the corner frequency of the filter is adjusted by changing the frequency of a clock that controls the switched-capacitor to decrease the circuit sensitivity.

Abstract: An automatically adjusting gain/bandwidth loop filter suitable for a digital phase lock loop or a digital adaptive carrier recovery loop with variable loop gain/bandwidth for rapid acquisition and lower steady-state jitter is provided. The automatically adjusting gain/bandwidth loop filter comprises a variable gain/bandwidth loop filter, a tracking status detector and a gain/bandwidth control state machine. The tracking status detector observes the frequency error which is the output of the frequency tracking (integral) branch of the variable gain/bandwidth loop filter, then it outputs a tracking state of the carrier recovery loop. The loop gain/bandwidth is then adjusted by the gain/bandwidth control state machine in response of the tracking state to improve the pull-in time and steady-state carrier frequency jitter.

Abstract: A circuit for detecting signals present on a bifilar voltage-supply and signal-transmission line, in which the signals are constituted by positive and negative variations of the supply potential of at least one of the wires of the line, the circuit including a low-pass filter connected to the two wires of the line in order to supply, at an output terminal of the filter, a constant reference potential substantially equal to the supply potential of a preselected one of the two wires, a first threshold comparator having a reference input terminal and a threshold input terminal connected, respectively, to the output terminal of the filter and to the preselected wire of the two wires, and a second threshold comparator having a reference input terminal and a threshold input terminal connected, respectively, to the preselected wire of the two wires and to the output terminal of the filter.

Abstract: A switched low pass filter (18) minimizes transients generated during filter switching events and eliminates active circuit random noise. The switched low pass filter (18) includes a filter input terminal (26) for receiving an input base band signal, and an RC circuit (R1, C1, S1, S2) for receiving the input base band signal and for passing only a filtered portion of the input base band signal depending on a wide, mid or narrow band mode of filter operation. The switched low pass filter (18) also includes a transient reduction circuit (34) in switchable communication with the RC circuit (R1, C1, S1, S2) for minimizing transients and switching events caused by transitioning to the mid and narrow band modes of filter operation.

Abstract: The invention relates to trimming of analogue filters (201) in integrated circuits by means of an automatic adjusting circuit. A local oscillator (202) in the automatic adjusting circuit provides a periodic reference signal (R) to an adjustable phase shifter (203), which on basis thereof, produces a periodic phase shifted signal (R*). A phase detector (204) receives both the periodic reference signal (R) and the phase shifted period signal (R*) and produces a test signal (T) in response to a phase difference between the periodic reference signal (R) and the periodic phase shifted signal (R8). A lowpass filter (205) receives the test signal (T) and generates a level signal (TDC) relative a reference level, e.g. representing a zero voltage. A digital signal processor (207) produces a primary control signal (CS), having a serial format, on basis of the observation signal (M). A serial-to-parallel converter (208) converts the primary control signal (CS) into a control signal (CP) having a parallel signal format.

Abstract: An at least second-order active filter circuit includes an operational amplifier (Op) whose frequency response, in conjunction with an RC network (R1, R2, C1, C2), serves to set a predetermined low-pass characteristic. The frequency response of the operational amplifier (Op) forms an integral part of this low-pass characteristic.

Abstract: Tuning of a filter circuit is accomplished by determining a real RC time constant value for the filter circuit, then comparing the real RC vale to a predetermined RC value. If the real RC value does not match the predetermined RC value, the real RC value is varied (e.g.

Abstract: A method reduces noise resulting from a current surge in a circuit. A plurality of loading elements, parallel with the circuit being protected, are connected sequentially and disconnected. The connection of the loading elements results in a ramping up of current through the circuit without a sudden surge. In a preferred embodiment, an apparatus for slowing a current change in a circuit is described. The apparatus comprises a plurality of loading elements placed in parallel with the circuit, each of the elements providing a path for current flow, and a control circuit for selectively opening or closing at least one of said paths to prevent or enable current flow through the at least one of the paths.

Abstract: A system and method for decoupling capacitance for an integrated chip includes a load coupled between a power supply line and a ground. A distributed resistive-capacitive (RC) filter is coupled between the power supply line and the ground in series with the load. The distributed RC filter is operable to provide decoupled capacitance to the integrated circuit chip.

Abstract: Methods and systems for tuning an RC continuous-time filter are disclosed. In this regard a representative system for tuning an RC continuous-time filter includes a coarse-tuned resistive element coupled to an input of the filter for varying the cut-off frequency of the filter based upon process variations. The system also includes a MOSFET transistor coupled to the resistive element. The MOSFET transistor provides a resistance dependent upon a voltage offset provided to the gate of the transistor, wherein the resistance of the transistor offsets an adjustment in the resistance of the resistive element caused by temperature variations. The system also includes a voltage offset generator configured to provide the voltage offset to the transistor.

Abstract: A subordinate low pass filter 21 having characteristics similar to those of a main low pass filter 11 is provided. A signal of a frequency corresponding to a cut-off frequency is supplied from a signal generating circuit 22 to the subordinate LPF 21. A phase difference detecting circuit 23 detects a phase shift amount which is caused when the signal of the cut-off frequency is supplied to the subordinate LPF 21. An error detecting circuit 24 compares a value corresponding to the phase shift amount caused in the subordinate LPF 21 when the signal of the cut-off frequency is supplied with a reference value corresponding to the phase shift amount to be caused in the subordinate LPF 21 at the time of the cut-off frequency on phase characteristics. A comparison output is used as a control signal and the subordinate LPF 21 and main LPF 11 are controlled to have a desired cut-off frequency.

Abstract: A variable frequency filter circuit, provided with a low pass filter constituted of a gm amplifier, is a low pass filter circuit in which a micro controller controls a current value converting circuit so as to adjust a reference current of the low pass filter in order to adjust a cut-off frequency. When the variable frequency filter circuit is in an adjusting mode, the variable frequency filter circuit detects a shift in a cut-off frequency of the low pass filter for filtering an actual signal. As to a dynamic change in a power supply voltage, ambient temperature or the like, which cannot be detected in real time, a value of the shift can be worked out in advance and with accuracy via simulation. Therefore, the shift is compensated in accordance with the value stored in a data memory. This requires no need of an arrangement to have a separate reference filter for detecting a shift for compensation of the shift, thereby eliminating an influence the arrangement.

Abstract: A recurring noise filter for removing from a signal noise generated by parasitic coupling from a switching network. The filter contains an input filter, a sampling switch and an output filter. The input filter is a low pass filter which receives a signal containing noise generated by parasitic coupling from a switching network. The sampling switch is connected between the low pass filter and an output filter, with the sampling switch activating in response to the recurring switching of said switching network to sample the signal during the interval at which said noise does not occur within the signal. The output filter removes signals generated by the sampling switch from the sampled signal thereby generating a noise-filtered signal.

Abstract: A voltage controlled low pass filter comprising first and second circuits connected in series between a filter input and a filter output and a third circuit for adding a DC bias voltage to the filter input with AC signals to be filtered. The first circuit has a gain inversely related to the DC bias voltage and is operative to convert any signal applied to the filter input into a first circuit output signal which is a logarithmic function of the applied signal. The second circuit has a gain directly related to the DC bias voltage such that the overall gain of the first and second circuits is unity. The second circuit also has a bandwidth which is inversely related to the gain of the second circuit, and is operative to convert the first circuit output signal into a signal at the filter output which is an exponential function of the first circuit output signal.

Abstract: A continuous-time smoothing filter circuit and method for implementing the same are disclosed. The circuit may be implemented as a cascade of two sections. The first section may comprise two programmable 3rd order low-pass filters, each filter having a low Q value complex pole pair, as well as, a negative real pole. The second section may comprise an output stage amplifier having a low output impedance in order to drive external loads. Each of the 3rd order low-pass filters may be under programmable control to select and coarsely tune the cut-off frequency for each of the two filters. In its broadest terms, the method of the present invention can be described as: processing a digital to analog converter generated output signal with a first 3rd order low-pass filter; processing a first output signal provided by the first 3rd order low-pass filter with a second 3rd order low-pass filter; and processing a second output signal provided by the second 3rd order low-pass filter with a low-output impedance amplifier.

Abstract: A low pass filter (LPF) is provided that smoothes and significantly slows any change in its input voltage. The capacitance of the LPF is provided by an NMOS transistor having its source and drain tied to ground. The resistance of the LPF is provided by a plurality of series-connected PMOS transistors. The gates of the PMOS transistors are coupled to ground and therefore these transistors are conducting. The PMOS transistors are fabricated in a floating well. Therefore, the LPF eliminates any capacitive coupling between a voltage supply and the well. Thus, any variation in the supply voltage fails to affect adversely the functioning of the PMOS transistors. Thus, the LPF of the present invention can advantageously smooth and significantly slow any change in its input voltage. In one embodiment, the input voltage is a reference voltage.

Abstract: An apparatus is disclosed for implementing a complex filter of the type represented by a transfer function having a complex pole. The apparatus is capable of creating real and imaginary parts, Yr and Yi, of a complex output signal in response to receiving real and imaginary parts, Xr and Xi, of a complex input signal. The apparatus comprises a plurality of variable resistors that may be tuned to adjust various operating parameters of the complex filter.

Abstract: A buffer having a circuit for reducing the slope of an input signal and a negative feedback circuit that generates a regulating signal dependent on the variation of the output signal and that applies the regulating signal to the input of the buffer. A precise regulation of the slope, independent of variations in the production process and of environmental conditions, is achieved.

Abstract: An area-efficient reconstruction filter removes undesirable sample images produced by current-driven digital-to-analog converters. The reconstruction filter includes: an input node for receiving the input current signal; an operational amplifier having first and second inputs and an output at which the output voltage signal is produced; a first resistor coupled between the output of the operational amplifier and the input node; a second resistor coupled to the first input of the operational amplifier; and a third resistor coupled between the input node and the second resistor. The reconstruction filter may also include a fourth resistor coupled between the input node and a reference voltage.

Abstract: A filtering circuit includes circuits for delivering first and second ramp-shaped signals when a logic signal to be filtered changes values, and includes logic circuits each with a switching threshold, for receiving the ramp-shaped signals. A memory unit delivers an output signal having a first value when outputs of the logic circuits have a first pair of values, and delivers a second value when the outputs of the logic circuits have a second pair of values. The filtering circuit may be applied to the filtering of an external clock signal in serial type memory devices.

Abstract: A low-pass filter in a read channel, having an adjustable cutoff frequency has a low-pass filter 14, a time measuring circuit 15, a storage computing circuit 19 and a current supply circuit 18. The time measuring circuit 15 computes the pulse number of a reference clocking signal. The storage computing circuit 19 obtains the mean value of first and second set values that correspond to current values of the control current when the pulse number of the reference clocking signal increases by 1, and the current supply circuit 18 supplies a control current equivalent to the mean value to the low-pass filter 14. Therefore, even if the same pulse number is computed more than once, the desired current set value can be obtained from the mean value of the first and the second set values, and a control current amount that corresponds to said current set value can be supplied.

Abstract: An electrothermal integrator and audio frequency filter utilizing an electrothermal structure fabricated by way of a micro-machining process. An electrothermal structure is a structure in which there is thermal interaction between its electrical components. It is possible to implement an audio frequency filter by properly integrating electrothermal structures fabricated by micro-machining technology and electrical circuitry, because thermal response is generally slower than electrical response. It is possible to implement a variety of filters by way of forming a Gm-C integrator utilizing an electrothermal structure and using this basic block of Gm-C integrator in general circuitry to form filters.

Abstract: A noise suppression circuit encompasses an internal circuit, a bypass capacitor, first and second transistors. The internal circuit has high and low level terminals, and the low level terminal is connected to a low level power supply line. The internal circuit is supplied with enable and inverted enable signals. The first transistor has a first control electrode, and one main electrode is connected to the high level terminal. The first control electrode is supplied with the inverted enable signal. The bypass capacitor is connected between the other main electrode of the first transistor and the low level power supply line. The second transistor is connected between the other main electrode of the first transistor and a high level power supply line. The second transistor has a second control electrode supplied with the enable signal. The second transistor is not conductive when the internal circuit is active.

Abstract: The invention is an improved implementation of an active-RC polyphase band-pass filter with transconductor cross-coupling between filter sections. The polyphase filter has first to fourth inputs, first to fourth outputs, two filter sections, and a block of transconductor pairs. The four input signals to the polyphase filter succeed one another in phase by 90 degrees. The two filter sections have reactances comprised of active balanced operational amplifiers with matched capacitors in their feedback loops. The block of transconductor pairs is coupled between corresponding reactances of each filter. The transconductance of each transconductor pair is set as the product of a desired radian center frequency and the capacitance of the corresponding matched capacitors. In the preferred embodiment, the transconductors are Gm cells and the transconductance of at least one Gm cell is field adjustable.

Abstract: A programmable resistive-capacitive filter circuit enabling on-chip digital control of the frequency response includes a switched resistive type voltage divider network where one of the resistors forms an element of an RC filter and wherein the voltage divider additionally provides a DC bias on an output terminal. One preferred embodiment of the invention is directed to a programmable bandpass filter including MOSFET type semiconductor devices which are utilized as switched resistive elements of the filter.

Abstract: A filter is disclosed that actively controls one or more filter characteristics, such as the cut-off frequency of a selected filter pole, while minimizing the value of selected filter components such as the capacitor components. This helps improve the performance, reliability and yield of the filter. The filter rejects a selected frequency component or frequency band by actively providing an offset signal that effectively cancels the rejected frequency component or frequency band, while allowing the remaining frequency components or frequency bands to pass relatively freely to the output of the filter. The offset signal may also be used to actively reject a DC offset voltage or current from the input signal.

Abstract: A loop filter circuit in a phase lock loop, which also includes a phase detector, a charge pump, and a voltage controlled oscillator (VCO). The loop filter circuit is comprised of two active filters and a common mode feedback control differential comparator (CMFCDC). The active filters process differential signals from the charge pump and output a pair of differential signals to the VCO. The CMFCDC provides a common mode feedback path to both active filters. The loop filter circuit eliminates common mode noise introduced by power supply and ground, and reduces phase jitter in the overall PLL circuits. Each of the active filters is comprised of two independent sets of passive elements that dictate the values of natural modes (poles) and transmission zeros (zeros) of the filtering modules. This allows PLL designers wider latitude in adjusting the unity gain bandwidth of the active loop filter, which contributes to a more stable and better performing PLL circuit.

Abstract: A programmable resistive-capacitive filter circuit enabling on-chip digital control of the frequency response includes a switched resistive type voltage divider network where one of the resistors forms an element of an RC filter and wherein the voltage divider additionally provides a DC bias on an output terminal. One preferred embodiment of the invention is directed to a programmable bandpass filter including MOSFET type semiconductor devices which are utilized as switched resistive elements of the filter.

Abstract: The subject invention pertains to a method and circuit design particularly useful for long time constant RC active or passive circuits in either continuous or discrete time domains. The subject invention also relates to a method and circuit design useful for long time constant RL active or passive circuits in either continuous or discrete time domains. The subject invention can find advantage in the mixed-signal, electronic circuit component market. The subject invention widens the application and the price/performance ratio of VLSI analog electronic circuits, and can be easily included in conventional circuit designs.

Abstract: Offers a filter circuit in which the dedicated capacitor surface area is small and in which a dedicated process just for capacitor formation is unnecessary. The filter circuit of this invention is an active filter circuit wherein an operational amplifier AMP1 and capacitors (C1, C2) are formed on the same semiconductor substrate. The capacitors (C1, C2) are constructed from an insulated gate field effect transistor wherein the mutually connected source and drain forms one of the electrodes, the gate forms the other electrode, and the gate insulating film is used in the capacitor dielectric film. For capacitor C1, a DC bias means (DC bias circuit V2) that applies a prescribed DC bias is connected between the electrodes of the said capacitor. A DC bias means can also be provided at capacitor C2, but here, it can be omitted by just increasing the DC level of the input signal Vin just a prescribed level.

Abstract: An improved loop filter contains an active device which maintains a phase lock loop's zero frequency to bandwidth ratio substantially constant with changes in the incoming frequency. It does this by maintaining filter resistance proportional to the inverse square root of the filter current, and without requiring duplicates of circuit elements. Constructed in this way a phase lock loop can be achieved which has a wide operating frequency range and low tracking jitter.

Abstract: In a low-pass filter (10) having a filter input terminal (10-i1) supplied with a filter input signal (V1) and comprising an operational amplifier (11) and other peripheral passive elements (Rin, Cin, Rf, Cf, R1-1), the low-pass filter (10) further has an additional filter input terminal (10-i2) supplied with an additional filter input signal (V2) and comprises an additional filter input resistor (R1-2) connected between the additional filter input terminal (10-i2) and a common node (a0). The operational amplifier (11) has an inverting input port (11-1), a noninverting input port (11-2) connected to the reference voltage terminal (12), and an amplifier output port (11-3) for producing an amplifier output signal. Connected to the amplifier output port (11-3) of the operational amplifier (11), a filter output terminal (10-o) produces the amplifier output signal as a filter output signal.

Abstract: A low pass filter with programmable equalization includes at least one biquadratic cell and a converter of the input voltage into a current, proportional to the derivative of the input voltage, that is injected on a node of the biquadratic cell to introduce two real and opposed zeros in the transfer function of the filter. The low pass filter includes two structurally similar circuits functionally connected in cascade. Each circuit includes a biquadratic cell and an input stage having two outputs injecting, through a first current output, the current to an input capacitor of the respective biquadratic cell, by a direct coupling in a first of the two circuits and in an inverted manner in the second of the two circuits. A second voltage output is coupled to an input of the respective biquadratic cell.

Abstract: A low-pass filter circuit includes: a first compound transistor device (22) and (24) coupled between an input node (30) and an output node (32); a first transistor (20) coupled to the input node (30), a gate of the first transistor (20) is coupled to a drain of the first transistor (20); a second compound transistor device (36) and (38) coupled between a gate of the first compound transistor device (22) and (24) and the gate of the first transistor (20); a second transistor (34) coupled to the first transistor (20) and having a gate coupled to a gate of the second compound transistor device (36) and (38), the gate of the second transistor (34) is coupled to a drain of the second transistor (34); a current source (26) coupled to the drain of the second transistor (34); a first capacitor (C1) coupled to the output node (32); and a second capacitor (C2) coupled to the gate of the first compound transistor device (22) and (24).

Abstract: A completely tunable second order low-pass filter with minimal active circuitry is disclosed. The filter provides a very flexible choice of filter parameters such as cutoff frequency, DC gain, and Q factor, by selecting appropriate resistor values for a single integrated circuit with much lower capacitance, capacitance ratio, and active circuitry than other standard low-pass circuit configurations.

Abstract: A filter circuit comprising a phase advance circuit acting as a high pass filter, a phase retard circuit acting as a low pass filter, and an amplifier connected in series between an input and an output. A positive feedback loop is provided between the input and the output. The electrical characteristics of the phase advance and phase retard circuits are such that interaction between the phase advance and phase retard circuits is substantially prevented. This may be achieved by providing the phase advance and phase retard circuits with simple output buffers or providing internal closed loop negative feedback paths to provide low output impedances. The phase advance and phase retard circuits may comprise multipliers configured to compensate for variations in the values of resistive and capacitive components of the filter circuits.

Abstract: A direct conversion receiver having a homodyning section fed by a received radio frequency signal having a carrier frequency and reference signal having the carrier frequency; and a filter coupled to the monodyning section. The filter includes a plurality of serially coupled high pass filter stages. The high pass filter section acts as a DC offset correction loop that eliminates the serial effect of many amplifier sections on DC offsets arising within components, while maintaining a sufficiently low cutoff frequency to avoid adversely impacting information integrity at higher frequencies. The high pass filter sections also enable the integration of the needed capacitors, thus minimizing external components and connections. Each filter stage includes an amplifier and a low pass filter coupled in a negative feedback arrangement with the amplifier. Each low pass filter is adapted to have the cutoff frequency thereof switch from an initial high cutoff frequency to a subsequent lower cutoff frequency.

Abstract: A transconductance control circuit is composed of a replica transconductance amplifier and resistance, a reference voltage source, first selectors, a differential amplifier, a voltage-current translate circuit with characteristics equal to the transconductance amplifier which constitutes analog filters. A first switch of the first selectors is connectable for the reference voltage source, and every constant period is made to connect it using clocks at the reference voltage source. A second switch of second selectors is connectable for plural capacitors, and every constant period is made to connect it using clocks at the capacitors.

Abstract: A filter system includes a low pass filter, a first summer circuit, a second low pass filter and a second summer circuit. The first low pass filter includes an input, an output, a storage means, a switching means and a control means. An input signal is placed on the input. An output signal is generated on the output. The storage means provides storage of a signal sample over time. The switching means, when closed, electrically couples the input to the first end of the storage means. The switching means, when open electrically isolates the input from the first end of the storage means. The control means controls the switching means. The control means generates a switching control signal. The switching control signal has a sampling frequency. A maximum cutoff frequency of the low pass filter is dependent on a value of a capacitance provided by the storage means, the sampling frequency, and a pulse width of the switching control signal.

Abstract: A tunable integrator circuit having a main amplifier with an input resistor R and a feedback capacitor C and a tuning amplifier having a variable gain k between the output of the main amplifier and the feedback capacitor. The circuit has an effective capacitance of kC. Thus the integrator can be tuned to compensate for temperature and processing variations of the RC product by adjusting the gain of the tuning amplifier. The tuning amplifier can also be used to multiply the effective capacitance of the filter, kC, by increasing the gain k of the tuning amplifier beyond that needed to compensate for RC variations, thus reducing the area required for on-chip capacitances while maintaining a constant resistance. The circuit can be used independently or in conjunction with a capacitor array.

Abstract: A continuous time filter being operable to boost of an input signal including a first integrator to input the input signal and to integrate the input signal and to output a first integrated signal, a second integrator coupled to the first integrator to input the first integrated signal and to integrate the first integrated signal and to output a second integrated signal, and a third integrator coupled to the second integrator to input the second integrated signal and to integrate the second integrated signal and to output a third integrated signal.