Phase Shift Means In Loop Path Patents (Class 330/107)
  • Patent number: 8660502
    Abstract: In a high frequency antenna switch module, an I/O interface generates various control signals for controlling a switch module on the basis of a system data signal and a system clock, a decoder generates a switch control signal SWCNT for controlling a switch in response to a control signal CNT in the control signals, a timing detector for switch-ports switching generates a switch-port switching detection signal t_sw in response to the switch control signal, a frequency control signal generator generates frequency control signals ICONT and CCONT in response to the signal t_sw, and a negative voltage generation circuit generates a negative voltage output signal NVG_OUT while switching the frequency of the clock signal generated in the negative voltage generation circuit to different frequencies in response to signals ICONT and CCONT. The switch switches the paths among the plural switch ports in response to the signals SWCNT and NVG_OUT.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: February 25, 2014
    Assignee: Hitachi Metals, Ltd.
    Inventors: Yusuke Wachi, Takashi Kawamoto, Yuta Sugiyama
  • Patent number: 8659357
    Abstract: A method for processing signals may include, in a conditionally-stable operational amplifier, shifting the gain curve of the conditionally-stable operational amplifier to a desired position, by buffering at least one output signal from at least one transconductance module within the conditionally-stable operational amplifier using a buffer. The desired position of the gain curve may be associated with a desired feedback factor. The shifting of the gain may take place without shifting a corresponding phase. The tuning of the buffer may be based on the desired position of the gain curve which is derived from feedback factor value(s) specified by an application. A phase corresponding to the desired position of the gain curve at 0 dB frequency may be greater than a threshold phase. The buffering may be tuned using at least one tunable wideband buffer so that the corresponding phase at 0 dB frequency remains higher than the threshold phase.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: February 25, 2014
    Assignee: Google Inc.
    Inventor: Honglei Wu
  • Patent number: 8653890
    Abstract: A system and method of calibrating an amplifier are presented. The amplifier has a first amplification path and a second amplification path. An attenuation of the first amplification path is set to a first attenuation value and an attenuation of the second amplification path is set to the first attenuation value. A first phase shift of the first amplification path and a second phase shift of the second amplification path that meets a first performance criteria is determined. A phase shift of the first amplification path is set to the first phase shift and a phase shift of the second amplification path is set to the second phase shift. A first attenuation of the first amplification path and a second attenuation of the second amplification path that meets a second performance criteria is determined.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: February 18, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Abdulrhman M. S. Ahmed, Paul R Hart, Ramanujam Shinidhi Embar
  • Patent number: 8653888
    Abstract: A high-frequency signal amplifier includes an amplifier having an input terminal and an output terminal, and amplifying a high-frequency signal; a signal line connected between the output terminal of the amplifier and an antenna; coupled lines arranged in parallel and coupled to the signal line and having different line lengths or differently terminated ends; and phase shifters shifting phase of high-frequency signals applied via the signal line and the coupled lines, supplying the high-frequency signals to the input terminal of the amplifier, and having different amounts of phase change.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: February 18, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventor: Shinsuke Watanabe
  • Patent number: 8620233
    Abstract: A method of power amplifier predistortion that makes use of a compression detector circuit in a feedback loop in order to adapt the channel gain for changing transmitter behavior. By monitoring the compression behavior of the amplifier, the signal is scaled to compensate for gain and compression point variations in the power amplifier and transmitter, while keeping a predistortion correction function constant.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: December 31, 2013
    Assignee: Samsung Electroncs Co., Ltd.
    Inventor: Michael Lee Brobston
  • Patent number: 8508294
    Abstract: In one embodiment, an apparatus includes an amplifier circuit having a phase shift. The amplifier circuit amplifies a signal for wireless transmission. A feedback circuit is coupled to the amplifier circuit and includes a capacitor. An input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit. A total phase shift of the signal for the amplifier circuit and the feedback circuit is less than a threshold.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: August 13, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: Kan Li, Poh Boon Leong, Sehat Sutardja
  • Patent number: 8508217
    Abstract: An output circuit of a charge mode sensor includes a second resistor and an operational amplifier. The second resistor connects an output portion of the charge mode sensor and a ground. The operational amplifier is configured to output a detection signal that varies in accordance with an amount of charge kept in the charge mode sensor. The operational amplifier includes an inverting input portion, a non-inverting input portion, and an output portion. The inverting input portion is connected to the output portion of the charge mode sensor via a sensor cable. The non-inverting input portion is connected to a reference voltage. The output portion is connected to the inverting input portion via a first resistor.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: August 13, 2013
    Assignee: Honda Motor Co., Ltd.
    Inventor: Yoshimasa Eguchi
  • Patent number: 8503552
    Abstract: A digital communication system which applies channel coding and QAM modulation, where in QAM, at the transmitter, a number Q of bits is mapped to one QAM symbol, which is transmitted over the channel, at the receiver side, for each QAM symbol, a de-mapping is performed in order to obtain an L-value for each bit which corresponds to the QAM symbol, such that these L-values provide not only an estimation of the transmitted bits but also give information about their reliability.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: August 6, 2013
    Assignee: Fundacio Centre Tecnologic de Telecomunicacions de Catalunya
    Inventor: Stephan Pfletschinger
  • Patent number: 8487699
    Abstract: Described is an inductive compensating network coupled between the differential inputs of an operational amplifier circuit. The inductive compensating network includes at least one inductive element having an inductance value selected so as to provide proper compensation of the operational amplifier circuit. Also described is a feedback compensation scheme which adjusts loop characteristics by introducing zeros into a system with the addition of inductive or capacitive elements in a feedback path.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: July 16, 2013
    Assignee: Massachusetts Institute of Technology
    Inventors: Douglas Jay Kozak Adams, Rahul Sarpeshkar
  • Patent number: 8436624
    Abstract: A signal acquisition system has a signal acquisition probe having probe tip circuitry coupled to a resistive center conductor signal cable. The resistive center conductor signal cable of the signal acquisition probe is coupled to a compensation system in a signal processing instrument via an input node and input circuitry in the signal processing instrument. The signal acquisition probe and the signal processing instrument have mismatched time constants at the input node with the compensation system providing pole-zero pairs for maintaining flatness over the signal acquisition system frequency bandwidth.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: May 7, 2013
    Assignee: Tektronix, Inc.
    Inventors: Josiah A. Bartlett, Ira G. Pollock, Daniel G. Knierim, Lester L. Larson, Scott R. Jansen, Kenneth P. Dobyns, Michael Duane Stevens
  • Publication number: 20130093510
    Abstract: A high-frequency signal amplifier includes an amplifier having an input terminal and an output terminal, and amplifying a high-frequency signal; a signal line connected between the output terminal of the amplifier and an antenna; coupled lines arranged in parallel and coupled to the signal line and having different line lengths or differently terminated ends; and phase shifters shifting phase of high-frequency signals applied via the signal line and the coupled lines, supplying the high-frequency signals to the input terminal of the amplifier, and having different amounts of phase change.
    Type: Application
    Filed: June 5, 2012
    Publication date: April 18, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Shinsuke WATANABE
  • Patent number: 8416018
    Abstract: A variable frequency amplifier includes a main amplifier system 4 for amplifying one of signals into which an input signal is split by a directional coupler 3 to output the amplified signal, and an injection amplifier system 9 for adjusting at least one of the amplitude and phase of the other one of the signals into which the input signal is split by the directional coupler 3 according to a setting provided thereto from outside the variable frequency amplifier, and for amplifying the other signal and injecting this amplified signal into an output side of the main amplifier system 4.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: April 9, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuhisa Yamauchi, Hidenori Yukawa, Akira Inoue, Atsushi Yamamoto, Koichi Fujisaki, Hiroomi Ueda
  • Patent number: 8410849
    Abstract: Embodiments of the present invention enable a blended control approach to generate a desired output waveform in an outphasing-based system. Embodiments of blended control according to the present invention combine outphasing with bias and/or amplitude control to yield an accurate, practical, and producible system with substantially comparable performance to that of a theoretical ideal outphasing system, but without the isolation and accuracy requirements of outphasing alone.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: April 2, 2013
    Assignee: ParkerVision, Inc.
    Inventors: David F. Sorrells, Gregory S. Rawlins
  • Patent number: 8410846
    Abstract: A variable gain amplifier includes an integrator having an input, an output and a feedback loop connected between the input and output, a plurality of input chains connected in parallel between the amplifier input and the input of the integrator, each input chain including a resistor and a first switch and a plurality of second switches, each second switch connected between an intermediate node between the resistor and first switch of a respective input chain and the feedback loop of the integrator, wherein the resistance of the resistors in the input chains is scaled by a scaling factor with respect to one another and the on-resistances of the first and second switches connected to each intermediate node are scaled by the corresponding scaling factor.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: April 2, 2013
    Assignee: Cambridge Silicon Radio Limited
    Inventor: Hashem Zare-Hoseini
  • Patent number: 8299851
    Abstract: A high efficiency linear amplifier is disclosed. The amplifier comprises an input module having an input coupled to receive an input signal, a first output configured to provide a first signal component, and a second output configured to provide a second signal component. The amplifier also comprises a switching module having a switch input coupled to receive a switch signal, a first input coupled to the first output of the input module, a second input coupled to the second output of the input module, and at least a first output configured to provide a first composite signal.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: October 30, 2012
    Assignee: Agency for Science, Technology and Research
    Inventors: Yijun Zhou, Yan Wah Michael Chia
  • Patent number: 8248160
    Abstract: Systems, methods, and devices relating to the provision of deliberate predistortion to an input signal to compensate for distortions introduced by an amplifier subsystem. An input signal is received by a signal processing system which includes a predistortion subsystem. The input signal is decomposed and the fragments are then predistorted by the predistortion subsystem by applying a deliberate predistortion to the fragments. The predistorted fragments are then separately processed and recombined to arrive at the system output signal. The predistortion subsystem adaptively adjusts based on characteristics of the system output signal. Also, the predistortion subsystem is equipped with a control system that is state based—the state of the predistortion subsystem is dependent upon the prevailing conditions and, when required, the control system switches the state of the predistortion subsystem.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: August 21, 2012
    Assignee: Zarbana Digital Fund LLC
    Inventor: Aryan Saed
  • Patent number: 8232841
    Abstract: An amplifier circuit includes an amplifier including an inverting input that communicates with an input signal, a non-inverting input, and an output. A first feedback path communicates with the inverting input and the output of the amplifier. A second feedback path communicates with the inverting input and the output of the amplifier. The first feedback path provides feedback at a lower frequency than the second feedback path. A first resistance has one end that communicates with the output of the amplifier. A first capacitance has one end that communicates with an opposite end of the load resistance. A second resistance has one end that communicates with the inverting input and an opposite end that communicates with the opposite end of the first resistance.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: July 31, 2012
    Assignee: Marvell International Ltd.
    Inventor: Farbod Aram
  • Patent number: 8193856
    Abstract: An amplifier (V) for an integrated circuit amplifier circuit (IC) having a switched capacitor circuit (Cs, Cf) includes a capacitor for frequency compensation (CC1) that is connected in parallel to an amplifier stage (V2). This amplifier is advantageous because at least one second capacitor for frequency compensation (CC2) is selectively connected in parallel to the first capacitor for frequency compensation (CC1) via a switch controlled by a capacitor switching signal (clk).
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: June 5, 2012
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: José Manuel Garcia González, Norbert Greitschus
  • Patent number: 8159293
    Abstract: A nested transimpedance amplifier circuit including a first power source, a second power source, a charge pump module and a transimpedance amplifier. The first power source is at a first voltage. The second power source is at a second voltage. The second voltage is different than the first voltage. The charge pump module (i) receives the first voltage and the second voltage and (ii) generates a third voltage based on the first voltage and the second voltage. The first transimpedance amplifier includes an input, an output and a first operational amplifier. The input of the first transimpedance amplifier receives an input voltage. The output of the first transimpedance amplifier outputs an output voltage. The first operational amplifier receives the third voltage. The first transimpedance amplifier generates the output voltage based on the third voltage and the input voltage.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: April 17, 2012
    Assignee: Marvell International Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 8120422
    Abstract: Ripple reduction loop for chopper amplifiers and chopper-stabilized amplifiers. The ripple reduction loop includes a first chopper, a first amplifier having an input coupled to an output of the first chopper, a second chopper having an input coupled to an output of the first amplifier, a second amplifier having an input coupled to an output of the second chopper, a third chopper, an output of the second amplifier having its output capacitively coupled to an input of the third chopper as the only input to the third chopper, a third amplifier coupled as an integrator having an input coupled to an output of the third chopper, an output of the integrator being coupled to combine with the output of the first amplifier as the input of the second chopper, and at least one Miller capacitor coupled between an output of the second amplifier and the input of the second amplifier. Various embodiments are disclosed.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: February 21, 2012
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Johan Hendrik Huijsing, Kofi A. A. Makinwa, Rong Wu
  • Publication number: 20110298536
    Abstract: To accelerate the convergence of distortion compensation and improve the performance of distortion compensation in a distortion compensation amplifier which performs distortion compensation with a pre-distortion scheme. Level detecting means 1, distortion compensation aspect storing means 3, distortion providing means 4 perform distortion compensation, and amplifying means 8 amplifies a signal. Feedback signal taking means 9, 11 to 16 take a feedback signal, and distortion level detecting means 9, 11, 12, 17, and 18 detect the level of distortion contained in the feedback signal. Control means 19 updates the storage content of the distortion compensation aspect storing means so as to reduce the error component between the signal to be amplified and the feedback signal at the time of start of distortion compensation processing, and updates the content of the distortion compensation aspect storing means so as to reduce the detected level of distortion when the error component is reduced.
    Type: Application
    Filed: November 20, 2009
    Publication date: December 8, 2011
    Inventors: Takashi Okazaki, Yoshiaki Doi
  • Patent number: 8058928
    Abstract: The present invention includes operational amplifier for an active pixel sensor that detects optical energy and generates an analog output that is proportional to the optical energy. The active pixel sensor operates in a number of different modes including: signal integration mode, the reset integration mode, column reset mode, and column signal readout mode. Each mode causes the operational amplifier to see a different output load. Accordingly, the operational amplifier includes a variable feedback circuit to provide compensation that provides sufficient amplifier stability for each operating mode of the active pixel sensor. For instance, the operational amplifier includes a bank of feedback capacitors, one or more of which are selected based on the operating mode to provide sufficient phase margin for stability, but also considering gain and bandwidth requirements of the operating mode.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: November 15, 2011
    Assignee: Broadcom Corporation
    Inventor: Esin Terzioglu
  • Patent number: 8049557
    Abstract: An amplification device, comprising a device input receiving a device input signal, an amplifier unit comprising a zero crossing detector unit, an output filter and a lead-lag compensation network. The zero crossing detector unit compares the device input signal with a reference potential and switches a pulse width modulated detector output signal between first and second voltage levels dependent on the comparison. The amplifier unit provides an actual device output signal, e.g., an amplified representation of the device input signal. The amplification device further comprises a device output providing the actual device output signal, a control loop bridging the amplifier unit and comprising a forward filter, e.g., an integrating filter, for increasing loop gain improving the signal-to-noise ratio of the actual device output signal, and a deviation detection unit detecting over modulation of the amplifier unit, so that the amplification device disables forward filter functioning upon over modulation.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: November 1, 2011
    Assignee: Hypex Electronics B.V.
    Inventor: Bruno Johan Georges Putzeys
  • Publication number: 20110260790
    Abstract: An apparatus and method linearize a power amplifier in a transmitter by using a dual time alignment scheme. A first adjustable time delay unit delays a modulator signal input of a power amplifier. A first time delay estimator estimates a time delay between the delayed feedback signal and the reference signal, and adjusts the first adjustable time delay unit based on the estimated time delay between the delayed feedback signal and the reference signal. A second adjustable time delay unit delays the feedback signal. And a second time delay estimator estimates the time delay between the delayed feedback signal and the reference signal, and adjusts the second adjustable time delay unit based on the estimated time delay between the delayed feedback signal and the reference signal.
    Type: Application
    Filed: April 21, 2011
    Publication date: October 27, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Khalil C. Haddad
  • Patent number: 7948309
    Abstract: An amplifier circuit includes a transconductance amplifier at an input side of the amplifier circuit, a transimpedance amplifier connected to an output of the transconductance amplifier, and a voltage amplifier connected to an output of the transimpedance amplifier. The transconductance amplifier and the transimpedance amplifier form a low-impedance node at an interface thereof. A feedback circuit is connected between an output of the voltage amplifier and the low-impedance node between the transconductance amplifier and the transimpedance amplifier. The transconductance amplifier, the transimpedance amplifier, and the voltage amplifier form a main amplifier stage. The feedback circuit senses an imbalance in an output of the main amplifier stage, whereby a correction signal is integrated and negatively fed back to the low-impedance node between the transconductance amplifier and the transimpedance amplifier.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: May 24, 2011
    Assignee: University of Macau
    Inventors: Pui-In Mak, Seng-Pan U, Rui P. Martins
  • Patent number: 7928800
    Abstract: Systems and methods for implementing a programmable network for a multimode conditionally stable operational amplifier are disclosed.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: April 19, 2011
    Assignee: Infineon Technologies AG
    Inventors: Fabio Ballarin, Alfonso D'Andretta, Martin Clara, Antonio Di Giandomenico, Dario Giotta, Andreas Wiesbauer
  • Patent number: 7911272
    Abstract: Embodiments of the present invention enable a blended control approach to generate a desired output waveform in an outphasing-based system. Embodiments of blended control according to the present invention combine outphasing with bias and/or amplitude control to yield an accurate, practical, and producible system with substantially comparable performance to that of a theoretical ideal outphasing system, but without the isolation and accuracy requirements of outphasing alone.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: March 22, 2011
    Assignee: ParkerVision, Inc.
    Inventors: David F. Sorrells, Gregory S. Rawlins
  • Patent number: 7888910
    Abstract: Techniques for sequencing switched single capacitor for automatic equalization of batteries connected in series are described herein. In one embodiment, a battery equalizer includes a single capacitor, at least two switching circuits to be coupled to each of at least two batteries coupled in series. The battery equalizer further includes at least two driver circuits corresponding the at least two switching circuits and a controller. The controller is programmed to control the driver circuits in order to drive the switching circuits to sequentially couple the single capacitor to one of the batteries coupled in series during charging and/or discharging of the batteries. Only one of the switching circuits is turned on at a given time such that only one of the batteries is coupled to the single capacitor at the given time. Other methods and apparatuses are also described.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: February 15, 2011
    Assignee: HDM Systems Corporation
    Inventor: James Jin Xiong Zeng
  • Patent number: 7880543
    Abstract: A data transmitting circuit includes a reflection suppressive component generating circuit for generating a reflection suppressive component for suppressing the reflection caused by the discontinuity in the characteristic impedance on a transmission line, and a data output circuit for amplifying the reflection suppressive component and the data to be currently transmitted to a receiving side and outputting them to the transmission line.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: February 1, 2011
    Assignee: Fujitsu Limited
    Inventors: Hisakatsu Yamaguchi, Yoshiyasu Doi, Hirotaka Tamura
  • Patent number: 7872524
    Abstract: [Problems] to provide a CMOS low-noise amplification circuit which can reduce a chip area and design time, and which is easy to be digital-controlled from outside. [Means For Solving the Problems] The amplification circuit includes; an amplification stage (12) which amplifies an input signal up to an intended value; a sample and hold circuit (13) which samples the output signal from the amplification stage (12) by sampling the output signal with a sampling frequency which is at least twice the frequency band of the output signal to convert the output signal to a discrete time signal; a moving average calculation unit (15) which selects and outputs a particular frequency from the discrete time signal outputted from the sample and hold circuit (13) by a moving average operation; and a smoothing filter (17) which smoothes the output signal from the moving average calculation unit (15) and feed it back to the input of the amplification stage (12).
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: January 18, 2011
    Assignee: NEC Corporation
    Inventors: Haruya Ishizaki, Masayuki Mizuno
  • Patent number: 7826801
    Abstract: An adaptive feedback estimation and cancellation (AFEC) apparatus includes: a controller for generating and outputting control information by using a synchronization signal from an external synchronization acquisition unit and base station information, in order to remove a feedback signal that exists in a forward/reverse repeater signal to be repeated and then send the forward/reverse repeater signal; a first feedback prediction canceller for adaptively removing a feedback signal that exists in the forward repeater signal based on the control information from the controller and automatically adjusting the gain of the forward repeater signal; and a second feedback prediction canceller for adaptively removing a feedback signal that exists in the reverse repeater signal based on the control information from the controller and automatically controlling the gain of the reverse repeater signal.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: November 2, 2010
    Assignees: Airpoint, KT Corporation
    Inventors: Sung-Jun Baik, Byung-Soo Chang, Seong-Choon Lee, Kyoo-Tae Ryoo, Jeong-Hwi Kim, Jong-Sik Lee
  • Patent number: 7812670
    Abstract: The present invention discloses a baseband predistorter and baseband predistortion method. The baseband predistorter comprising: an address generator for calculating an address of a phase basic lookup table and an address of an amplitude basic lookup table; a parameter determining unit for determining a phase translational amount, an amplitude translational amount, a phase curvature adjustment amount and an amplitude curvature adjustment amount; a phase translating unit for changing the address in accordance with the phase translational amount; an amplitude translating unit for changing the address in accordance with the amplitude translational amount; a phase basic lookup table searching section for determining a corresponding phase output; an amplitude basic lookup table searching section, for determining a corresponding amplitude output; a phase curvature adjusting section, for adjusting the phase output; and an amplitude curvature adjusting section, for adjusting the amplitude output.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: October 12, 2010
    Assignee: Fujitsu Limited
    Inventors: Zhan Shi, Hui Li, Jianmin Zhou, Gang Sun
  • Patent number: 7812669
    Abstract: The present invention discloses a predistortion apparatus, a predistortion system and a predistortion method.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: October 12, 2010
    Assignee: Fujitsu Limited
    Inventors: Hui Li, Zhan Shi, Jianmin Zhou
  • Patent number: 7808311
    Abstract: A nested transimpedance amplifier circuit includes a first-order nested transimpedance amplifier having an input and an output. The first-order nested transimpedance amplifier is configured to be powered by a first voltage. A charge pump module is configured to receive the first voltage and a second voltage. The second voltage is different from the first voltage. The charge pump module generates a third voltage based on the first voltage and the second voltage. A first operational amplifier has an input and an output. The input of the first operational amplifier communicates with the output of the zero-order transimpedance amplifier, and the first operational amplifier is configured to be powered by the third voltage.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: October 5, 2010
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7737778
    Abstract: Systems, methods, and devices relating to the provision of deliberate predistortion to an input signal to compensate for distortions introduced by an amplifier subsystem. An input signal is received by a signal processing system which includes a predistortion subsystem. The input signal is decomposed and the fragments are then predistorted by the predistortion subsystem by applying a deliberate predistortion to the fragments. The predistorted fragments are then separately processed and recombined to arrive at the system output signal. The predistortion subsystem adaptively adjusts based on characteristics of the system output signal. Also, the predistortion subsystem is equipped with a control system that is state based—the state of the predistortion subsystem is dependent upon the prevailing conditions and, when required, the control system switches the state of the predistortion subsystem.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: June 15, 2010
    Inventor: Aryan Saed
  • Patent number: 7738616
    Abstract: A phase tracking system includes a source of an input signal representing a received symbol. A phase rotator has a first input terminal which is responsive to the input signal, a second input terminal which is responsive to a phase correction signal, and an output terminal which produces a phase adjusted output signal. A decision element generates an ideal signal representing the received symbol in response to the phase adjusted output signal. A phase adjuster, which has full phase wrap-around capability, generates the phase correction signal in response to the phase difference between the phase adjusted output signal and the ideal signal.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: June 15, 2010
    Assignee: Thomson Licensing
    Inventor: Ivonete Markman
  • Patent number: 7719355
    Abstract: One provides (401, 402) both an in-phase signal component (501) and a quadrature signal component (601) wherein the latter has a non-zero portion. These two signal components are then combined (403) to provide a Cartesian training waveform that can be used when training a linear amplifier that uses Cartesian feedback linearization. By one approach, the non-zero portion of the quadrature signal component can be coincident with a zero-crossing portion of the in-phase signal. In many application settings this non-zero portion of the quadrature signal component can be less (and sometimes considerably less) than a peak amplitude of the in-phase signal component. One may also shape the in-phase signal component to have a smoothed envelope. This may include, for example, using a smoothed sine wave such as a raised-sine function.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: May 18, 2010
    Assignee: Motorola, Inc.
    Inventors: Billy J. Van Cannon, Apolinar Chaidez, Theodore M. Lietz
  • Publication number: 20100060353
    Abstract: The power amplifier mainly includes a main amplifier, two splitters, one combiner, one subtracter, two phase shifters, one attenuator and one error amplifier. The splitters, subtracter and combiner are designed in the form of 90-degree or quadrature hybrid couplers. A quadrature hybrid can be implemented with any lumped or transmission-line elements and has an important advantage compared to the in-phase splitter that at equal values of reflection coefficients from loads connected to the in phase and 90° phase shift terminals, the reflection wave is lacking at the main input terminal and, consequently, the input voltage standing wave ratio of a quadrature hybrid does not depend on the equal load mismatch level.
    Type: Application
    Filed: August 26, 2009
    Publication date: March 11, 2010
    Inventors: Andrei Grebennikov, Florian Pivit
  • Patent number: 7626453
    Abstract: A nested transimpedance amplifier (TIA) circuit comprises a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an output and an input that communicates with said output of said zero-order TIA. A first power supply input applies a first voltage to the zero-order TIA. A second power supply input receives a second voltage. A charge pump module develops a third voltage based on the first voltage and the second voltage, wherein the third voltage is applied to the opamp.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: December 1, 2009
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Publication number: 20090284315
    Abstract: An operational amplifier includes, between an input and an output of an operational amplifier (an operational amplification stage) 10, a feedback capacitor 34 connected in negative feedback, a phase control circuit 100 having a resistor element (a resistor unit) 30 connected in series to the feedback capacitor 34. Load capacitors (load units) 32 are connected on the output side of the operational amplifier 10 and driven by an output signal from the operational amplifier 10. In a case that the capacitance values of the load capacitor 32 and 33 are increased and the phase margin of the operational amplifier becomes excessive in comparison with the optimum value, a resistance value RO of the resistor element 30 is increased to control the phase margin of the operational amplifier so as to fall within the optimum range, and thus accelerated settling properties are realized.
    Type: Application
    Filed: May 21, 2007
    Publication date: November 19, 2009
    Inventors: Satoshi Kobayashi, Junji Nakatsuka
  • Patent number: 7616057
    Abstract: A differential transimpedance amplifier circuit comprises a first operational amplifier having a first inverting input, a first non-inverting input, a first inverting output and a first non-inverting output. A second operational amplifier has a second inverting input, a second non-inverting input, a second inverting output and a second non-inverting output. The second inverting output communicates with the first non-inverting input and the second non-inverting output communicates with the first inverting input. A first feedback element communicates with the first non-inverting input and the first inverting output. A second feedback element communicates with the first inverting input and the first non-inverting output. A third feedback element communicates with the second inverting input and the first inverting output. A fourth feedback element communicates with the first non-inverting input and the first non-inverting output.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: November 10, 2009
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7605649
    Abstract: A transimpedance amplifier comprises a first operational amplifier having an input and an output. A second operational amplifier has an input and an output that communicates with the input of the first operational amplifier. A first feedback element has one end that communicates with the input of the first operational amplifier and another end that communicates with the output of the first operational amplifier, wherein the first feedback element comprises a first capacitance. A second feedback element communicates with the input of the first operational amplifier and another end that communicates with the output of the first operational amplifier.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: October 20, 2009
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Publication number: 20090167433
    Abstract: An audio apparatus includes an input, a first resistor, a first capacitor, an amplifier, a second resistor, a second capacitor, and an output. The input is used for inputting audio signals. The first resistor and the amplifier are serially connected to the input; wherein the first resistor is connected to the inverting input of the amplifier and the non-inverting input of the amplifier is connected to ground. The first capacitor has one end connected to a node between the first resistor and the inverting input of the amplifier, the other end connected to ground. The second resistor has one end connected to a node between the first resistor and the inverting input of the amplifier, the other end connected to the output of the amplifier. The second capacitor is connected between the inverting input and the output of the amplifier. The output is connected to the output of the amplifier, for outputting the audio signals after processing.
    Type: Application
    Filed: July 27, 2008
    Publication date: July 2, 2009
    Applicants: HONG FU JIN PRECISION INDUSTRY (SHENZHEN) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHUN-LUNG HUNG, DE-AN ZHANG, WEN-MING CHEN, KUN HUANG, JIE LIU, SHAO-LIN ZHANG
  • Publication number: 20090097590
    Abstract: An RF transmitter (10) includes an RF amplifier (28) that generates an amplified RF signal (36) including a linear RF signal (92) and a spurious baseband signal (94). The spurious baseband signal (94) interacts with bias feed networks (56, 66) to cause the RF amplifier (28) to generate an unwanted RF distortion at or near the allocated RF bandwidth. A baseband compensation signal (98) is generated and equalized in an adaptive equalizer (102) then fed to the RF amplifier (28). A feedback signal (46) is obtained from the RF amplifier (28) and used to drive the adaptive equalizer (102). A feedback loop causes the adaptive equalizer to adjust a baseband signal (24, 32) supplied to the RF amplifier (28) so that the RF distortion is minimized.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 16, 2009
    Applicant: CRESTCOM, INC.
    Inventors: Ronald Duane McCallister, Eric M. Brombaugh
  • Patent number: 7489188
    Abstract: An apparatus and method amplifies a delta-sigma modulated signal and delivers the amplified signal to a power amplifier without distortion in a communication system. The apparatus receives a delta-sigma modulated signal, phase-delays the received delta-sigma modulated signal by a multiple of 360° for a bandwidth of the delta-sigma modulated basic signal, and amplifies the phase-delayed signal, facilitating implementation of a high-efficiency delta-sigma modulation-based amplification system.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: February 10, 2009
    Assignees: Samsung Electronics Co., Ltd, Postech Foundation
    Inventors: Dong-Geun Lee, Bum-Man Kim, Jeong-Hyeon Cha
  • Patent number: 7456688
    Abstract: To cancel a reflected wave reflected from a connecting portion (22) and leaking into a feedback signal when a non-matched component is connected, the reflected wave is extracted by a circulator (30) and its phase and amplitude are adjusted by a vector adjusting circuit (32), and then the thus adjusted reflected wave is vector-summed with the feedback signal in a vector sum circuit (34).
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: November 25, 2008
    Assignee: Fujitsu Limited
    Inventors: Yousuke Okazaki, Hiroaki Maeda, Yasushi Seino, Takashi Ono
  • Patent number: 7423484
    Abstract: Systems and methods relating to the provision of gain, phase and delay adjustments to signals to be used by a predistortion subsystem. A portion of an input signal is delayed by delay elements prior to being received by the predistortion subsystem. The delayed input signal portion is also received by a feedback signal processing subsystem that adjusts the gain and phase of the feedback signal based on the delayed input signal portion. The adjusted feedback signal is used, along with the delayed portion of the input signal, to determine an appropriate predistortion modification to be applied to the input signal.
    Type: Grant
    Filed: January 13, 2006
    Date of Patent: September 9, 2008
    Assignee: Zarbana Digital Fund LLC
    Inventor: Aryan Saed
  • Patent number: 7409193
    Abstract: Systems and methods related to amplifier systems which use a predistortion subsystem to compensate for expected distortions in the system output signal. A signal processing subsystem receives an input signal and decomposes the input signal into multiple components. Each signal component is received by a predistortion subsystem which applies a predistortion modification to the component. The predistortion modification may be a phase modification, a magnitude modification, or a combination of both and is applied by adjusting the phase of the fragment. The predistorted component is then separately processed by the signal processing subsystem. The processing may take the form of phase modulation and amplification. The phase modulated and amplified components are then recombined to arrive at an amplitude and phase modulated and amplified output signal. The predistortion modification is applied to the components to compensate for distortions introduced in the signal by the signal processing subsystem.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: August 5, 2008
    Assignee: Zarbana Digital Fund LLC
    Inventor: Aryan Saėd
  • Patent number: 7405616
    Abstract: A differential transimpedance amplifier circuit comprises first, second, third and fourth operational amplifiers having a first inverting input, a first non-inverting input, a first inverting output and a first non-inverting output. A first feedback element communicates with the second non-inverting input and the second inverting output. A second feedback element communicates with the second inverting input and the second non-inverting output. A third feedback element communicates with the third non-inverting input and the first inverting output. A fourth feedback element communicates with the third inverting input and the first non-inverting output. A fifth feedback element communicates with the fourth inverting input and the first inverting output. A sixth feedback element communicates with the fourth non-inverting output and the first non-inverting output.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: July 29, 2008
    Assignee: Marvell International Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7403068
    Abstract: A method for double sampling loop negative feedback comprising: obtaining a low-frequency feedback signal from the output of the amplifier; obtaining a high-frequency feedback signal from part of the amplifier of which high-frequency phase shift is low, wherein two-ways sampling signals have the same amplifying phase; combining the two-ways sampling signals together using a series capacitor-inductor double signal combining circuit to form one signal, the signal having low phase shift at both high and low-frequency and being used for negative loop feedback. The invention also provides a double negative feedback amplifier using the method.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: July 22, 2008
    Inventor: Zongshan Zhou