Abstract: A signal processing circuit comprises a difference stage for receiving an input signal to be processed and a feedback signal taken from an output signal of the circuit. The difference stage generates a difference signal corresponding to the difference between the input and feedback signal. An integrator stage is coupled to the difference stage to receive the difference signal and output an integrated signal. A time continuous pulse width modulating stage is coupled to the integrator stage to receive the integrated signal and to modulate the signal with reference to a continuously varying carrier signal. A continuous time feedback path is coupled to the output of the modulating stage and an input or the difference stage. The integrator stage comprises at least two integrators to provide second or higher order integration.

Abstract: Disclosed is a low-noise active RC signal processing circuit, which comprises a feedforward section operable responsive to an input signal to provide an output at a predetermined gain, and a feedback section operable responsive to the output of the forward circuit to negatively feed back the output to the input signal of the feedforward section while giving a predetermined transfer characteristic to the output, so as to allow the processing circuit to have a transfer impedance characteristic equal to or less than the predetermined gain over the entire frequency range. The feedforward section is composed of a current-controlled voltage output circuit which includes a common-base transistor for receiving and inverting the input signal, and an emitter-follower transistor for outputting voltage, and has a transfer impedance defining the predetermined gain. The current-controlled voltage output circuit may also be constructed using an operational amplifier.

Abstract: A compensation circuit is provided for an amplifier including at least first and second amplifier stage. The circuit includes a first capacitance including one end that communicates with an input of the first amplifier stage. An amplifier includes a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance includes a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of the second amplifier stage. A first impedence includes one end that communicates with the input of the first amplifier stage and an opposite end that communicates with an output of the second amplifier stage.

Abstract: An apparatus for equalizing input signals including high and low frequency component signals received at an locus includes: (a) a first signal amplifying circuit coupled with the input locus, blocking the low frequency component signals and amplifying the high frequency component signals by a first gain to present a first amplified signal; the first gain is established by a relationship between at least two resistance elements in the first signal amplifying circuit; (b) a second signal amplifying circuit coupled with the input locus amplifying the input signal by a second gain to present a second amplified signal; and (c) a combining circuit combining the first amplified signal and the second amplified signal to present an output signal representative of the input signal at an output locus.

Abstract: The present invention provides an active low-pass filter system including a low-pass filter circuit and at least one frequency-rejecting network coupled to the low-pass filter circuit. The frequency-rejecting network is included in a resistive forward signal flow branch of the low-pass filter. The present invention also provides a power amplifier system for driving a load. The power amplifier system includes a pulse width modulation circuit which creates ripple spectra, an error amplifier and modulator circuit, and a demodulation filter connected in series, and a feedback control loop coupled to the pulse modulation circuit and including an active low-pass filter having a feedback demodulation filter and an isolated-integrator frequency-rejecting network.

Abstract: A power amplifier includes a comparator (COMP) to which an input signal is applied, a digital buffer (BUF) coupled via a feedback low-pass filter (LPFB) to a second input terminal (Cin2) of the comparator (COMP). An unstable loop is thereby created with an oscillation frequency related to the bandwidth of the feedback low-pass filter. In the presence of an input signal this self-oscillation frequency linearizes the system resulting in a power amplifier with excellent power efficiency. In a differential version two of these self-oscillating loops are provided. The coupling of the two loops thereby withholds the high-frequency self-oscillation from the load.

Abstract: A bandpass amplifier for use in a communication system is described. The amplifier includes a frequency selective network having a feedback path. The frequency selective network has first filtering circuitry for selectively passing the transmit band, and second filtering circuitry for selectively passing the receive band. The first filtering circuitry and the second filtering circuitry pass frequencies in the transmit band and reject frequencies in the receive band. A sampling analog-to-digital converter is coupled to the frequency selective network. A switching device is coupled to the sampling analog-to-digital converter for producing a continuous-time output signal. A feedback path is provided for continuously sensing and feeding back the continuous-time output signal to the frequency selective network.

Abstract: An ultra-low distortion electronic amplifier wherein the global dominant pole is formed by the selection of circuit and component arrangement within the input stage, such that the global dominant pole, is of third order, at audio frequencies. This audio power amplifier implements a high order global dominant pole with the use of operational amplifiers, and this high order dominant pole is distributed across both the voltage amplification stage and input stage without adverse reduction in the slew rate. The amplifier has increased negative feedback at audio and ultrasonic frequencies, giving a reduction in distortion across the entire audio band and some of the lower ultrasonic band.

Abstract: A pulse-width modulation circuit comprises a comparator having hysteresis characteristics of positive feedback, and an integrator, whose integrated output is compared with an input signal to produce a pulse-width modulation (PWM) signal having an advanced phase characteristic due to differentiation of the input signal. A switching circuit amplifies the pulse-width modulation signal based on the positive and negative source voltages (VPX, VMX). The amplified pulse-width modulation signal is supplied to a speaker via an LC filter, and it is also negatively fed back to the pulse-width modulation circuit. Since the pulse-width modulation signal whose phase is advanced is transmitted through the LC filter, it is possible to reduce phase revolution in the output of the power amplifier circuit. Thus, it is possible to effect negative feedback on the pulse-width modulation signal in a stable manner.

Abstract: A single stage switched capacitor programmable gain amplifier uses programmable capacitor values to adjust gain factors. The operation of the amplifier is described by a transfer function having two gain factors: (C1/C2) and (C2/C3). The gain factor of C1/C2 applies during the holding phase and the gain factor of C2/C3 applies during the sampling phase. The transfer function is equal to the product of the two gain factors: (C1/C2)×(C2/C3) such that the transfer function is equal to (C1/C3). The intermediate element C2 can be adjusted to maximize bandwidth because C2 is independent of the total transfer gain. Accordingly, the intermediate element C2 is substantially fixed from the holding phase to the following sampling phase such that the bandwidth of the programmable gain amplifier is maximized in the two phases.

Abstract: Various methods and apparatuses that multiply the effects of feedback current on an amplifier. In an embodiment, a buffer circuit controls the transition rate on an output pad of the buffer circuit. An amplifier has an input terminal and an output terminal. The output terminal couples to the output pad. A feedback component couples feedback current from the output pad to the input terminal. A current mirror multiplies the effects of the feedback current on the input terminal without increasing the feedback current through the feedback component.

Abstract: A programmable gain amplifier using metal-oxide-semiconductor (MOS) devices to approximate exponential gain characteristic with linear control signals is disclosed. According to one embodiment, the programmable gain amplifier (300a-300b) may include a capacitive switching circuit (304a-304b), a capacitive switching circuit (306a-306b), and an operational amplifier (302a-302b). Capacitive switching circuits (304a-304b and 306a-306b) may receive an analog input voltage through sample switches (308a-308b and 310a-310b). Capacitive switching circuit (304a-304b) receives an output from operational amplifier (302a-302b) through feedback switch (312a-312b). The programmable gain amplifier (300a-300b) may include a few additional unit capacitors which can allow larger gain ranges or more steps for a given range without a large increase in chip size.

Abstract: An amplification circuit for electric charge type sensor has a simple circuit configuration in which a common mode noise is adequately cancelled. In the acceleration sensor amplification circuit, the inversion input terminal of an operational amplifier is connected to one end of the acceleration sensor (G sensor). In addition, a feedback circuit including a feedback resistor and a feedback capacitor connected in parallel to each other is connected between the inversion input terminal and the output terminal of the operational amplifier. Furthermore, a cancellation circuit including a cancel resistor and a cancel capacitor connected in parallel to each other is connected between the non-inversion input terminal of the operational amplifier and a reference voltage.

Abstract: A circuit for splitting poles between a first stage and a second inverting voltage-amplifier stage of an electronic circuit, comprises, in series between the output of the first stage and the output of the second stage, and in that order, a first capacitor, a second capacitor and a resistor. The circuit further comprises a voltage-divider bridge which is connected between a terminal delivering a substantially constant voltage and the output of the first stage. The output of the voltage-divider bridge is linked to the common node between the first capacitor and the second capacitor, in such a way that a first resistor of the voltage-divider bridge is connected in parallel with the first capacitor.

Abstract: An electronic amplifier providing very low distortion which includes an output stage with an output error correction stage containing two amplifiers and wherein there are at least four local negative feedback paths, an output of the first amplifier being connected to an input of output stage transistor buffers or output stage transistors through a first network, an output of the second amplifier being connected to an input of output stage transistor buffers or output stage transistors through a second network, where components of the first and second amplifier the local negative feedback paths, first and second networks and output stage transistor buffers are selected to form substantially second order local dominant pole. Also disclosed is the supply of power to said first and second amplifiers from a floating power supply means coupled to either an or the output of the output stage so that the voltage of the floating power supply will follow substantially an output voltage of the output stage.

Abstract: A technique is disclosed which facilitates the layout of op amp cells, for example, two-stage op amp cells or three-stage op amp cells, to provide larger operational amplifiers. In accordance with one aspect, the op amp cells can be suitably coupled in parallel to provide a larger operational amplifier. This paralleling aspect can be facilitated by connecting the respective negative and positive inputs of a predetermined number of input gm stages together, connecting the outputs of a predetermined number of output gm stages together, and connecting a predetermined number of intermediate internal nodes between the input gm stages and the output gm stages together, without the occurrence of saturation of the internal nodes. In addition, the input and output characteristics of operational amplifier can be suitably improved.

Abstract: An operational amplifier (opamp) [74] coupled in a negative-feedback configuration [82] [84] comprising a driving opamp [76]; a linear controller [78]; and a mechanism [80] controlling the driving opamp's [76] offset. A voltage signal Vin provided by the feedback network [82][84] characterizes all errors caused by the driving opamp [76]. The controller [78] monitors this voltage and minimizes the signal-band spectral components thereof by inducing an offset in the driving opamp [76]. The offset control mechanism [80] has approximately constant gain and only little phase delay in the signal band.

Abstract: A compensated three stage amplifier having high gain as well as high speed is disclosed. The amplifier comprises a NMC and NGCC compensated cascaded three stage amplifier for receiving an input signal and for providing an amplified output signal in dependence thereupon. An extra feed forward transconductance stage extending from the input port of a first gain stage to the output port of a second gain stage of the amplifier is used in order to cancel one of two non-dominant poles in the transfer function of the amplifier with the additional zero introduced by the extra signal path. This results in a transfer function for a three stage cascaded amplifier having only two poles, which is highly desirable by allowing design of such amplifiers providing stable operation at high gain as well as high speed.

Abstract: A Class D switching audio amplifier incorporating four state modulation, input-to-output drive and feedback signal isolation, dual topology output filtration, and a low inductance board layout. The four state modulation results in a common mode voltage in the absence of audio. The input-to-output isolation of drive and feedback signals allows for elimination of large power transformers in applications without user-accessible outputs. Such isolation may make use of optical isolators. The output filter includes common mode and differential topology filter stages. The low inductance board layout treats the amplifier and power supply boards as modules, and utilizes both sides of the amplifier board in order to minimize trace length.

Abstract: A circuit (10) having multiple poles within an active frequency range employs a movable zero (66) to maintain stability in the circuit (10) under variable load conditions. A pole (62) created by a frequency compensation element (14) maintains a fixed frequency within the active frequency range of the circuit (10). In addition, a variable load impedance (36) coupled to the circuit (10) generates a load pole (64) within the active frequency range of the circuit (10) that changes frequency over time. As the load pole (64) changes frequency, the frequency of the movable zero (66) is adjusted to achieve an enhanced stability condition within the circuit (10). In one embodiment, the frequency of the movable zero (66) tracks the frequency of the load pole (64) as the load impedance (36) changes.

Abstract: An ultra-low distortion electronic amplifier wherein the global dominant pole is formed by the selection of circuit and component arrangement within the input stage, such that the global dominant pole, is of third order, at audio frequencies. This audio power amplifier implements a high order global dominant pole with the use of operational amplifiers, and this high order dominant pole is distributed across both the voltage amplification stage and input stage without adverse reduction in the slew rate. The amplifier has increased negative feedback at audio and ultrasonic frequencies, giving a reduction in distortion across the entire audio band and some of the lower ultrasonic band.

Abstract: An input signal from a signal source (10) is applied to an amplifier (20) via an input coupling capacitor (CIN). An output signal from the amplifier (20) is supplied to a headphone (30) via an output coupling capacitor (C1), and negatively fed back by a first negative feedback circuit configured by resistors (R2, R1), and a capacitor (CNF). A second negative feedback circuit configured by a capacitor (C2) and a resistor (R3) is disposed between the output of the capacitor (C1) and the terminal of the amplifier (20). When a capacitor which is sufficiently smaller in capacitance than the capacitor (C1) is used as the capacitor (C2), the capacitance of the capacitor (C1) can be made smaller than that of a capacitor used in the conventional art and the frequency characteristics in a low-frequency band can be enhanced.

Abstract: An amplifier is disclosed including multiple integrator stages. The amplifier includes a low-frequency path from a signal input to a signal output and relatively higher-frequency bypass paths around the first integrator stage. The paths converge at a summing node. To prevent instability when the integrators are saturated by large signals, the circuit includes a saturation detector which disables the relatively low-frequency paths during such saturation conditions.

Abstract: A power amplifier includes a comparator (COMP) to which an input signal is applied , a digital buffer (BUF) coupled via a feedback low-pass filter (LPFB) to a second input terminal (Cin2) of said comparator (COMP). An unstable loop is thereby created with an oscillation frequency related to the bandwidth of the feedback low-pass filter. In the presence of an input signal this self-oscillation frequency linearizes the system resulting in a power amplifier with excellent power efficiency. In a differential version two of these self-oscillating loops are provided . The coupling of the two loops thereby withhelds the high-frequency self-oscillation from the load.

Abstract: An amplifier circuit for a physical random number generator for amplifying a very small signal to generate a physical random number signal includes a pair of first differential input terminals including a first non-inverted input terminal TVin1+ and a first inverted input terminal TVin1−, a pair of second differential input terminals including a second non-inverted input terminal TVin2+ and a second inverted input terminal TVin2−, a differential amplifying section for receiving signals respectively from said pairs of first and second differential input terminals and for producing differential output signals in a form of a linear combination of the input signals, and a first pair of differential output terminals including a first inverted output terminal TVO− and a first non-inverted output terminal TVO+ to output the differential output signals. This configuration increases performance of the amplifier circuit for a physical random number generator.

Abstract: A charge-type sensor amplifying circuit includes an operational amplifier having an inverting input terminal thereof connected to one terminal of a charge-type sensor, a voltage divider having two voltage-dividing points which divide the output voltage from the operational amplifier, a feedback resistor connected between the inverting input terminal of the operational amplifier and one voltage-dividing point of the voltage divider which is on the output terminal side of the operational amplifier, and a feedback capacitor connected in parallel with the feedback resistor. In the charge-type sensor amplifying circuit, the other terminal of the charge-type sensor is connected to the other voltage-dividing point of the voltage divider which is not on the output terminal side of the operational amplifier.

Abstract: The invention relates to a device for amplifying electronic signals, including: an amplifier PRA, and a plurality of feedback loops G1, G2 placed between the output and the input of the amplifier, which feedback loops are arranged so that each feedback loop has an adjustable gain and all the feedback loops jointly form an assembly having an equivalent impedance which is substantially independent of the gain settings selected. Thanks to the invention, the amplification bandwidth can be easily adjusted without adversely affecting the performance of the device in terms of noise and high cut-off frequency.

Abstract: Accuracy of correction of offset drift with temperature and noise are corrected in a high voltage, high current amplifier is improved by thermal isolation and/or temperature regulation of another amplifier having greater gain and connected to a different power supply in a closed loop feedback servo system. A clamping network connected to the higher gain amplifier to avoid hard saturation due to transient feedback signals from a reactive load, especially an inductive load, also prevents hard saturation of the high voltage, high current amplifier. An adjustable feedback circuit connected to the higher gain amplifier allows adjustment to obtain critical damping of a second order system and faster response to achieve proportionality of output current to input voltage with an accuracy of very few parts per million error and with minimum settling time.

Abstract: A feedback circuit is connected between a drain electrode and a gate electrode of an FET. The feedback circuit is constituted by a series connection of a feedback amount adjusting resistor and an LC series resonance circuit. The LC series resonance circuit is constituted by a series connection of a capacitor and an inductor. The capacitance of the capacitor and the inductance of the inductor are set such that the LC series resonance circuit enters a short-circuited state with respect to an m-th harmonic by resonating at the frequency of the m-th harmonic, and the LC series resonance circuit enters an opened state with respect to a fundamental wave.

Abstract: An electronic amplifier providing very low distortion which includes an output stage with an output error correction stage containing two amplifiers and wherein there are at least four local negative feedback paths, an output of the first amplifier being connected to an input of output stage transistor buffers or output stage transistors through a first network, an output of the second amplifier being connected to an input of output stage transistor buffers or output stage transistors through a second network, where components of the first and second amplifier the local negative feedback paths, first and second networks and output stage transistor buffers are selected to form substantially second order local dominant pole. Also disclosed is the supply of power to said first and second amplifiers from a floating power supply means coupled to either an or the output of the output stage so that the voltage of the floating power supply will follow substantially an output voltage of the output stage.

Abstract: A fully differential circuit in which all inputs and outputs of transconductors Gm1+, Gm1−, Gm2+, Gm2− and fixed gain amplifier GA are fully differential signals. The number of feedback loop elements is made odd by the addition of a fixed gain amplifier with a gain of 1 which is not used in conventional filter architecture, each element of the configuration consequently inverts the common voltage, and since the feedback loop has negative feedback with respect to the common voltage, the operating point can be determined without a need for a dedicated DC feedback circuit.

Abstract: An output amplifier for a strobed sampling circuit has first and second operational amplifiers coupled to receive the sampled output from the sampling circuit. The operational amplifiers each have a RC circuit having a high ohmic value resistor that is coupled from its inverting input terminal to its output terminal. The non-inverting input terminals receive biasing voltages that are coupled to the sampling circuit. The gating strobes to the sampling circuit produces a DC current through the feedback resistor as a result of strobe pulses being integrated by the RC circuit. Respective electronic switches are coupled in parallel with the RC circuits of the operational amplifiers and are closed at a predetermined time interval after each strobe pulse to discharge the stored charge on the capacitors prior to the next strobe pulse. The output signals from the operational amplifiers are summed in a summing amplifier.

Abstract: An amplifier circuit for a physical random number generator for amplifying a very small signal to generate a physical random number signal includes a pair of first differential input terminals including a first non-inverted input terminal TVin1+ and a first inverted input terminal TVin1−, a pair of second differential input terminals including a second non-inverted input terminal TVin2+ and a second inverted input terminal TVin2−, a differential amplifying section for receiving signals respectively from said pairs of first and second differential input terminals and for producing differential output signals in a form of a linear combination of the input signals, and a first pair of differential output terminals including a first inverted output terminal TVO− and a first non-inverted output terminal TVO+ to output the differential output signals. This configuration increases performance of the amplifier circuit for a physical random number generator.

Abstract: A signal processing circuit is described including a frequency selective network in a feedback loop. An analog-to-analog converter in the feedback loop is coupled to the frequency selective network. A continuous-time feedback path provides feedback from the output terminal of the analog-to-analog converter to the frequency selective network.

Abstract: The present invention relates to a system and method for compensating IC parameters. According to an embodiment of the present invention, a die of an IC wafer is coupled with a compensation circuit that classifies the die into various types. Examples of types include fast, typical, and slow. The assigned type may be used in a special oscillator that compensates for variations from a die to a predetermined criteria. According to an embodiment of the present invention, a slow die directs a signal that moves through a relatively short path, a fast die directs a signal that moves through a relatively long path, and a typical die directs a signal that moves through a relatively medium length path in the compensation circuit. Accordingly, each die on a wafer may be coupled with a compensation circuit such that the compensation circuit selects a path of a circuit that adjusts the frequency produced by the dies to produce a batch of ICs that would meet the predetermined criteria for the vast majority of the dies.

Abstract: A 3-terminal operational filter circuit is presented that can be used to construct various types of active filters. The filter circuit can be configured to provide 2nd order low pass and band-pass frequency responses by coupling three resistors to the three filter terminals. Similarly, the filter circuit can be configured to provide 2nd order band-pass and high pass frequency responses by coupling two resistors and a capacitor to the three filter terminals. Furthermore, a plurality of filter circuits can be cascaded to construct various types of higher order filters. The filter circuit can be manufactured to operate within a selected range of center frequencies by selecting particular values for the internal filter capacitance and resistance. Users can then select a particular center frequency, quality factor, and gain of the filter circuit by selecting particular values for the circuit elements to be coupled to the three terminals.

Abstract: An amplifier system includes an input circuit loop and an output circuit loop coupled to a balanced amplifier assembly. The balanced amplifier assembly provides both a nonlinear distortion signal component and a corrective precursor signal component for enhanced and virtually complete cancellation of the nonlinear distortion signal component. A phase shifter facilitates phase shifting in a feedback signal path between the output circuit loop and the input circuit loop to form a corrective signal component from the corrective precursor signal.

Abstract: A filter circuit is provided that provides an input impedance arrangement with a high impedance value, which can be fabricated on a semiconductor body with a high accuracy and with a minimal semiconductor area being required. The input impedance arrangement comprises at least one T network having at least three impedance branches, of which a first impedance branch is connected to the filter input, a second impedance branch is connected to the amplifier input and a third impedance branch is connected to a circuit point for draining a current from the filter input.

Abstract: The present invention is related to a filter circuit that allows preamplifiers, such as those used in hard disk drives, to quickly recover from transients such transients caused by power switching, write to read switching, and thermal asperity. According to an embodiment of the present invention, under normal conditions, such as signals at 100 KHz to 10 MHz, signals at medium frequencies, such as signals at 100 KHz to 10 MHz, pass through a low pass filtering circuit. When a transient signal is received, then a change in voltage for Vout of the low pass filtering circuit increases by more than 100*Vout. For example, during transient conditions, the low pass filter circuit may also pass signals ranging from 10 MHz to 100 MHz. Accordingly, under transient conditions, the low pass pole moves approximately 100 times or more. A feedback loop subtracts the resulting low pass signals from the original signal, acting as a high pass filter.

Abstract: A signal processing circuit is described including a frequency selective network in a feedback loop. An analog-to-analog converter in the feedback loop is coupled to the frequency selective network. A continuous-time feedback path provides feedback from the output terminal of the analog-to-analog converter to the frequency selective network.

Abstract: A signal processing circuit is described including a frequency selective network in a feedback loop. An analog-to-analog converter in the feedback loop is coupled to the frequency selective network. A continuous-time feedback path provides feedback from the output terminal of the analog-to-analog converter to the frequency selective network.

Abstract: In this invention an integrated operational amplifier is calibrated to optimize phase margin. The calibration is done to correct changes caused by operating temp and supply voltages as well as process variations and aging that can affect the stability of the amplifier. A calibration circuit measures the response of the operational amplifier to a pulse input and controls a feedback impedance to produce an optimized phase margin. The output response to the pulse input is measured at two different times, at a first time close to the transition capturing the peak overshoot from an under damped amplifier and at second time later than the first measurement when the distortions from the under damped ringing have diminished. A quantizer circuit compares the two measure voltages and provides an input to control logic which selects the amount of reactance in the feedback of the operational amplifier.

Abstract: A three stage amplifier is disclosed provided with a novel frequency compensation technique. Only a single feedback loop with a single compensation capacitance is provided. Instead of a conventional nested compensation technique, damping factor control is provided by means of a fourth gain stage in order to stabilize the amplifier. The resulting amplifier is particularly useful to drive large capacitive loads for low-voltage low-power applications.

Abstract: In a tunable recursive filter implemented in a microwave monolithic integrated circuit (MMIC), a second-order recursive filter included two first order filters, having first and second transmission lines, respectively, connected in parallel. An amplifying unit having a cascode amplifier is arranged in a forward path shared by the two first-order filters. A combiner receives an input signal and a first and second feedback signals fed back through the first and second transmission lines, respectively, and combines such signals to output a combined signal. The amplifying unit amplifies the combined signal and outputs an amplified signal. A divider divides the amplified signal from the amplifying unit, outputs a first portion of the divided signal, and feeds back a second and third portion of the divided signal through the first and second transmission lines.

Abstract: An amplifier/switch circuit includes a first circuit input, a second circuit input, a circuit output, an amplifier, a switching circuit and a DC blocking capacitor. The amplifier has an amplifier control input, a first amplifier output and a second amplifier output. The amplifier control input is connected to the first circuit input. The first amplifier output is connected to the second circuit input. The second amplifier output is connected to the circuit output. A switching circuit has a switch control input, a switch input and a switch output. The switch control input is connected to the circuit output. The control input is connected to the second circuit input. The DC blocking capacitor is connected between the amplifier control input of the first transistor and the switch input.

Abstract: AC coupling and signal amplification using switched capacitors. The use of a switched capacitor to simulate a resistor in amplifier coupling in an integrated circuit processing audio frequency signals avoids the need for external components, reducing cost and eliminating the need for pinouts for the external components. In a system including an anti-aliasing filter, capacitive coupling is used for coupling between amplifiers, with the gain of the second amplifier being set by a feedback capacitor between the amplifier output and its input, as sized relative to the coupling capacitor. The switched capacitor in the feedback loop of the second amplifier preferably couples the output of the anti-aliasing filter back to the amplifier input, thereby minimizing the aliasing from the capacitor switching.

Abstract: An operational amplifier arrangement includes besides the two-stage operational amplifier, a third stage for tracking and holding the input offset of the first stage during an offset compensation phase which regularly interrupts the normal operation of the arrangement. To this purpose four switches are clocked, whereby the first stage is decoupled from the second stage during an offset compensation phase, whereby the feedback loop of the third stage is interrupted during normal mode, and whereby during the offset compensation phase the input is decoupled from the arrangement, while both input terminals are shorted. A Miller capacitor across the second stage prevents the output from drifting during the offset compensation mode.

Abstract: The present invention is a device for feedback compensation in amplifiers having at least one voltage gain stage wherein both capacitive and inductive components are used in conjunction with resistive components. There is a first resistor, connected between the output node and the feedback node of the amplifier system, a capacitor, connected in parallel with the first resistor, a second resistor, and an inductor, connected in series with said second resistor. The series combination of the second resistor and the inductor is connected between the feedback node and the reference potential of the amplifier system (usually system common for a non-inverting amplifier system, or the input signal source for an inverting amplifier system). The capacitor advances the phase angle of the current flowing through the feedback network device while the inductor advances the phase angle of the voltage appearing between the feedback node of the amplifier system and the reference potential of same.

Abstract: A voltage regulator circuit having a series device external to an integrated circuit voltage regulator. The external series device provides a voltage drop prior to the voltage being input to the voltage regulator during high power applications. Depending on the power level, low or high, one of two transistors will be activated. For low power applications, a transistor attached directly to the input voltage is active and the external series device is bypassed. For high power applications, the external series device provides a voltage drop prior to the input voltage reaching the second transistor thereby lowering the power to be dissipated by the integrated circuit.

Abstract: A second-order differential highpass filter constructed according to the present invention includes a difference amplifier and a feedback processing circuit. The difference amplifier includes an operational amplifier OP.sub.1, and four resistors R.sub.3, R.sub.4, R.sub.5 and R.sub.6, wherein R.sub.4 /R.sub.3 =R.sub.6 /R.sub.5. An input voltage V.sub.1 is fed to the inverting terminal (-) of the operational amplifier OP.sub.1 via the resistor R.sub.5. Another input voltage V.sub.2 is fed to the noninverting terminal (+) of the operational amplifier OP.sub.1 via the resistor R.sub.3. The output of the operational amplifier OP.sub.1 is fed back to the inverting terminal (-) of the operational amplifier OP.sub.1 via the resistor R.sub.6. The feedback processing circuit includes an operational amplifier OP.sub.2, two resistors R.sub.1 and R.sub.2, and two serial capacitors C.sub.2 and C.sub.1. The output of the operational amplifier OP.sub.