Abstract: A differential amplifier having a first and second output terminals and receiving an input signal at an input terminal. The amplifier comprises a first amplifier having a first input connected to the input terminal, a second input and a first output connected together to the first output terminal, and a second output connected to the second output terminal, the first amplifier reproducing the input signal on the first output. The amplifier comprises a second amplifier having a first input receiving a reference signal and a second input connected to the output terminals by resistive elements and controlling the provision by the first amplifier on the second output of a signal such that the signals received at the first and second inputs of the second amplifier are equal.

Abstract: An amplifier (10) includes a first stage (4) including differentially coupled first (Q1) and second (Q2) input transistors and a controlled active load circuit (6). A second stage (8) includes differentially coupled third (Q5) and fourth (Q6) input transistors and a load circuit (Q7,8). A first output (2A) of the first stage (4) is coupled to a first input of the second stage (8), a second output (2B) of the first stage (4) being coupled to a second input of the second stage (8). A common mode feedback amplifier (12) has an input coupled to receive a common mode signal (3) from the second stage (8) for producing an amplified common mode signal (9) on a control input of the controlled active load circuit (6) to provide fast settling of an output (Vout) of the second stage without substantially increasing amplifier noise.

Abstract: A differential amplifier circuit with a self-controlled common mode output voltage.

Abstract: The output of a commercially available integrated high gain differential amplifier that already has reasonable linearity is connected back to the (?) input to obtain the well known circuit configuration for a non-inverting amplifier, whose gain may be unity or greater, and whose linearity in response to the (+) input is to be improved. We operate the part with power supplies that are dynamically varied to always be the amplifier input+N volts and that input?N volts. This allows the part to remain a low voltage swing part (±N volts) even though the actual output might swing several times that ±N volts. It improves linearity because the part is almost always operating at nearly ‘the same operating point’ relative to the perceived power supplies. The dynamically tracking power supplies maybe obtained from plus and minus higher voltage work supplies and the use of symmetrical current mirrors to produce matched ±N volt offsets that are referenced to the input of the amplifier.

Abstract: The present invention is a folded cascode operational amplifier provided with a differential input portion 10, cascode current source portion 20, current mirror portion 30, output portion 40, and differential amplifier 50 serving as a differential amplifying portion. The differential input portion 10 has P-type MOS transistors M2 and M3 of a differential pair for respectively inputting a differential signal and the MOS transistors M2 and M3 are respectively provided with a well terminal. The differential amplifier 50 compares the source voltage of each of the MOS transistors M2 and M3 with a predetermined reference voltage Vref, generates an output voltage in accordance with the comparison result, and supplies the generated output voltage to well terminals as well voltages of the MOS transistors M2 and M3. An operational amplifier is provided which performs the rail-to-rail operation at a low voltage and in which an input current is zero.

Abstract: A differential amplifier circuit which amplifies a signal developed by a signal generating device when coupled between first and second input nodes and provides an amplified differential signal at first and second output nodes. First and second current sources source first and second current levels to the first input node and the first output node, respectively. First and second current sinks sink the first and second current levels from the second input node and the second output node, respectively. A first current amplifier controls current between the first output node and the second input node to maintain the second input node at a first bias voltage level. A second current amplifier controls current between the first input node and the second output node to maintain the first input node at a second bias voltage level. An optional feedback circuit senses a DC offset and adjusts current to compensate.

Abstract: The present invention provides a method for single-ended compensation of an operational amplifier, which comprises: designing an operational amplifier having a single-ended offset style, preparing a common-mode circuit, a switch circuit, a comparator, a digital circuit and a compensation circuits. When a single-ended offset voltage of the operational amplifier is converted, output of the comparator will change state and will be detected by the digital circuit, so that the digital circuit will fix a group of digital signals, and instruct the switch circuit to block an average signal of the common-mode circuit, allowing a set of double-end input signals to be inputted to the operational amplifier directly.

Abstract: A differential amplifier is configured in a cascode configuration that includes input transistors that are connected to corresponding cascode transistors. The gates of the cascode transistors are tied together to form a common bias for the cascode devices. The input transistors of the differential amplifier receive a differential input signal that is amplified and outputted to an output circuit that is connected to the cascode transistors. The cascode devices require a bias voltage for proper operation. Preferably, the bias voltage puts the cascode devices into the saturation region. The gates of cascode devices are coupled together and connected to a bias terminal. In embodiments of the invention, the bias terminal is connected to another terminal of the chip to provide the bias for the cascode devices.

Abstract: Differential amplifier embodiments are provided for amplifying input signals with enhanced gain and dynamic range. They include first and second amplifier stages and at least one common-mode feedback circuit that is arranged to mirror and adjust a tail current to control the common-mode level of a respective one of the stages. The stages are configured with cascode elements to obtain high impedances that enhance their signal gain and the common-mode feedback circuit is configured to controllably lower the output voltage of a current source that provides the tail current to thereby enhance the amplifier's dynamic range. The amplifier embodiments are particularly suited for use in applications where they must operate with reduced supply voltages and operate in alternating operational modes.

Abstract: Apparatus, systems, and methods implementing techniques for reducing the variation of a DC offset are described. An input signal is amplified to produce an intermediate signal. The intermediate signal is processed to produce a feedback signal and an output signal, where the output signal has a DC offset that varies with a varying parameter of the circuitry used to process the intermediate signal. Variation of the DC offset of the output signal is reduced using the feedback signal. In one implementation, the circuitry used to process the intermediate signal is a variable-gain amplifier circuit, and the DC offset of the output signal varies with a gain of the variable-gain amplifier.

Abstract: An integrated preamplifier circuit for detecting a signal current from a photodiode and converting the signal current into an output voltage is provided. The circuit includes a signal amplifier and a dummy amplifier, the dummy amplifier being matched to the signal amplifier. Each of these amplifiers includes an input transistor and an output transistor, the input transistor of the signal amplifier receiving an input signal derived from the signal current and the input transistor of the dummy amplifier receiving no input signal. The signal and dummy amplifiers provide the desired differential output signal. The input transistors of the signal and dummy amplifiers each have a biasing current source forced to follow a reference current source implemented within the integrated circuit.

Abstract: A differential amplifier comprises an operational amplifier, comprising a positive output terminal, a negative output terminal, and a feedback terminal; a common mode sensing circuit coupled to the positive output terminal and the negative output terminal, for generating a sensed common mode voltage of the positive output terminal and the negative output terminal of the operational amplifier; and a feedback circuit comprising a common mode input terminal for receiving the sensed common mode voltage, a reference input terminal for receiving a reference voltage, and a first resistive component coupled between the common mode input terminal and the reference input terminal, the feedback circuit generating a feedback signal according to the common mode voltage and the reference voltage; wherein the feedback terminal of the operational amplifier receives the feedback signal of the feedback circuit.

Abstract: In a differential output circuit, a second amplifier has a positive terminal connected to a second fixed potential and a negative terminal to a fifth switch at a first terminal. First and second switches are connected at a point connected to the fifth switch at a second terminal and to a first load. Third and fourth switches are connected at a point connected to the fifth switch at a third terminal and to a second load. The second terminal is connected to the first terminal when the second and third switches turn on. The third terminal is connected to the first terminal when the first and fourth switches turn on.

Abstract: A differential RF non-linear power amplifier employing low-voltage transistors in a cascode configuration uses self-biasing solutions rather than external biasing techniques to overcome transistor breakdown problems. The self-biasing solution ensures that the cascode devices and driver device operate below breakdown voltage limitations. A low resistance circuit is placed in parallel with the self-biased circuitry to mitigate increased on-resistance created by the self-biasing solution. PMOS and NMOS inverter legs provide digital programming of the conduction angle for the power amplifier. Changing the PMOS and NMOS strengths in the chain of inverter legs changes the conduction angle.

Abstract: A fully differential current feedback amplifier suitable for using in a fully differential operational amplifier circuit is disclosed. Symmetrical low input impedance input circuits receive a differential input current and provide a set of four currents that correspond to the differential input currents. These current are input to a pair of subtraction circuits that output a first voltage signal responsive to the positive difference and a second voltage signal responsive to the negative difference. In some embodiments these signals may be further amplified. A common mode circuit is provided that averages the output voltage and feeds back current in response to the subtraction circuits. In this way the average common mode output DC voltage can be set to particular voltage levels.

Abstract: An amplifier includes differential current sensing circuitry and an input bridge. Two paths of the input bridge receive the input signals and provide proportional current flows to the differential current sensing circuitry. The input bridge is configured to provide a differential offset voltage in one current path, and a complimentary voltage drop of equal magnitude in the other current path. In the examples, the input bridge includes a matched pair of transistors. To remove parallel incremental or small-signal conductance-related error sources, both transistors are operated at matched VDS (drain-to-source) voltages. The voltage offset, provided in association with one of the input transistors, serves to extend the range of certain circuits using the amplifier. The complimentary voltage drop in association with the other input transistor maintains the match of the VDS voltages for the two transistors.

Abstract: A differential amplifier circuit with feedback to increase common mode loop gain at low frequencies.

Abstract: An amplifier circuit includes first (7A) and second (7B) operational amplifiers connected in a generally parallel configuration, each with inputs coupled through the same pair of matched input resistors which receive a differential input signal that may have both a positive and negative common mode range. An offset adjustment amplifier (17) receives a differential error signal representative of the difference between offset voltages of the first and second operational amplifiers and generates offset adjustment signals that are applied to input stages of the first and second operational amplifiers to adjust their respective offset voltages so as to equalize them.

Abstract: A differential amplifier and method of using same are disclosed. In one particular exemplary embodiment, the present invention may be realized as a circuit comprising a differential amplifier for receiving a differential input signal and generating a differential output signal, a comparator for generating an adjustment signal based at least in part upon the differential output signal, and a current controller for controlling current steering and at least one offset current in the differential amplifier based at least in part upon the adjustment signal and a current steering variable signal.

Abstract: A differential feedback system that minimizes even order distortion of a differential circuit. The feedback system includes a feedback circuit for use with a differential circuit to reduce even-order distortion and dc offset of a difference output signal produced by the differential circuit. The feedback circuit includes an integrator coupled to receive the difference output signal from the differential circuit and produce an integrator output signal. The feedback circuit also includes a control circuit coupled to the integrator to receive the integrator output signal to produce a control signal that is coupled to the differential circuit, wherein the control signal controls the differential circuit to reduce the even-order distortion and the DC offset.

Abstract: Techniques to provide DC-offset correction in a variable gain amplifier are described.

Abstract: A system and method are used to accelerate settling or steady state of an amplifier in an amplifier system. This is used to ensure the amplifier reaches steady-state within a specified time period from stand-by or another state without using more current than is needed for steady-state. A comparator in a common-mode feedback system compares a desired amplifier output signal to one or more nodes of the amplifier. A result of the comparison is compared to a threshold value using a comparator in a settling acceleration system. If the result crosses the threshold, a controller turns on a driver in the settling acceleration system. The driver pulls on one or more nodes of the amplifier, which, along with a driver in the amplifier system pulling on the node, quickly brings the amplifier to settling or steady state.

Abstract: An amplifier includes an amplification path and multiple offset-compensation feedback paths. The amplification path has multiple amplifier stages, and the feedback paths are coupled to the amplification path. By including multiple feedback paths, such an amplifier can maintain its output DC-offset voltage at a desired level over a full range of amplitudes, i.e., power, of the input signal.

Abstract: A DC offset cancellation device is provided, including a baseband circuit, a common mode feedback (CMFB) circuit, a low-pass filter (LPF), and an amplifier. The CMFB circuit is used to set a specific common mode DC voltage in a differential circuit; thus, the CMFB circuit can be used for detecting the common mode voltage of a differential circuit, and force the voltage to a specific value by using a feedback control. Because the size of a typical CMFB circuit is much smaller than the size of an LPF, the final size of the one-LPF device is smaller than the conventional design using two LPFs.

Abstract: For a high frequency buffer, a high frequency output path may be isolated from a low frequency feedback path using a common mode feedback loop. The common mode feedback loop may be utilized to adjust an output DC level. The common mode feedback loop may comprise a first differential amplifier and a first transistor. An output of the first differential amplifier may be coupled to an input of the first transistor, and the low frequency feedback path may communicate the output DC level from an output of the first transistor to a first input of the first differential amplifier. A reference voltage may be communicated to a second input of the first differential amplifier, and this reference voltage may be variable. The first differential amplifier may be adapted to compare the inputs and generate a control voltage, which may be utilized to adjust the output DC level.

Abstract: An integrated circuit device includes an amplifier stage comprising a pair of transistors (134A, 134B), the respective bases or gates of which are connected together, as well as the respective emitters or sources. The respective drains or collectors of the transistors are capacitively coupled (166) so as to be effectively shorted at the frequencies of operation of the amplifier, A biasing circuit arrangement (144) is also provided which employs bias control feedback to set the bias currents for the transistors. The biasing circuit arrangement takes as its input the current flowing at one of the electrodes (160) of one of the transistors.

Abstract: It is an object of the present invention to provide an output circuit capable of reducing a consumption current while an output current is suppressed in a case where limitation is placed on an output voltage so as not to fall to a predetermined voltage or less in an output circuit the emitter of which is grounded, the base of which serves as an input node for a control current and the collector of which serves as an output node. Provided are a base current supply section for supplying a base current to the output transistor according to an input signal from the outside, and a base current control section for detecting an inter-terminal voltage between the collector and emitter of the output transistor to control a base current supplied from the base current supply section so as not to cause the inter-terminal voltage to fall to a value lower than a predetermined voltage.

Abstract: A common mode feedback circuit is provided that can set a direct voltage operating point of the outputs of an associated amplifier. A feedback path of common mode feedback circuit is configured to be independent from and not pass through the associated amplifier. The common mode feedback circuit can remain powered on during power down of the associated amplifier and maintain a large feedback loop capacitance (in the common mode feedback circuit) at an approximately normal operating voltage to advantageously reduce settling time of an associated amplifier that has been powered off.

Abstract: A differential charge pump includes a first current, a second current, a first switching device, a second switching device, a first phase inverting switching device, a second phase inverting switching device, and a common mode feedback device. The common mode feedback device is used to adjust the current level exported by the first current source, according to the common mode voltage of the differential charge pump, so that the respective currents exported by the first current source and the second current source are to be the same. The present invention has used the property that the common mode voltage of the differential charge pump should be a constant value, so as to correct the level of the current source. As a result, the current exported by the differential charge pump can be precisely corrected. Also, the present invention only needs one charge pump, so that the structure is simple and the fabrication is easy.

Abstract: A read amplifier system for connection through interconnects to a magnetoresistive (MR) head includes two input transistors, two bias transistors connected to the two input transistors by common source connections, a bias voltage control circuit connected to base terminals of the two bias transistors, a common mode voltage control circuit connected between first and base terminals of the input transistors to provide feedback from the first terminals to the base terminals, and a compensating circuit connected between the outputs of the amplifier system and the base terminals of the input transistors for providing a feedback from the outputs to the base terminals. The two base terminals of the input transistors are respectively connected to the interconnects of the MR head. The bias voltage control circuit applies a bias voltage to base terminals of the two bias transistors, and through the common sources to the base terminals of the input transistors, and thereby across the MR head.

Abstract: A method for stabilizing the performance variation of a primary radio frequency (RF) device is provided that includes providing a secondary RF device. An output signal is generated with the secondary RF device. The output signal is provided to a feedback circuit. A feedback signal is generated based on the output signal with the feedback circuit. The feedback signal is provided to the secondary RF device. The output signal is generated based on the feedback signal. The feedback signal is provided to the primary RF device.

Abstract: An apparatus and method for compensating for an analog quadrature modulation (AQM) error in a linearization apparatus for AQM-modulating a digital predistorted signal and outputting the AQM-modulated signal through a high-power amplifier. In the apparatus and method, a gain/phase error estimator predicts a gain/phase imbalance error caused by AQM on the predistorted signal. A Direct Current (DC) offset estimator predicts a DC offset for a feedback signal from the high-power amplifier. An error compensator compensates for the digital predistorted signal for a DC offset signal output from the DC offset estimator, and then compensates for a gain/phase error output from the gain/phase error estimator.

Abstract: A circuit with a common-mode dual output includes a feedback circuit connected to alternate the states of the dual output between an average output level and a desired common-mode level. The difference between the average and desired levels is proportional to a signal offset level. An impedance matching circuit is connected to the feedback circuit to adjust the signal offset level.

Abstract: A common-mode feedback circuit is provided for fully-differential operational amplifier stages of a multistage amplifier. A first stage of the circuit establishes a substantially constant current output level for a feedback generating stage of the circuit. An exemplary embodiment using MOSFET devices illustrates using a diode-connected MOSFET and mirror MOSFET first stage and a generating the current for a common-source connected MOSFET second stage connected to the respective outputs for said fully-differential operational amplifier. An output stage of the circuit provides feedback voltage at a first level when inputs to said fully-differential operational amplifier are in equilibrium and at a second level for balancing said fully-differential operational amplifier when inputs to said fully-differential operational amplifier are not in equilibrium.

Abstract: A common-mode feedback circuit outputs a control voltage to define a common-mode operating point of a fully differential amplifier. The common-mode feedback circuit has a voltage dividing circuit and a differential amplifier. The voltage dividing circuit divides a voltage across two output ends of the fully differential amplifier. The differential amplifier receives an output voltage of the voltage dividing circuit and a reference voltage, and an output voltage of the differential amplifier is supplied as the control voltage to the fully differential amplifier.

Abstract: A feedback system has a settling time that is independent of the forward gain of the amplifier stage, and a feedback path that is responsive to the magnitude of DC offset in the output signal. Settling time may be made independent of the forward gain of the amplifier stage by providing a constant loop gain in the amplifier stage through active gain control of both the forward and linear feedback amplifier elements. The feedback path may be made responsive to the magnitude of DC offset in the output signal by providing a non-linear transconductance in the feedback path that varies the high pass corner and hence the DC offset reduction time of the amplifier stage in response the magnitude of DC offset in the output signal.

Abstract: A system and method are used to accelerate settling or steady state of an amplifier in an amplifier system. This is used to ensure the amplifier reaches steady-state within a specified time period from stand-by or another state without using more current than is needed for steady-state. A comparator in a common-mode feedback system compares a desired amplifier output signal to one or more nodes of the amplifier. A result of the comparison is compared to a threshold value using a comparator in a settling acceleration system. If the result crosses the threshold, a controller turns on a driver in the settling acceleration system. The driver pulls on one or more nodes of the amplifier, which, along with a driver in the amplifier system pulling on the node, quickly brings the amplifier to settling or steady state.

Abstract: A transimpedance amplifier with controllable noise reduction in which DC offsets due to the input signal are tolerated during reception of low input signals by reducing, e.g., terminating, a compensation current to remove a dominant source of thermal noise, but compensated during reception of higher input signals where the effects of DC offsets are more dominant.

Abstract: A differential feedback system that minimizes even order distortion of a differential circuit. The feedback system includes a feedback circuit for use with a differential circuit to reduce even-order distortion and dc offset of a difference output signal produced by the differential circuit. The feedback circuit includes an integrator coupled to receive the difference output signal from the differential circuit and produce an integrator output signal. The feedback circuit also includes a control circuit coupled to the integrator to receive the integrator output signal to produce a control signal that is coupled to the differential circuit, wherein the control signal controls the differential circuit to reduce the even-order distortion and the DC offset.

Abstract: An amplifier circuit. In one embodiment, the amplifier circuit includes an output stage and a gain stage. The gain stage includes first and second differential output terminals that may be coupled to first and second differential input terminals of the output stage. The gain stage includes a first feedback loop and a second feedback loop. First and second half-stages within the gain stage may be coupled to provide the second feedback loop. The first half-stage may be coupled to control a first output current at the first output terminal of the gain stage, while the second-half-stage may be coupled to control a second output current at the second output terminal of the gain stage.

Abstract: A self-biasing differential buffer generates a self-bias voltage from its inputs. A first amplifier receives a first input signal on gates of four transistors—p and n-channel drive transistors in a drive branch and p and n-channel bias-generating transistors in a bias-generating branch. Current source and current sink transistors source and sink current to both branches. The drains of the drive transistors drive a differential output, while the drains of the bias-generating transistors drive through a transmission gate to a self-bias node. The second amplifier receives the second input signal and has the same structure, with one branch driving the self-bias voltage through another transmission gate, and another branch driving a complementary differential output. The bias-generating branches use smaller transistors so that only a small current is used to generate the self-bias voltage. The self-bias node is fed to the gates of current source and sink transistors.

Abstract: A high voltage operational amplifier input stage utilizes a pair of low voltage p-type MOSFET input devices configured to operate at a common mode voltage. The input stage operates between positive and negative voltage supply rails. Common mode bipolar transistor feedback loops force drains of the MOSFETs to track corresponding source potentials. MOSFET substrate connections are maintained at a predetermined level above (or below, depending on the power supply sensing arrangement) the common mode voltage of the input stage to ensure power supply sensing capability. The input stage has a common mode range which includes the supply rail potential, and which tolerates a total supply voltage that exceeds the MOSFET breakdown voltage. The effective threshold voltage of the input devices is increased above the nominal threshold value to sustain the linear operation of the input stage.

Abstract: An operational amplifier comprising an inverting stage transistor that drives current to an output of the operational amplifier through a current path, and an auxiliary transistor that adds transient current to the current path and which remains dormant under steady-state conditions.

Abstract: A transmission channel for a subscriber line interface circuit comprises a front end, tip/ring current-sensing transimpedance stage, containing relatively low valued tip and ring sense resistors coupled in circuit with tip and ring paths of a telecommunication wireline pair. The front end transimpedance stage transforms differential tip and ring input currents sensed by the tip and ring sense resistors into a single ended voltage, which is coupled to a transconductance amplifier filter/gain stage. The filter/gain stage is configured to provide a programmable output impedance, and converts the voltage from the current-sensing transimpedance stage into an output transmission voltage for application to a selected one of a current-sense, voltage-feed, or voltage-sense, voltage-feed telecommunication circuit.

Abstract: A fully integrated charge amplifier with DC stabilization includes a first amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal of the first amplifier, a transimpedance amplifier having an input terminal coupled to the output terminal of the first amplifier and an output terminal, and an impedance device coupled between the input terminal of the first amplifier and the output terminal of the second amplifier. The impedance device has a resistance of at least 1 M?.

Abstract: An electronic circuit comprising an amplifier (AMP) for amplifying a binary input signal (Ui) including an input stage coupled to receive the binary input signal (Ui) comprising means for supplying a DC current to the input stage. The means supplies a current having a first (I1) current value to the input stage during a period of time that is approximately equal to the period of time corresponding to a transition phase from a first binary signal value to a second binary signal value. During the remaining time, the means supplies a current having a second (I2) current value which is smaller than the first (I1) current value. By virtue thereof, the electronic circuit only consumes a significant amount of power during a transition phase from the first binary signal value to the second binary signal value. The amplifier (AMP) can be implemented in all kinds of digital circuits, of which the digital voltage range (the difference between the second and the first binary values) must be increased.

Abstract: A voltage setting circuit includes a voltage setting region setting a voltage level corresponding to a maximum value in amplitude of a signal output from an OTA circuit, a voltage setting region setting a voltage level corresponding to a minimum value in amplitude of the signal, and an intermediate voltage setting region setting a voltage intermediate between the voltages set by the above two regions. This intermediate voltage is input to a common mode feedback circuit and in accordance with the intermediate voltage the common mode feedback circuit generates a common mode voltage fed back to the OTA circuit.

Abstract: A transconductance-setting circuit (10, 20) and method. The circuit (10, 20) includes a first transconductor (14) coupled to a reference voltage (Vref) adapted to produce a current output (Ibias). A reference current source (Iref) is coupled to the first, transconductor (14), and a feedback loop (16) is coupled to the first transconductor (14) and the reference current source (Iref). The feedback loop (16) is adapted to reduce error in the current output (2i) and set the transconductance gm of the first transconductor (14) to a value proportional to the ratio of the reference current and the reference voltage. An auxiliary transconductor (22) is coupleable to the first transconductor (14), and control circuitry (30, 40) is adapted to control the coupling of the auxiliary transconductor (22) to the first transconductor (14) based on the current output (2i).

Abstract: Disclosed is a common-mode current feedback circuit 32 and associated systems 39 and methods 49. The circuit 32 has a differential pair of bipolar transistors Q29, Q30 to accept input from the amplifier output voltage nodes Vout−, Vout+. The differential pair of transistors Q29, Q30 are coupled to a current comparator 32. The current comparator 34 is adapted to provide stabilizing current Ictrl in response to detection of a differential in amplifier output voltages Vout−, Vout+.

Abstract: Techniques for performing frequency compensation of common-mode feedback loops for differential amplifiers are disclosed.