Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.

Abstract: An audio signal amplifier circuit includes an external output terminal of an IC to which an output line of a power amplifier circuit is connected, a first resistor connected between a certain terminal of the IC other than the external output terminal and a feedback input of a differential amplifier circuit, a first capacitor connected between the external output terminal and a loud speaker, a second capacitor between the certain terminal of the IC and a wiring line between the external output terminal and the loud speaker, a filter circuit provided on a signal input side of the differential amplifier circuit and including a second resistor and a third capacitor for attenuating signal components having frequencies in a middle and high frequency ranges and voltage follower means provided between an input stage and an output stage of the audio signal amplifier circuit, wherein the first capacitor is a small capacitor having a capacitance value in the order of 30 &mgr;F or smaller and an attenuation characteristi

Abstract: A transconductance power amplifier for amplifying a signal to a capacitive load, including a first N-channel enhancement MOSFET transistor operatively arranged to source current to the capacitive load, wherein the first N-channel MOSFET transistor has a threshold gate to source voltage, a second N-channel enhancement MOSFET transistor operatively arranged to sink current to the capacitive load, an operational amplifier operatively arranged to transmit and amplify an input signal to both of the first and second MOSFET transistors, and, means for biasing the first N-channel enhancement MOSFET transistor such that its gate to source voltage is always at or above its threshold when the load draws near zero current so that very little additional gate charge is required to turn it on more fully.

Abstract: A source drive amplifier has a first input circuit controlled by a polarity switching signal for being switched into an NMOS differential amplifying circuit or a bias circuit, and a second input circuit controlled by a polarity switching signal for being switched into a bias circuit or a PMOS differential amplifying circuit. The output of the first input circuit switched into an NMOS differential amplifying circuit drives the PMOS transistor of an output transistor pair for being used as a source out amplifying output stage, and a current provided by the NMOS transistor is used as a bias. The output of the second output circuit switched into a PMOS differential amplifying circuit drives the NMOS transistor of the output transistor pair for being used as a sink in amplifying output stage, and a current provided by the PMOS transistor is used as a bias.

Abstract: An op amp includes a pair of buffer amplifiers interposed between the current switch and the output transistors in an output stage based on the Monticelli architecture. The buffer amps buffer the output transistors' gate capacitances, thereby allowing the output transistors to be nearly any desired size without adversely affecting the op amp's dynamic performance. This enables the op amp's compensation capacitors to set the amplifier's bandwidth, and allows the secondary pole to be at a higher frequency. The buffer amplifiers can also provide gain which effectively multiplies the transconductance of the output transistors and further extends out the secondary pole location. In addition, the buffer amplifiers can be used to provide voltage level translation between the current switch and output transistors, which can provide additional headroom for the op amp's gain stage.

Abstract: A push pull amplifier is disclosed having upper and lower output devices operating in a mode in which the devices drive a load alternately. The amplifier includes bias means for providing a bias current to the output devices at all times. The bias means is incorporated in a feedback loop and is arranged such that transitions from load current to minimum bias current in the upper and lower output devices are sufficiently gradual so that harmonic frequencies generated by the transitions are within the capability of the amplifier under all signal conditions. The feedback loop includes a non-linear transform circuit for each upper and lower output device to prevent the bias current reducing to zero. The feedback loop also includes a linearity control circuit for controlling the harmonic frequencies in the upper and lower output devices.

Abstract: A microphone bias current detection circuit includes: a microphone circuit 18; an amplifier 10 having a first output and a second output, the first output is coupled to the microphone circuit 18 for providing a bias current to the microphone circuit 18, the second output provides a sampled current Is proportional to the bias current; a first switch 30 having a first end coupled to the second output of the amplifier 10; a resistor 38 having a first end coupled to a second end of the first switch 30; and a second switch 32 coupled between the first end of the resistor 38 and a reference current source.

Abstract: A push pull amplifier is disclosed having upper and lower output devices operating in a mode in which the devices drive a load alternately. The amplifier includes bias means for providing a bias current to the output devices at all times. The bias means is incorporated in a feedback loop and is arranged such that transitions from load current to minimum bias current in the upper and lower output devices are sufficiently gradual so that harmonic frequencies generated by the transitions are within the capability of the amplifier under all signal conditions. The feedback loop includes a non-linear transform circuit for each upper and lower output device to prevent the bias current reducing to zero. The feedback loop also includes a linearity control circuit for controlling the harmonic frequencies in the upper and lower output devices.

Abstract: An amplifier for use in, for example, Public Address Systems to send audio signals over long distances, is of the push-pull type and includes a first and a second switch and an output transformer having a primary winding coupled to the switches and a secondary winding coupled to the output of the push-pull amplifier. The output transformer further includes a further secondary winding coupled to a comparator as a feedback loop.

Abstract: A PWM power amplifier having at least one PCM/PWM converter fed by PCM digital input signals and producing PWM digital output signals, and at least one power amplification final stage of the PWM digital output signals. At least one PCM/PWM converterincludes a counter fed with at least one clock signal produced by a clock generator device and having a digital comparator suitable for comparing the PCM digital input signals of at least one PCM/PWM converter with a digital comparison signal produced by the counter and producing in output the PWM digital signals. The clock generator device includes a pulse generator device and an oscillator; the pulse generator device receives a signal at a frequency that is equal to the frequency of the PCM digital input signals of the at least one PCM/PWM converter and produces in output reset pulses. The reset pulses are sent in input to the oscillator, which produces in output the at least one clock signal.

Abstract: To reduce leakage current from a current source transistor in a charge pump circuit of a PLL circuit, the charge pump circuit is activated according to an up signal or a down signal generated according to whether the phase of a clock output from VCO is faster or slower than that of a reference clock for generating current for charging or discharging an LPF that supplies input to VCO of the disclosed PLL circuit. The charge pump circuit is composed of a first current source transistor for generating current for charging LPF, a first switching transistor for connecting the first current source transistor to a power source according to an up signal, a second current source transistor for generating current for discharging LPF and a second switching transistor for grounding the second current source transistor according to a down signal, and bias is applied to the first and second current source transistors when the charge pump circuit is inactivated.

Abstract: A circuit (41) to provide drive voltages to a voice coil motor (VCM) (50) of a hard disk drive (10) has identical high and low side drivers (42, 44, 46, and 48) connected to the VCM (50). Each driver has an output FET (52) selectively connecting the VCM (50) to a control voltage (58). A Class-AB output pair (54 and 54′) in parallel with the output FETs (52 and 52′) provides continuous and linear Class-AB operation at the output node (60) around the crossover point, while the output FETs (52 and 52′) are kept not conducting. This approach offers extremely low level of crossover harmonic distortion. Each FET of the Class-AB pair (54 and 54′) is connected to a biasing FET (56 and 56′) to provide the desired Class-AB quiescent current. Preferably the output FET (52), quiescent current controlling FET (54), and biasing FET (56) are fully integrated.

Abstract: An audio signal amplifier circuit includes an external output terminal of an IC to which an output line of a power amplifier circuit is connected, a first resistor connected between a certain terminal of the IC other than the external output terminal and a feedback input of a differential amplifier circuit, a first capacitor connected between the external output terminal and a loud speaker, a second capacitor between the certain terminal of the IC and a wiring line between the external output terminal and the loud speaker, a filter circuit provided on a signal input side of the differential amplifier circuit and including a second resistor and a third capacitor for attenuating signal components having frequencies in a middle and high frequency ranges and voltage follower means provided between an input stage and an output stage of the audio signal amplifier circuit, wherein the first capacitor is a small capacitor having a capacitance value in the order of 30 &mgr; F or smaller and an attenuation characterist

Abstract: An output stage for an amplifier AMP includes a first transistor T1 and a second transistor T2 having their main current paths arranged between two power supply terminals VCC and GND, the bias terminal of the first transistor T1 being connected to the output of the amplifier AMP and the bias terminal of the second transistor T2 being connected to the input of the amplifier AMP via a bias circuit BC. The bias circuit includes a detection module intended to signal the instant when the second transistor T2 enters the state of saturation, and an impedance matching module intended, when activated, to attribute a high impedance to the bias terminal of the second transistor T2 when the transistor becomes saturated. The circuit limits the value of a parasitic current injected into the substrate via a parasitic transistor PT2 which appears when the second transistor T2 is saturated.

Abstract: The operation of externally connected output power transistors of a class AB amplifier is controlled without employing any external sensing resistance of the output current by driving an externally connected power transistor through a level shifting buffer and employing a limiting network composed of an integrated transistor driven by the output of a signal amplifying stage and a resistance connected in series with its drain. The buffer stage shifts the level of the driving signal of the external power transistor by a value equal to the threshold voltage of the integrated transistor of the limiting network thus ensuring the turn-off of the external power transistor under quiescent conditions.

Abstract: A driver circuit with pull down npn transistor drives an output voltage signal in response to an input voltage signal, without high-speed pnp transistors. A first npn transistor provides current to the output node when the output node is at a level equal to and less than the level of the input voltage signal less a base-to-emitter junction drop across the first npn transistor. A second npn transistor sinks current from the output node when the output node is at a level greater than the level of the input voltage signal less the base-to-emitter junction drop across the first npn transistor. The second npn transistor is controlled by a level of a control node. When the level of the output node is greater than the level of the input voltage signal less the base-to-emitter junction drop, the first npn transistor is turned off and the level of the control node is charged up by a current source.

Abstract: An active headset providing for reduction of external noise over a given frequency range by means of a microphone which generates an external noise representative signal processed and fed to a loudspeaker to produce an external noise cancellation signal spectrum, wherein a bridge amplifier circuit is interposed between the microphone and the loudspeaker and the gain of the bridge amplifier for peak amplitude of the noise cancellation signal is user adjustable without substantially reducing the breadth of the given frequency range over which noise reduction is effective.

Abstract: A push-pull wideband semiconductor amplifier for use in, for example, a CATV (cable television) system. The amplifier suppresses deterioration of composite second-order (CSO) distortion in output signals. The push-pull wideband amplifier includes: a divider which divides a signal inputted by way of an input terminal into two signals of differing phase, first and second amplifying circuits each of which amplifies the signal divided by the divider, and a combiner which combines the two signals amplified by the first and second amplifying circuits into one signal and outputs the result signal. The node between the first amplifying circuit and the second amplifying circuit is an imaginary ground point having a potential of 0 V from the standpoint of an alternating-current signal. A termination circuit is provided between this imaginary ground, point and ground and absorbs fluctuation in potential generated at the imaginary ground point.

Abstract: An output stage of an amplifier circuit includes: a sinking bipolar circuit 23 for sinking current from an external load; a sourcing transistor 14 for sourcing current to the external load, the sourcing transistor 14 coupled in series with the sinking bipolar circuit 23, a common output node 34 is formed between the sourcing transistor 14 and the sinking bipolar circuit 23; a mirroring transistor 16 coupled to the sourcing transistor 14 such that current in the sourcing transistor 14 approximately mirrors current in the mirroring transistor 16; a current mirror circuit 39 responsive to the mirroring transistor 16 and coupled to control current flow through the sinking bipolar circuit 23; and a translinear bias circuit 48 coupled to the sinking bipolar circuit 23 for maintaining a minimum current in the bipolar circuit 23.

Abstract: An amplifier system includes a constant current unit which produces a constant current in response to a source voltage from a source voltage terminal. An emitter follower unit has a base, an emitter and a collector, an input signal being supplied to the base, the emitter being connected to the constant current unit, the source voltage being supplied to the collector, the emitter follower unit producing an output signal at the emitter in response to the input signal. A current regulating unit regulates the constant current in response to a collector current fed into the collector of the emitter follower unit, so that the constant current is fed from the emitter of the emitter follower unit into the constant current unit.

Abstract: A solid state emulation of vacuum tube amplifiers and more particularly to the emulation of push-pull output stages. This application focuses on the emulation of grid conduction by the output tubes and their non-linear transconductance.

Abstract: A push-pull output circuit includes first and second transistors each having a base coupled to a first conductor coupled to respond to an input signal. An emitter of the first transistor is coupled by a first resistor to a first supply voltage conductor and an emitter of the second transistor is coupled to the first supply voltage conductor. A pull-up circuit is coupled to the collectors of the first and second transistors. An output conductor is coupled to the collector of the second transistor. A third transistor having an emitter connected to the collector of the first transistor and a base and collector of a fourth transistor. A bias current source is coupled to the base of the third and fourth transistors to maintain the collector of the first transistor and the output conductor at substantially equal voltages.

Abstract: A high input impedance common-emitter amplifier stage is disclosed. This amplifier stage utilizes a transistor to buffer the base drive from the input stage of a Darlington circuit. This buffer action increases the input impedance of the common-emitter stage by a factor of beta (.beta.) of the buffering transistor. Various embodiments are disclosed.

Abstract: A frequency compensated circuit includes a frequency compensation component and a negative feedback loop for feeding an output signal to the circuit input terminal. The circuit input terminal also receives a compensation signal from the frequency compensation component. A controlled system provides an output signal to the input terminal. A controlled current is supplied to the controlled system to increase the output voltage and the compensation signal from the compensation component can be substantially lower than it is in the prior art type of systems.

Abstract: A power amplifier is provided, wherein the output of a first transistor supplied with an input signal at the base thereof is supplied to the base of a second transistor, a current proportional to a collector current of the second transistor is supplied to the emitter of the first transistor by a current mirror circuit, a third transistor is provided for outputting an emitter current in accordance with a base-to-emitter voltage of the second transistor, and emitter currents of the second and third transistors, in accordance with an emitter potential level of the first transistor, is used as an output current. This configuration allows non-linear portions in the transistor characteristics to be cancelled by each other, thereby providing a power amplifier which presents a good linearity.

Abstract: A symmetrical amplifier includes a current mirror circuit and a current splitting circuit. The current splitting circuit splits up an input signal applied to the amplifier as a function of the signal polarity. Negative input currents are applied to the current mirror circuit whose controlled output current is applied to a control input of a first current amplifier circuit arranged in the amplifier. In order to insure symmetrical operation of the amplifier, positive input currents flowing into the amplifier are applied to a control input of a second current amplifier circuit arranged in the amplifier. The second current amplifier circuit is the same as the first current amplifier circuit. The first current amplifier circuit is connected to a positive supply voltage and the second current amplifier circuit is connected to a negative power supply voltage, and the two current amplifier circuits operate into a common load at their output ends.

Abstract: The gate of a first source-grounded transistor and the input of a buffer circuit are directly connected to an input terminal of a class-AB push-pull circuit. An input signal directly drives the first source-grounded transistor and is transmitted through the buffer circuit to a voltage-to-current converter and converted into a current signal. On receipt of the current signal, an inverting amplifier develops a voltage of reversed polarity which is applied to the gate of a second source-grounded transistor to drive the second transistor. The drains of the first and second transistors are connected to each other and their connecting point serves as an output terminal of the circuit. A class-AB push-pull drive circuit having such an arrangement requires a significantly reduced input signal voltage and a reduced power supply voltage.

Abstract: A BiCMOS amplifier provides full swing with fast transitions from V.sub.dd to V.sub.ss and from V.sub.ss to V.sub.dd, and therefore has important applications in low voltage BiCMOS VLSI circuits. A bipolar totem pole output transistor pair is connected between a supply voltage, V.sub.dd and ground, V.sub.ss. A fast output transition from V.sub.dd to V.sub.ss is accomplished by extending the conduction range of the pull down bipolar transistor. An n-channel MOSFET is fabricated to provide a 0 V.sub.t pass transistor. The pass transistor is coupled to a first of the bipolar output transistor pair, the pull up transistor, to inject carriers into the base of the output transistor and extend the transistor's conduction, such that the transistor provides a fast output upswing from V.sub.ss to V.sub.dd.

Abstract: According to this invention, a frequency converter comprises a frequency mixer (11) formed in a semiconductor integrated circuit (10), an impedance conversion/signal amplitude limit differential amplifier (12) formed in the semiconductor integrated circuit and connected to the output of the frequency mixer, a first frequency mixing output terminal (14) connected to an output terminal of the frequency mixer and serving as an external terminal of the semiconductor integrated circuit, and a second frequency mixing output terminal (15) connected to an output terminal of the differential amplifier and serving as an external terminal of the semiconductor integrated circuit.

Abstract: A power-amplifier cell which comprises an inverting input amplifier made up of a first transistor (T.sub.1) having a collector connected to a first supply-voltage terminal via a first resistor (R.sub.11), and an output stage comprising a second (T.sub.4) and a third (T.sub.6) transistor whose collector-emitter paths are arranged in series. The common point between the second and third transistors forms an output (5) of the power amplifier. The second transistor (T.sub.4) has its base connected to the collector of the first transistor (T.sub.1) and a control signal is applied to the base of the third transistor (T.sub.6) via a second resistor (R.sub.16). Furthermore, a first capacitor (C.sub.1) is arranged in parallel with the first resistor (R.sub.11) and the control signal is the input signal (E) or a fraction thereof. The power amplifier may comprise two cells whose first transistors (T.sub.1) have their emitters coupled to one another.

Abstract: An amplifier circuit includes a negative feedback connected amplifier and a series circuit comprising a capacitor, one end of which is connected to an output terminal of the amplifier, and a resistor, one end of which is connectable to a reference potential. A comparator is provided which has first and second inputs and one output. The first input is connected to a junction between the capacitor and the resistor, the second input is connected to an output of the amplifier, and the output of the comparator is connected to one input of the amplifier. The comparator does not react to an AC signal of a specific frequency band, but operates to set the output offset voltage only to one fractional part of the transition gain, and therefore operates to accomplish offset compensation without using a large capacitor.

Abstract: A working point adjusting circuit for a power amplifier. When this simple circuit is connected into a Class B transistor power amplifier it adjusts the working point of the transistors in the output circuit of the power amplifier to the linear portion of the current-voltage characteristics of the transistor so the amplifier works in the level of a Class A amplifier. It provides many significant advantages including (1) much higher energy efficiency on output transistors; (2) much less signal distortion on loaded speakers; (3) simple circuitry for increased reliability; and (4) low component count for reduced costs.

Abstract: An amplifier output stage for a loudspeaker includes current sourcing and sinking sections arranged in push-pull and a cascode stage for driving the current section and biasing both the sinking and sourcing sections.

Abstract: A broadband RF amplifier with high efficiency and high reverse isolation having a common emitter stage connected in a cascode configuration to a common base stage, said cascode driving the common base stage in a push-pull operation with a common collector stage.

Abstract: The invention relates to an analog power amplifier (PA), particularly for a closed loop signal amplification requiring high output power, high efficiency, extremely high speed, wide operating temperature range and a low number of components. No thermal compensation, no transistor matching and no adjustments are necessary. Any power transistor switching is eliminated including a high efficiency operation with a multiple level power supply.The input signal of the PA is initially amplified in an input amplifier means which provides a pair of output signals. These signals are separately applied to the bases of a first and third transistors of even conductivity types. The emitter of the first transistor is coupled to the emitter of a second transistor of an opposite conductivity type. The collector, base and emitter respectively of the first, second and third transistors are separately coupled to voltage sources. A fourth transistor coupled in series with the emitter of the third transistor can be employed.

Abstract: The invention relates to an operational amplifier, particularly for signal amplification requiring high accuracy and extremely high speed which includes bandwidth, slew rate and settling time. A current feedback can be implemented with a low impedance inverting input for an increased high frequency performance. The operational amplifier according to the present invention has an input stage providing a pair of output signals, thus preserving a differential nature of the input signal of the operational amplifier. A power amplifier means is coupled to the input stage for amplifying and converting the output signals thereof into a single output signal. A very high open loop gain and save phase margin are obtained with a low number of amplification stages as the input stage has inherently a high voltage gain and the output signals thereof are amplified separately, whereby the common base configuration is preferred.

Abstract: A push-pull, small signal amplifier arrangement, which employs Metal Oxide Semiconductor/Field Effect Transistors. Depletion type are employed in the first stage, while enhanced type are employed in the second stage. The two stages are directly connected together and means for controlling the gain of both stages simultaneously are included. Also disclosed are a number of configurations for various applications.

Abstract: Apparatus and method for driving a non-centertapped load such as a loudspeaker from a low voltage supply such as a single dry cell, with increased efficiency. A push-pull signal having similar polarity voltage excursions is applied to opposite terminals of the load. Alternate individual terminals of the load which are opposite to the terminals to which the non-idle phases of the push-pull signal are alternately applied are connected to a common terminal via a pair of transistors. The pair of transistors are driven by an amplified representation of the push-pull input signal. Since pulse signals are not used to drive the pair of transistors, capacitors need not be used to eliminate switching transients which would otherwise appear, and increased efficiency results.

Abstract: A circuit for a selective push-pull amplifier having amplifier triple poles of the same polarity which simultaneously produces high efficiency and low nonlinear distortions. The circuit has control electrodes controlled by out-of-phase control voltages and an output inductance having a center tap which produces a magnetic combination of output currents of the amplifier triple poles. The output electrodes of each triple pole is connected to an output inductance through a transformer having three windings. Two oppositely polarity windings connect the output of the triple poles to the output inductance while the third winding is connected to provide a series resonant circuit.

Abstract: Audio power amplifier in which dynamic power output can be increased without increasing continuous power output. The apparatus includes an amplifying means for receiving an input signal and for producing an amplified output signal, first means for supplying a first, relatively low supply voltage to the amplifying means, second means for supplying a second, relatively high supply voltage to the amplifying means, and control means for supplying the first supply voltage to the amplifying means when the level of the amplified output signal is less than the first supply voltage and for supplying the second supply voltage to the amplifying means when the level of the output signal exceeds the first supply voltage. The invention thus provides an amplifier apparatus having relatively low power dissipation and high efficiency and that will avoid any output signal clipping that will distort the output signal.

Abstract: A superconducting quantum interference device (SQUID) is direct current biased through physical connections asymmetric to, and preferably maximally asymmetric to, the two Josephson junctions. The asymmetric SQUID so created is, responsively to such physical asymmetry, biased for operation in the linear region of the input magnetic flux/output (voltage or current) device response curve. A resistance of specified value is connected in parallel, or shunt, to the parasitic bridge capacitance of the asymmetric SQUID in order to minimize hysteresis. Two asymmetric SQUIDS of opposite asymmetry are serially connected as a push-pull linear amplifier stage which exhibits zero output (voltage or current) at zero input magnetic flux, and which is specifiable in parameters of construction so as to exhibit optimum linearity of response about such point.

Abstract: A wide-band direct-coupled transistor amplifier exhibits greatly improved settling time characteristics as the result of circuitry permitting the use of current feedback rather than voltage feedback in order to reduce the sensitivity of settling time and bandwidth to feedback elements without thereby affecting the manner in which feedback is applied externally by the user, reducing the sensitivity of settling time to the effects of temperature, eliminating saturation and turn-off problems within the amplifier that are related to bias control, to large input signals, and to high frequency input signals or those having fast rise times, and minimizing the sensitivity of settling time to power supply voltages.

Abstract: An electronic circuit for a high impedance probe for an instrument for measuring electrical voltages, comprising an input field effect transistor 15 connected in a source-follower configuration, a bipolar transistor 17 connected in an emitter-follower configuration and controlled by the transistor 15, a current source 18 serving as a load for the transistor 17, an amplifier 19 having a gain G which is slightly less than unity, the input of the amplifier being controlled by the transistor 15, and finally a resistor 20 which serves as a load for the transistor 15 and which connects the source of the transistor 15 to the output 8 of the amplifier 19, said output also serving as the output of the circuit, which is supplied by a voltage source applied between the current source 18 and the collector of the transistor 17. By virtue of the amplifier 19, the effective load resistance seen by the transistor 15 is R.sub.20 /(1-G), R.sub.20 being the value of the resistor 20.

Abstract: A push-pull power amplifier with quiescent current regulator, in particular for low-frequency power amplifiers of high quality in which the quiescent current or currents of the output transistors is or are sampled at a predetermined output voltage and/or in a predetermined output voltage range of the amplifier, their values coded in one or more comparators and in one or more storage elements the corresponding values with which the desired values of the quiescent current or currents can be corrected or held are stored.

Abstract: A power amplifier includes a class A power amplifier and a class B power amplifier driven by the same input signal. The class A amplifier includes a pair of load driving power amplifying elements, and a further pair of amplifying elements serves to drive the power amplifying elements. To obtain good operating characteristics and reduce distortion, the further pair of elements are powered by power supplies for the class B amplifier.

Abstract: The present invention purports to provide a novel B-class complementary circuit of direct-coupling type having good characteristics of low dispersions of voltage gain and low temperature dependency. The apparatus of the present invention can perform the above-mentioned excellent characteristics by utilizing several current-mirror circuits in a direct coupled circuit which comprisesan output stage driving circuit,a B-class complementary connected output stage, anda bias-stabilization circuit, formed as a differential amplifier working as a pre-drive stage for driving the output stage driving circuit; andby utilizing further current-mirror circuits for constant current feeding to a load circuit of the driving circuit and for the bias stabilizing circuit.

Abstract: Circuitry is provided for simulating a combination of vacuum tube clipping and soft cross-over characteristics in a transistor power amplifier circuit. A first circuit includes a biasing network for assuring that the transistor amplifier saturates in response to high level input signals. A second circuit includes a biasing network for providing sufficient bias current to maintain the transistor in an active, rather than cutoff, operating region when the first circuit fails to provide the needed bias at times when the instantaneous input signal level is low but average or peak input levels are high. A combining circuit provides the higher of the bias values to the amplifier, to assure that the amplifier saturates for particular high level inputs yet operates at a modified, linear mode for low level inputs, thus simulating a compression characteristic of vacuum tube amplifiers.

Abstract: A two signal amplifying system is constructed of first and second BTL amplifiers each including a phase splitter and first and second push-pull output circuits. In each of the first and second push-pull output circuits, output transistors are connected between a power source and output terminals, and detectors for detecting the operating states of said transistors are connected with the output transistors constituting the aforementioned first and second push-pull output circuits, respectively. The outputs of those two detectors are fed to a control circuit. The output of the control circuit renders the two output transistors nonconductive in case at least one of the two output transistors deviates from a predetermined operating range.

Abstract: In an operational amplifier, the output of the differential first stage is applied directly to the base electrode of a voltage gain transistor which in turn drives the remainder of the operational amplifier output stage. A pair of junction field-effect-transistors in conjunction with a diode and a current mirror circuit are employed to set the quiescent voltage at the circuit output. Both pull-up and pull-down transistors are employed to achieve the correct output in response to an input at the base of the voltage gain transistor.

Abstract: An input signal is applied to the inverting input of a class B amplifier and to the input of a limiter circuit. The square wave signal from the limiter is applied to the input of a switching amplifier which drives this amplifier between V and ground at the switching rate established by the input signal; thereby, obtaining a power control signal. The power control signal is applied to one terminal of a load and to the non-inverting input of said class B amplifier. Ignoring the input signal to the amplifier, this switches the output of the class B amplifier between V and ground at the same rate and in phase with the output from the switching amplifier. The gain of the input signal path in the amplifier is such that the input signal will just drive the output between V and ground. The switching action of the power control signal in combination with the input signal then causes the output signal across the load to have the same characteristic as the input signal but with a peak-to-peak amplitude of 2V.