Abstract: An RF buffer (10) supplies a single ended output signal and differential output signals. An average voltage of the differential output signals is compared to a reference voltage (VR) by an amplifier (40). The amplifier (40) provides a feedback signal for controlling the bias current conducted by a first transistor (24) and a mirrored bias current conducted by a second transistor (46). The bias currents conducted by the first and second transistors (24, 46) are used to generate the differential output signals (OUT-, OUT+) and are substantially independent of the signal level at an input terminal (20). The signal current conducted by the first transistor (24) controls an output transistor (66), while the signal current conducted by the second transistor (46) controls another output transistor (56) in the push-pull output stage of the RF buffer (10).

Abstract: A load short-circuit protective circuit device having broad protective operation range and capable of maintaining protective operation until short-circuit of output transistors is released (reset) without using thyristor circuit has an output transistor for generating power amplified signal, detection circuit for detecting a collector current and a collector voltage of the output transistor; and a protective operation circuit for performing protective operation for the output transistor when the current detected by the detection circuit reach predetermined current value and the voltage detected by the detection circuit enters within a set value range.

Abstract: A parallel push-pull amplifier using a complementary device, which basically operates for a B or AB-level amplification while having a common source configuration, thereby being capable of amplifying the full wave of an input signal without any distortion while obtaining a high gain at a radio frequency. The complementary device consists of an active element for amplifying a half wave of an input signal and a complementary active element for amplifying the other half wave of the input signal. The complementary active element has a duality with respect to the active element. The amplifier also includes bias circuits adapted to set respective operating points of the active and complementary active elements. Where the active and complementary active elements constitute a CMOS device, they are connected together in the form of a push-pull connection using a common source type configuration.

Abstract: A complementary class AB current mirror circuit with a constant current gain which, when driven by a transconductance amplifier, provides a constant overall voltage gain over a wide range of output current. Such current mirror circuit includes cross-coupled pairs of current mirror circuits, both of which are driven by a common reference current and each of which selectively receives a respective portion of the input signal current. The upper pair of current mirror circuits includes: an input current mirror circuit which generates a drive current for the output stage of the lower pair of current mirror circuits; and an output current mirror circuit which generates the source, or "push," portion of the output signal current.

Abstract: A CMOS output stage for providing stable quiescent current. The output stage includes a circuit that relates the quiescent current to the channel geometry of a power NMOS transistor and of an NMOS reference transistor of a reference current source. This configuration removes the dependency of the quiescent current on a power PMOS transistor used in the CMOS output stage, the threshold voltage of which may drift over time under high current and voltage operation, and adversely affects quiescent current stability.

Abstract: A semiconductor device capable of maintaining good temperature compensation and reducing manufacture costs of SEPP connecting NPN and PNP power transistors and temperature compensating and biasing circuits. A first semiconductor device has an ordinary bias diode formed on the same semiconductor substrate as an NPN power transistor. A second semiconductor device has one or a plurality of Schottky barrier type diodes formed on the same semiconductor substrate as a PNP power transistor. The forward voltage drop V.sub.1 of the diode is set to an arbitrary constant value smaller than E exclusive of about E/2, and the total forward voltage drop V.sub.2 of the Schottky barrier diode or diodes is set to a predetermined value of about (E-V.sub.1), where E is a total forward voltage drop between the bases and emitters of the NPN and PNP power transistors.

Abstract: A two-terminal paired circuit is disclosed which comprises two sets of differential pairs wherein a first set of the differential pair includes two transistors collectors of which are connected to a pair of input terminals and to a bias circuit serving also as a DC shift, bases of which are connected to the bias circuit to apply a voltage feedback from the collectors to the bases and emitters of which are connected to a constant current source and have an impedance element connected therebetween, a second set of the differential pair includes two transistors collectors of which are connected to a pair of output terminals and to a bias circuit serving also as a DC shift, bases of which are connected to the bias circuit to apply a voltage feedback from the collectors to the bases and emitters of which are connected to a constant current source and have an impedance element connected therebetween, and the voltage feedbacks together with the two sets of differential pairs are applied symmetrical with respect to l

Abstract: The bandwidth of a bipolar complementary emitter follower unity gain buffer is proportionally dependent upon the idle current of the input stage (Q1, Q2) that drives the base nodes of the NPN (Q3) and PNP (Q4) emitter follower output transistors. A high bandwidth typically requires a high idle current. The bandwidth and slew rate of a unity gain buffer are improved without increasing the idle circuit by adding a circuit (Q9-Q12)to sense when a transient is occurring and increasing the positive or negative bias current only during the positive or negative transient. Shunt diodes (Q5, Q6) (base-emitter junctions) can be added across the input transistor emitters to shunt some of the input stage idle current into the opposing current source. This will reduce the idle current at the output stage and reduce the power dissipation of the input stage without sacrificing the available current to drive the base nodes of the output transistors.

Abstract: When first and fourth output transistors (15) and (18) are turned on, the voltage at the connecting point between the first and second driving transistors (19) and (20) drops. When second and third output transistors (16) and (17) are turned on, the voltage at the connecting point between third and fourth driving transistors (21) and (22) drops. As a result, voltage differences between the collectors and emitters of the first and second input transistors (2), (3) and the first and second current source transistors (13) and (14) increase so that saturation of the first and second current source transistors (13) and (14) can be prevented. Since a resistor is connected between a connecting point between upper and lower output transistors and a connecting point between upper and lower driving transistors having inverted phases from the former two transistors, current is limited and oscillation can be prevented.

Abstract: A gain stage is disclosed for use in an amplifier which provides an output signal. The gain stage includes a first transistor including a base, an emitter and a collector. The base is coupled to an input signal applied to the gain stage, and the emitter is coupled to a first source of operating potential. The gain stage also includes a second transistor including a base, an emitter and a collector. The collector of the second transistor is coupled to the collector of the first transistor for providing the output signal. The emitter of the second transistor is coupled to a second source of operating potential. The gain stage also includes a level shifter coupled to both the input signal and the base of the second transistor. The level shifter provides level shifting and produces a gain signal responsive to the input signal.

Abstract: A novel amplifier circuit having a wide output signal amplitude range and a small current consumption is disclosed. A signal conversion circuit converts the input signal thereof into a first current signal. A current calculation circuit calculates the difference between a predetermined current value and the first current signal. A current amplifier circuit amplifies the difference current. Since the difference current calculated by the current calculation circuit is amplified, the dynamic range of the output can be widened with a small current flowing in the signal conversion circuit and the current calculation circuit. Further, this amplifier circuit, if designed to supply no output current under no load, can reduce the current consumption since the only steady current that flows under that condition is the small one flowing in the signal conversion circuit and the current calculation circuit.

Abstract: A low distortion amplifier and method of reducing distortion in an amplifier at high output power in which energy dissipated while the amplifier is operating at low output power, is reduced. A bias circuit provides a quiescent bias current to the input stage of the amplifier for operating the amplifier without substantial distortion at low input signal levels and low output power. A sense transistor senses a current less than and proportional to an output current from the amplifier, and feeds back the sensed current to the input stage to augment the quiescent bias current when output power increases. When the output power decreases, the sensed current is removed in order to maintain the low power output bias currents.

Abstract: An output stage driver circuit comprising two parallel class AB stages running at slightly different quiescent currents, the difference of which is scaled up through a current mirror is disclosed which provides a temperature stable precisely controlled quiescent current for the output stage. A current limited voltage source is provided to ensure inherent short circuit protection with instantaneous response to short circuit or excessive load current conditions.

Abstract: A bipolar operational amplifier circuit includes: a differential pair having a first transistor Q.sub.1 and a second transistor Q.sub.2 ; a third transistor Q.sub.6 having a first node coupled to a first node of the first transistor Q.sub.1 ; a fourth transistor Q.sub.9 having a first node coupled to a first node of the second transistor Q.sub.2 ; a fifth transistor Q.sub.8 having a first node coupled to the first transistor Q.sub.1 ; a sixth transistor Q.sub.11 having a first node coupled to the second transistor Q.sub.2 ; a current mirror 20 having a first branch coupled to a second node of the fifth transistor Q.sub.8 and a second branch coupled to a second node of the sixth transistor Q.sub.11 ; a seventh transistor Q.sub.27 having a base coupled to the first branch of the current mirror 20; an eighth transistor Q.sub.28 having a base coupled to the third transistor Q.sub.6 ; a ninth transistor Q.sub.20 having a first node coupled to a first node of the seventh transistor Q.sub.

Abstract: An amplifier providing the linear output of a Class A amplifier and the expanded peak current output and efficiency of a Class AB amplifier. The amplifier includes an input amplifier, a voltage regulator network, a cascode stage, and an output amplifier. The input amplifier amplifies a signal current into two outputs. The cascode stage and the output stage each contain two paths for the amplified outputs. The voltage regulator network interconnects the two paths between the input amplifier and the cascode stage. The voltage regulator network bypasses a high percentage of the quiescent current that is normally contained in the two paths of the cascode stage and the output amplifier stage, thus improving the peak-to-quiescent current output ratio beyond the 2:1 value of traditional Class A amplifiers.

Abstract: A linear power amplifier having a pulse density modulated switching power supply including a power supply providing at least a relatively high DC voltage output; a voltage amplifier connected to an external signal source to amplify a relatively low voltage signal received from the external signal source into a relatively high voltage signal; a current amplifier connected to the voltage amplifier to increase the current flow associated with the relatively high voltage signal, as needed, in order to properly drive a load, wherein the current amplifier is powered by a pulse generator. The pulse generator is connected to a first line carrying the relatively high voltage signal to the load, and to a second line supplying power to the current amplifier.

Abstract: This invention is for an improvement in amplifiers resulting in ultra low distortion.

Abstract: An amplifier in which a clamping circuit is an integral part of the output stage structure is used as a voice coil driver for positioning the heads of a memory disk drive. The output stage, operating in class AB, comprises two bipolar transistors, the source and the sink transistors, serially connected between a power supply and a ground terminal, the serial connection between the emitter of the first transistor and the collector of the second transistor being the output terminal of the output stage. The base terminals of the two output transistors are connected to a bias circuit and to an input transistor, used as the signal control element. The clamping circuit is directly connected with the base terminals of the output transistors to limit the voltage on said base terminals between a first and a second voltage reference.

Abstract: Low quiescent power, high output power, rail-to-rail output stage circuits and methods are provided. The output stages are capable of providing output voltages that are substantially equal to the supply voltages (i.e., within one V.sub.CE SAT of both supply voltages) without a substantial increase in output circuit complexity and without a substantial increase in quiescent current. The output stages operate by providing a direct path for the drive signal to the output sinking transistor, and an additional, separate path for the drive signal to the output sourcing transistor. The sinking and sourcing paths are separated by a PNP transistor that gradually turns off during sinking to isolate that portion of the circuit so that the drive current to the sinking transistor is not reduced. Additional embodiments are provided where additional components are utilized to further increase the maximum sink and source currents without a significant increase in quiescent current or reduction in output swing.

Abstract: The present invention provides a BTL amplifier device with low power consumption and high efficiency which comprises two units of amplifier, a transistor, and a load resistor, and is driven as claimed in output from an operational amplifier as well as from an inverting amplifier. Signals at both edges of the load resistor are supplied to a differential NFB circuit and a fed-back output is inputted to one of the operational amplifiers, while an output signal from the operational amplifier is converted by an absolute value circuit, and then a DC voltage is superimposed on the absolute value signal in a voltage shifting circuit.

Abstract: An improved power amplifier having complimentary power transistors connected in push-pull arrangement, and having a bias voltage source coupled to the transistors for generating a transverse idling current flowing through the complimentary pair of transistors. A regulating, feedback control circuit has a set point input and inputs connected to precision resistors connected to detect the current through the power transistors and the output current. Analog arithmetic computing circuits continuously compute the instantaneous difference between the detected transverse idling current through the power transistors and the set point input for the idling current. The output of the controller circuit is connected to the bias voltage sources to vary the bias voltage in proportion to the instantaneous difference between the detected transverse idling current and the set value of idling current to maintain a constant, transverse idling current.

Abstract: The amplifier (200) includes an input stage (220) coupled to two output transistors (281, 282) having a common terminal at the output terminal (206) of the amplifier. Class AB operation of the output transistors (281, 282) is possible at a comparatively low supply voltage. In order to obtain such operation, measurement transistors (271, 272) are coupled to the same control input (283, 284) as the output transistors (281, 282). These measurement transistors (271, 272) are serially coupled to a current mirror (260). The quiescent current of the output transistors (281, 282) is measured and used to produce a feedback signal which is superimposed to the control signals.

Abstract: A power amplifier arrangement for amplifying audio signals to be applied to a number of speakers has a plurality of power amplifiers. A level detector detects a level of a peak value of outputs from the power amplifiers, and produces a control signal when the positive peak value exceeds a predetermined positive level. Two power sources are provided for providing a high voltage power and low voltage power to the speakers. A power transistor turns on in response to the presence of the control signal to provide the high voltage power to the speaker, but turns off in response to the absence of the control signal to provide the low voltage power to the speaker. A temperature detector detects a temperature of the power transistor and produces a disabling signal when the detected temperature is greater than a predetermined temperature to disable the power transistor by switching transistor.

Abstract: Three state high speed amplifiers having a high output impedance when disabled and a minimum glitch when enabled and disabled. The amplifiers utilize complementary emitter followers for the output stage. When the amplifiers are disabled, circuitry provided for the purpose drives is responsive to the voltage on the output of the amplifier to maintain the base-emitter voltages of the output emitter followers at a substantially constant level below the turn-on voltages of the transistors, such as substantially zero volts. When the amplifier is enabled, the circuitry is also responsive to the voltage on the output of the amplifier, but this time to allow the base-emitter voltages of the output emitter followers to at least freely rise to the turn-on voltages of the transistors.

Abstract: Low voltage operational amplifier (10) operates in a voltage range of one to eight volts over a temperature range of 0.degree. to 70.degree. centigrade. Op amp input stage (12) uses N-channel depletion-mode MOSFETs to provide amplification of the differential input and maintain constant transconductance. Source follower MOSFET (13) provides unity gain in transferring the AC signal, STAGE-1 OUTPUT, to the base of current sinking transistor (18). Sink control circuit (14) and source control circuit (22) generate the base drive currents for in transistors (18) and (24). The signal at the output of MOSFET (13) either causes the sink transistor (18) to sink current or the signal to be transposed by means of a translinear loop (16) and causes the source transistor (24) to source current.

Abstract: An audio power management system for a computer to eliminate noise signals associated with the power-down and power-up operations of the computer during power management operations. The audio power management system asserts a speaker mute signal before power is removed from the amplifier to reduce transient conditions. During power up, the speaker mute signal is applied to the amplifier for a period after power is applied to the amplifier. This control is done from a single digital output.

Abstract: Circuits and methods to minimize total harmonic distortion in an integrated circuit feedback amplifier. Complementary transistors in the signal path are selected so that their base-to-collector capacitances are matched. Additionally, the DC operating currents of such transistors are matched, thereby cancelling non-linearities due to base-to-collector capacitances.

Abstract: A complementary Class AB output stage including a Class AB complementary common emitter quiescently biased by means of current mirrors and a Class AB complementary emitter follower circuit having its emitters connected to the common emitter stage outputs and its collectors connected to the base terminals of the common emitter transistors thus achieving large output swing and large output drive current with very low quiescent current in the common emitter portion of the circuit.

Abstract: An audio amplifier, particularly suited for automotive applications, providing improved isolation between the preamplifier section and the power amplifier section. The preamplifier section ground is isolated from the power amplifier section ground. The amplifier includes a voltage regulator with output feedback for supplying a regulated voltage to the preamplifier section. The voltage regulator is referenced to the preamplifier section ground.

Abstract: An electroacoustic device such as a hearing aid having a battery, microphone, speaker, a preamplifier, a voltage regulator and power amplifier. The power amplifier includes identically configured output and bridge stages connected to opposite sides of the speaker, the output signals from the output stage being connected through a blocking capacitor to the input of the bridge stage. The output/bridge stage circuit includes an interface stage and two current gain stages. The interface stage converts voltage signals to current signals with a pair of outputs respectively connected to the two like-configured current gain stages. Each current gain stage includes two successive sections, each having a pair of transistors, one of which is configured as a diode connected in series with a resistor to shunt current from the base of the other transistor.

Abstract: A high gain common-emitter output stage for an amplifier is disclosed. In one embodiment, an output stage for an amplifier circuit according to the invention includes: a first transistor having a base, an emitter and a collector, the emitter being connected to a first potential through a first resistor, the collector being connected to a second potential through a series connection of a second resistor and a bias current source, the base being connected between the second resistor and the bias current; a second transistor having a base, an emitter and a collector, the emitter being connected to the first potential, the collector being connected to the second potential through a load element, the base being connected to the collector of said first transistor; and a signal current source for supplying a current signal to be amplified. The output stage according to the invention is advantageous because the gain provided is exponential, yet the bias condition remains stable.

Abstract: A rail-to-rail driver amplifier circuit that utilizes complementary output transistors to fully utilize the available power supply voltage. The circuit includes an input pre-amplifying circuit for receiving the audio signal and for receiving electrical energy from a power supply having a first rail at a positive potential and a second rail at a negative potential to produce a pre-amplified output signal. The circuit further includes a first output driver circuit having a voltage gain limited current amplifier coupled to the first rail and to a first output terminal of the input pre-amplifying circuit and a second output driver circuit having a voltage gain limited current amplifier coupled to the second rail and to a second output terminal of the input pre-amplifying circuit.

Abstract: A current sourcing output stage for a high voltage operational amplifier receives a low voltage input signal (V.sub.IN) and provides a high current output signal corresponding to the low voltage input signal at an output terminal (8). A first PNP transistor (Q1) is coupled between a voltage supply (V.sub.CC) and a plurality of cascaded PNP transistors (Q2, Q3, Q8-Q11) coupled to the output terminal (8). The base of the first PNP transistor (Q1) is coupled to receive the input signal (V.sub.IN) and the bases of the cascaded PNP transistors are coupled to receive different bias voltages A control circuit (Q5-Q7, R1-R5) is coupled to the voltage supply (V.sub.

Abstract: The present invention provides an operational amplifier circuit which comprises an input circuit for outputting a difference between first and second input voltages, an amplifier circuit for amplifying the difference, a drive circuit for driving a latter stage in response to output from the amplifier circuit and an output circuit which constitutes the latter stage, wherein the amplifying circuit has a serial circuit composed of a first constant current source and a first transistor and a serial circuit composed of a second constant current source and a second transistor, the emitter of the first transistor is connected to the base of the second transistor, and the difference is applied to the base of the first transistor; the drive circuit has a serial circuit composed of third and fourth transistors whose collectors and emitters are interconnected and a third constant current source, the base and collector of the fourth transistor are interconnected, and the base of the third transistor is connected to the e

Abstract: The invention is an amplifier such as an operational amplifier having an output stage with a reduced quiescent current control transistor device area that provides sufficient quiescent current control for proper operation thereof. The output stage includes a current diverter or diverting arrangement whereby current flowing to the quiescent current control transistor area is reduced by diversion without jeopardizing the proper operation of the operational amplifier. In this manner, the relative size of the quiescent current control transistors can be significantly reduced without sacrificing any of the overall performance of the amplifier.

Abstract: An output circuit, for minimizing output idle current fluctuations and improve the output voltage range, has first and second transistors connected to first and second power sources, with a plurality of diodes connected to control terminals of the first and second transistors. The output circuit further includes a third transistor having a first terminal connected to the second power source and a second terminal connected to a predetermined position among the plurality of diodes. A predetermined voltage is applied from the diodes to the control terminal of the first transistor when the third transistor is saturated, to bring a level of an output of said output circuit close to a level of the second power source. A fourth transistor, a fifth transistor, a first resistor, and a capacitor are also provided.

Abstract: A class AB low voltage output stage with improved current drive capability where the signal input to the stage modulates the base drive currents of both an output transistor sourcing current to a load and an output transistor sinking current from the load. Coupling the base drive currents by means of the input amplifier permits higher drive currents to be obtained for the output transistors without increasing the quiescent current of the circuit.

Abstract: An output stage (418) for an operational amplifier (403) powered by a first supply voltage rail (102) and a second supply voltage rail (104) includes a buffer (100) and a current booster (500) for amplifying an input voltage (105) into a low impedance output signal (117 and 520). The buffer (100) amplifies the input voltage (105) into the amplified output signal (117 and 520) when the input voltage (105) is within a buffer voltage range (210), the buffer voltage range (210) contained within a maximum voltage range (208) defined by a voltage difference in the first supply voltage rail (102) and the second supply voltage rail (104). The current booster (500) assists the buffer (100) in amplifying the input voltage (105) into the output signal (117 and 520) when the input voltage (105) is outside of the buffer voltage range (210) but within the maximum voltage range (208).

Abstract: Electronic circuit comprising at least one first second-generation current conveyer consisting of a mixed translinear loop and a plurality of current mirrors. The conveyer includes a high impedance reference port, an input port with an intrinsic resistance equivalent to the output resistance of the equivalent Thevenin generator, seen by the input port and polarized by a polarization current, an output port with a current corresponding to that of the input port and a current controller for controlling the intensity of the polarization current to determine the ohmic value of the intrinsic resistance. The invention's reference and output ports are directly connected to one another.

Abstract: A unity gain or buffer amplifier having a low offset voltage. The amplifier uses two emitter followers of different conductivity types (PNP and NPN) in an up-down emitter or voltage follower configuration to provide high input impedance and low output impedance. By using both PNP and NPN transistors in a current mirror, the base-emitter voltages of the input and output transistors are forced to be substantially the same, reducing the offset voltage. N- and P-channel MOSFETs can be substituted for the NPN and PNP transistors. Single ended and push-pull arrangements are shown.

Abstract: An AB class stage is described which comprises two complementary MOSFET final transistors connected in a push-pull manner between two supply terminals. In order to attain high linearity, low switching distortion, a high ratio between the maximum output current and the rest current, independence of the rest current from the temperature and manufacturing variables and a circuit simplicity, the circuits determining the rest current and those which provide current to the load are substantially independent of one another. More particularly, two transconductance amplifiers are provided which control the final transistors and are dimensioned so as to have zero output current in rest conditions, two voltage generators which determine the rest current and two resistors being connected between the gate electrodes of the final transistors and the supply terminals.

Abstract: An amplifier includes an output buffer having an input coupled to a gain node which is the common node of the outputs of first and second current mirrors for receiving a signal current and having an output for providing an amplified drive current. The output buffer includes a first transistor of a first type having its base coupled to a gain node of the output buffer and to the base of a first transistor of a second type for receiving the signal current. The emitter of the first transistor of a first type is coupled to the base of a second transistor of a second type. The emitter of the first transistor of the second type is coupled to the base of a second transistor of the first type. The emitter of the second transistor of the first type is coupled to the emitter of the second transistor of the second type and to the output of the buffer.

Abstract: In a video amplifier including a voltage gain stage and a current-amplifying output stage, feedback is applied from an output to an input of the voltage gain stage. The output stage includes a first current gain stage having a first push-pull amplifier and a second push-pull amplifier. The inputs of each of these push-pull amplifiers is connected to an output of the voltage gain stage. The output stage also includes a second current gain stage having a common-collector NPN transistor and a common-collector PNP transistor, the NPN transistor having its base terminal connected to the output of the first push-pull amplifier of the first current gain stage, and the PNP transistor having its base terminal connected to the output of the second push-pull amplifier of the first current gain stage. The output of the output stage is provided at an output terminal connected to the emitter of the NPN and PNP transistors of the second current gain stage.

Abstract: An amplifier circuit is disclosed having circuitry that senses an electrical current at the output node while dynamically adjusting a bias current for an output circuit of the amplifier circuit. The bias current controls the amount of electrical current that the output circuit sinks or sources at the output node.

Abstract: A linear power amplifier having a pulse density modulated switching power supply comprising: power supply means for connection to a source of electrical power and adapted to provide (i) a first, relatively high DC voltage, and (ii) a second, relatively low DC voltage; voltage amplifying means for connection to a signal source and adapted to amplify a first, relatively low voltage signal received from the signal source into a second, relatively high voltage signal; current amplifying means connected to the voltage amplifying means and adapted to increase the current flow of the second, relatively high voltage signal, as needed, in order to properly drive a load, wherein the current amplifying means are normally powered by the second, relatively low DC voltage supplied by the power supply means; and pulse generating means connected to the line carrying the second, relatively high voltage signal to the load, and to the line supplying power to the current amplifying means, the pulse generating means being adapted

Abstract: An IC amplifier having first and second cascaded stages formed by respective pairs of symmetrical complementary bipolar transistors followed by a unity gain buffer amplifier and provided with overall current feedback. The quiescent collector currents of the second amplifier stage are controlled by respective transconductance generators with respective complementary bipolar transistors connected in parallel relationship to the transistors of the second stage. The collector currents of the transconductance generators are fixed at the levels of respective reference current generators.

Abstract: A circuit for regulating the charging time of the output node of an amplifier at start up. The output node commonly comprises an external soft-start capacitor charged by a current delivered by a pull-up transistor of a push-pull output stage of the amplifier, through a decoupling diode that is functionally connected between the output node of the amplifier and a terminal of the external soft-start capacitor. The present application provides a current mirror feed back circuit capable of mirroring the charge current of the external soft-start capacitor onto the driving node of the pull-up transistor of the output stage of the amplifier. The regulating circuit permits use of an external capacitance of extremely small size. Upon the reaching of a fully charged condition by the external capacitor, the control circuit self-isolates and does not influence in any way the normal operation of the amplifier.

Abstract: A bipolar micro-power rail-to-rail operational amplifier has a low complexity output stage that provides a high ratio of load current to no load idle current. The output stage includes first and second output transistors of opposite conductivities whose current circuits are connected in series at the output terminal between high and low voltage supplies. A control transistor responds to the drive voltage at its base by modulating the base-emitter voltages of the first output transistor and a gain transistor in opposite directions to modulate their respective output and gain currents. A regenerative current source supplies current to the gain transistor by returning the gain current in a regenerative feedback loop to its emitter so that the current source idles at a low gain current but is capable of supplying much higher gain currents.

Abstract: A bipolar micro-power rail-to-rail operational amplifier has a low complexity output stage that provides a high ratio of load current to no load idle current. The output stage includes first and second output transistors of opposite conductivities whose current circuits are connected in series at the output terminal between high and low voltage supplies. A control transistor responds to the drive voltage at its base by modulating the base-emitter voltages of the first output transistor and a gain transistor in opposite directions to modulate their respective output and gain currents. A regenerative current source supplies current to the gain transistor by returning the gain current in a regenerative feedback loop to its emitter so that the current source idles at a low gain current but is capable of supplying much higher gain currents.

Abstract: In a triple buffer stage output stage applicable to an operational amplifier, the two transistors in the first buffer stage are bootstrapped to the second buffer stage. The collector voltage of each transistor in the first buffer stage thereby follows the input signal at the high impedance node and therefore their parasitic capacitance to the substrate does not have a significant effect. This bootstrapping the collectors of the transistors of the first buffer stage minimizes parasitic capacitance effects and improves phase delay of the output stage. Additionally, the PNP transistors in the signal path of the output stage are fabricated in isolated N-wells to minimize the effect of the N-well to collector capacitance, the N-wells of the signal path PNP transistors which are reverse biased also being bootstrapped.