And Particular Biasing Arrangement Patents (Class 330/267)
  • Patent number: 4879522
    Abstract: To actuate a complementary push-pull class B final stage complementary driver transistors are provided whose emitters are electrically interconnected and connected to the collectors of the two final stage transistors via a filter section. This filter section is not integratable into the rest of the circuit on account of the high capacitance value of the capacitor. To permit design of this complementary push-pull class B final stage as an integrated circuit the filter section is replaced according to the invention by a circuit arranged between the emitters of the driver transistors and ground and having dynamic low impedance and being designed such that the operating voltage drops by about half across the integratable circuit.
    Type: Grant
    Filed: August 12, 1988
    Date of Patent: November 7, 1989
    Assignee: Telefunken electronic GmbH
    Inventor: Johann Mattfeld
  • Patent number: 4878032
    Abstract: This amplifier stage has saturation control and high dynamics. The stage comprises a pair of input current sources connected in series between a pair of reference voltage lines, a pair of output transistors, connected between the pair of reference voltage lines and defining an intermediate output terminal and a driving circuit comprising active elements and interposed between the input current sources and the output transistors.
    Type: Grant
    Filed: April 12, 1988
    Date of Patent: October 31, 1989
    Assignee: S-Thomson Microelectronics S.p.A.
    Inventors: Edoardo Botti, Aldo Torazzina, Fabrizio Stefani
  • Patent number: 4868518
    Abstract: An amplifier circuit, for example, a class AB output stage, includes a series arrangment of a first transistor (T.sub.1) and a second transistor (T.sub.2), both arranged as diodes, a series arrangement of a third transistor (T.sub.3) and a fourth transistor (T.sub.4) and a series arrangement of a fifth transistor (T.sub.5) and an impedance (R). The first main electrode of the first transistor (T.sub.1) is coupled via the impedance (R) to the control electrode of the fourth transistor (T.sub.4). The first main electrodes of the second and fifth transistors (T.sub.2, T.sub.5) are coupled together and to the control electrode of the third transistor (T.sub.3). The control electrodes of the first, second and fifth transistors (T.sub.1, T.sub.2 and T.sub.5) are coupled together and to the second main electrodes of the first and the second transistor. This circuit provides a small quiescent current in the output transistors using relatively small input transistors (T.sub.1, T.sub.
    Type: Grant
    Filed: October 31, 1988
    Date of Patent: September 19, 1989
    Assignee: U.S. Philips Corporation
    Inventors: Pieter G. Blanken, Jan R. De Boer
  • Patent number: 4837523
    Abstract: An improved linear amplifier circuit includes controlled current sources connected to supply additional current to the output stage during rapid change of applied signal. The current sources are responsive to current levels in the input stages and thus need only conduct low levels of current during quiescent operating conditions. Symmetrical and asymmetrical circuit configurations with respect to reference potential are disclosed.
    Type: Grant
    Filed: April 4, 1988
    Date of Patent: June 6, 1989
    Assignee: Elantec
    Inventor: John W. Wright
  • Patent number: 4833424
    Abstract: An improved linear amplifier circuit includes current mirror circuits that are cross connected in the collector circuits of input transistors for supplying proportional current to circuit nodes from which signal is derived for controlling the output stages. The states for supplying boost current to the circuit nodes are stabilized in quiescent condition to avoid delays commonly associated with the turning on of a non-conducting stage.
    Type: Grant
    Filed: April 4, 1988
    Date of Patent: May 23, 1989
    Assignee: Elantec
    Inventor: John W. Wright
  • Patent number: 4827223
    Abstract: An improved direct-coupled amplifier includes a push-pull pair of transistors in an output stage that provides high output current on low quiescent current. Each such output transistor is driven by a push-pull pair of driver transistors that receives the applied signal at proper bias levels provided by forward-biased diodes (or diodes and gain element) to provide high input impedance to low output impedance signal buffering with wide bandwidth at high power levels.
    Type: Grant
    Filed: March 21, 1988
    Date of Patent: May 2, 1989
    Assignee: Elantec
    Inventor: William H. Gross
  • Patent number: 4816773
    Abstract: A semiconductor non-inverting repeater circuit utilizes a pair of current mirrors operating in a balanced source/sink operation during non-input signal periods to provide quiescent biasing current to a pair of complementary bipolar output transistors. The bipolar output transistors are configured in a complementary emitter-follower arrangement to provide minimum delay. Finally, the circuit includes two diodes and two capacitors to supply a non-inverted input signal to the bipolar output transistors such that a non-inverted output signal is produced.
    Type: Grant
    Filed: May 1, 1987
    Date of Patent: March 28, 1989
    Assignee: International Business Machines Corporation
    Inventor: Wilbur D. Pricer
  • Patent number: 4814723
    Abstract: To obtain a constant quiescent current, high dynamics and high stability of a class AB output stage of low-frequency amplifiers, comprising an input transistor; a driving circuit comprising a current source, a first pair of driving transistors connected in series between the current source and the input transistor, a second pair of driving transistors mutually connected in series and driven by the first pair of driving transistors; as well as a pair of output transistors driven by the second pair of driving transistors, the driving circuit comprises a first resistor connected between the current source and the base of one of the first pair of driving transistors, a second resistor connected between the bases of the transistors of the first pair and a resistive network inserted in series between the transistors of the second driving pair.
    Type: Grant
    Filed: April 12, 1988
    Date of Patent: March 21, 1989
    Assignee: SGS-Thomson Microelectronics S.p.A.
    Inventor: Edoardo Botti
  • Patent number: 4799027
    Abstract: The invention relates to a low-frequency amplifier with an integrated push-pull B final stage and a circuit for adjusting the quiescent current. The invention resides in the amplifier comprising two circuits for adjusting the quiescent current which are provided for different voltage ranges of the supply voltage. An electronic switchover device ensures automatic activation of that circuit for quiescent current adjustment which is suited for the respective voltage range.
    Type: Grant
    Filed: October 1, 1987
    Date of Patent: January 17, 1989
    Assignee: Telefunken electronic GmbH
    Inventors: Johann Mattfeld, Joachim Sinderhauf
  • Patent number: 4780689
    Abstract: An improved amplifier input circuit for use as the input stage for a current feedback amplifier to reduce offset and limit overload currents. The circuit includes first and second bias current supplies, first and second diodes having anode and cathode terminals, a PNP transistor and a NPN transistor, first and second input terminals, and first and second current sense terminals. Currents flowing through the sense terminals are sensitive to an input current in the first input terminal. Bias currents from the first and second bias current supplies are divided, respectively, between the PNP transistor and first diode, and the NPN transistor and second diode. The base terminals of the transistors are connected in common to the second input terminal. Other embodiments are also described.
    Type: Grant
    Filed: July 20, 1987
    Date of Patent: October 25, 1988
    Assignee: Comlinear Corporation
    Inventors: Kenneth R. Saller, John S. Farnbach
  • Patent number: 4752745
    Abstract: A high fidelity audio amplifier of the push-pull complementary symmetry type, featuring a feedback circuit with a bias sensing element connected to the output terminals of the output transistors. The feedback circuit includes a photoemitting element in optical communication with a photoconductive element which determines the relative voltage difference of the input terminals of the complementary symmetry output transistors.
    Type: Grant
    Filed: August 18, 1987
    Date of Patent: June 21, 1988
    Assignee: Threshold Corporation
    Inventor: Nelson S. Pass
  • Patent number: 4727336
    Abstract: Two cascode amplifiers are connected in parallel and include RC bypass circuits across their emitter and collector load resistors. The amplifiers are biased so that positive going transitions of an input video signal drive one amplifier into conduction and negative going excursions drive the other amplifier into conduction. The RC bypass circuits make the amplifier wide band and low power dissipation is obtained because the collector load resistors can be made large.
    Type: Grant
    Filed: July 2, 1986
    Date of Patent: February 23, 1988
    Assignee: Zenith Electronics Corporation
    Inventor: William J. Mark
  • Patent number: 4706039
    Abstract: A class-G amplifier comprises first, second and third terminals connected to a load, first supply voltage (V.sub.1) and second supply voltage (V.sub.2), respectively, where V.sub.2 >V.sub.1. First (T.sub.1) and second (T.sub.2) transistors are series-connected between the first and third terminals with the collector of T.sub.1 coupled via first diode (D.sub.1) to the second terminal. A third emitter follower transistor (T.sub.3) has a B/E junction coupled between a signal input terminal and base of T.sub.1. A first current source (5) couples the third terminal and third transistor. A driver circuit includes a first current path between the third terminal and emitter of T.sub.3 comprising, in series, a second current source (7), a fourth transistor (T.sub.5) and second diode (D.sub.4). A second current path between a junction point (3) and common point (11) comprises, in series, third (D.sub.2) and fourth (D.sub.3) diodes and a third current source (8).
    Type: Grant
    Filed: March 11, 1986
    Date of Patent: November 10, 1987
    Assignee: U.S. Philips Corporation
    Inventors: Eise C. Dijkmans, Joseph G. G. Raets, Norbert J. L. Philips
  • Patent number: 4706035
    Abstract: A high-efficiency class-G type amplifier comprises a first transistor (T.sub.1), having its collector connected to a first supply voltage (V.sub.1) via a first diode (D.sub.1) and a second transistor (T.sub.2), connected in series with the first transistor and which has its collector connected to a second supply voltage (V.sub.2). The series arrangement of a second (D.sub.2), a third (D.sub.3) and a fourth diode (D.sub.4) is connected between the bases of the first and the second transistor (T.sub.1, T.sub.2) the fourth diode (D.sub.4) is poled in a direction opposite to that of the second (D.sub.2) and the third diode (D.sub.3). The series arrangement of a first resistor (R.sub.1) and the emitter-collector path of a first current-source transistor (T.sub.4) connects the second supply voltage to the anode of the fourth diode (D.sub.4). The junction point (5) between the first resistor (R.sub.1) and the current-source transistor (T.sub.4) is connected to the output (2) by means of a capacitor (C.sub.1).
    Type: Grant
    Filed: March 11, 1986
    Date of Patent: November 10, 1987
    Assignee: U.S. Philips Corporation
    Inventors: Eise C. Dijkmans, Joseph G. G. Raets, Norbert J. L. Philips
  • Patent number: 4682059
    Abstract: A current interface has an impedance buffering circuit which maintains a very low input impedance at an input node, while producing currents to two current outputs which increase and decrease, respectively, with increases and decreases in the input current flow. In a preferred embodiment, the impedance buffering circuit is an operational amplifier which has been modified to provide access to the collector terminals of a complementary output transistor pair. The collector terminals are connected to current mirrors which are also connected to an output node of the interface circuit. The amplifier and current mirrors effectively buffer the input and reconstruct changes in the input current at the output node, while maintaining a very low input impedance at the input node. Compensation for errors introduced by the changes in base currents of the complementary output pair is provided by a matching pair of complementary transistors.
    Type: Grant
    Filed: October 31, 1985
    Date of Patent: July 21, 1987
    Assignee: Harris Corporation
    Inventor: Carlos M. Garcia
  • Patent number: 4668921
    Abstract: A power supply circuit having rectifiers and selectable first to n-th power supply voltage terminals for supplying various levels of output voltages. Between respective terminals and an earth, first smoothing capacitors (e.g. C.sub.1 -C.sub.4) are connected. Between i-th terminal and (i-1)-th terminal (wherein, 2.ltoreq.i.ltoreq.n), second smoothing capacitors (e.g. C.sub.5, C.sub.6, C.sub.n, C.sub.n-1) are connected. When i-th terminal is selected, not only capacitance of the first smoothing capacitor connected between the i-th terminal and the earth, but also capacitance of the first capacitor connected between the (i-1)-th terminal and the earth and the second capacitor connected between the i-th and (i-1)-th terminals are utilized for smoothing operation.
    Type: Grant
    Filed: October 22, 1984
    Date of Patent: May 26, 1987
    Assignee: Trio Kabushiki Kaisha
    Inventor: Eijiro Tamura
  • Patent number: 4656435
    Abstract: A constant biasing circuit is made to maintain a fixed difference of potential between two circuit nodes A and B otherwise at floating potential levels. The biasing circuit is made of series connected complementary transistors disposed between the circuit nodes A and B and having their gate electrodes respectively connected to opposite voltages of, e.g., +5 volts and -5 volts.
    Type: Grant
    Filed: December 23, 1985
    Date of Patent: April 7, 1987
    Assignee: International Business Machines Corporation
    Inventors: Jean-Christophe Czarniak, Rene Diot
  • Patent number: 4651112
    Abstract: An audio amplifier system is provided including a transformer having a first primary winding that is center-tapped, a second primary winding and a secondary winding. The amplifier system includes a battery backup system by connecting a battery to the center tap of the first primary winding. The second primary winding is connected to a source of alternating current. The output from the secondary winding is rectified and filtered to provide a positive voltage output and a negative voltage output. A complementary symmetry amplifier is provided having a positive voltage power input, a negative voltage power input, an audio signal input and an output. The positive voltage output and negative voltage output are connected, respectively, to the positive voltage power input and the negative voltage power input of the complementary symmetry amplifier.
    Type: Grant
    Filed: February 3, 1986
    Date of Patent: March 17, 1987
    Assignee: Dukane Corporation
    Inventor: Charles W. Keysor
  • Patent number: 4649235
    Abstract: The telephone amplifier of an audio transmission circuit comprises a class-B output stage as a result of which the required supply current of this amplifier is considerably lower than with prior art telephone amplifiers. A distorting voltage produced by the current signal in the supply current of the glass-B output stage does not affect the output signal of the telephone amplifier because the input stage and the output stage each comprise their own setting circuits which produce mutually independent setting voltages.
    Type: Grant
    Filed: December 11, 1984
    Date of Patent: March 10, 1987
    Assignee: U.S. Philips Corporation
    Inventor: Peter J. M. Sijbers
  • Patent number: 4639685
    Abstract: Unity gain buffer amplifier circuits having a reduced input-to-output offset voltage characteristic are described. Compensation for the effects of base-to-emitter voltage variations and early voltage is employed.
    Type: Grant
    Filed: July 18, 1985
    Date of Patent: January 27, 1987
    Assignee: Comlinear Corporation
    Inventors: Kenneth R. Saller, Kurt R. Rentel
  • Patent number: 4607232
    Abstract: An electronic circuit is provided comprising: a pair of transistors having collector electrodes connected together at an output terminal and emitter electrodes coupled to opposite potentials of a voltage supply; a current source; and, means, responsive to a current produced by the current source, for establishing bias currents to base electrodes of the pair of transistors in accordance with an input signal, such bias currents being dependent on the current produced by the current source and being substantially independent of, over a nominal operating supply voltage range of the circuit, of variations in the voltage supply. With such arrangement, since the bias current to the transistors are provided from a current source, the bias currents are independent of the voltage supply and the circuit may operate with less than a one volt voltage supply. In accordance with a preferred embodiment of the invention, a resistor is coupled between the voltage supply and an emitter of one of the pair of transistors.
    Type: Grant
    Filed: April 1, 1985
    Date of Patent: August 19, 1986
    Assignee: Raytheon Company
    Inventor: Harry A. Gill, Jr.
  • Patent number: 4607233
    Abstract: To obtain class AB operation of a push-pull amplifier which uses a preamplifier and an output amplifier having complementary output transistors, the base-emitter voltage of the first output transistor is converted into a current by a voltage-to-current converter and this current is re-converted into a base-emitter voltage by a current-to-voltage converter and added to the base-emitter voltage of the second output transistor. The sum of said base-emitter voltages is maintained equal to a reference voltage generated across two diode-connected transistors (T.sub.7, T.sub.8) by a differential amplifier.
    Type: Grant
    Filed: February 27, 1985
    Date of Patent: August 19, 1986
    Assignee: U.S. Philips Corporation
    Inventor: Adrianus J. M. Van Tuijl
  • Patent number: 4594560
    Abstract: An amplifying stage and a biasing stage for the amplifying stage, each include the same number and same types of IGFETs. The biasing stage components are interconnected to produce a control voltage which is a function of its components while being responsive to a reference level setting input voltage. The control voltage is applied to the amplifying stage which, when auto-zero'ed, functions as a voltage follower producing a voltage, at its input and output, which is substantially equal to the reference level applied to the biasing stage.
    Type: Grant
    Filed: April 17, 1985
    Date of Patent: June 10, 1986
    Assignee: RCA Corporation
    Inventors: Andrew G. F. Dingwall, Victor Zazzu
  • Patent number: 4588961
    Abstract: An operational amplifier is provided with at least one output supplementary stage and current mirror amplifiers for coupling amplified signal current variations to drive supplementary output stage source and sink transistors. Those transistors have their internal collector-emitter paths directly connected between supply rails and perform further amplification of the signals. A current source circuit is employed for so limiting those signal current variations that, after the further amplification, circuit devices will not be damaged.
    Type: Grant
    Filed: August 24, 1984
    Date of Patent: May 13, 1986
    Assignee: AT&T Bell Laboratories
    Inventor: Madana K. N. Rao
  • Patent number: 4586001
    Abstract: A Class B push-pull amplifier designed for use at low supply voltages (e.g. 1 to 2 volts) wherein complementary push-pull output transistors T.sub.3, T.sub.4 are biased by a biasing chain consisting of resistor R.sub.1, transistor T.sub.1, resistor R.sub.2, transistor T.sub.2, resistor R.sub.3, with the signal to the bases of T.sub.3, T.sub.4 being supplied from opposite ends of R.sub.2. The value of R.sub.2 is twice that of R.sub.1 and R.sub.3. The circuit is preferably used in a bridge configuration with a second similar amplifier set at unity gain driven from the first amplifier. It may be used to power the loudspeaker of a miniature radio receiver.
    Type: Grant
    Filed: April 3, 1984
    Date of Patent: April 29, 1986
    Assignee: Sinclair Research Ltd.
    Inventor: Michael R. Pye
  • Patent number: 4586002
    Abstract: An audio amplifier operatively connected to the secondary winding of a power transformer. The primary winding of the transformer is connected through a control circuit which has switch means that is turned on and off during selected portions of half cycles of the voltage imposed upon the primary winding of the transformer. By turning the switch on and off at appropriate intervals, the proper amounts of electrical energy can be delivered to supply the power requirements for amplification, while substantially reducing problems of idling currents in the primary winding of the transformer. Thus, the transformer can be made much smaller than in power supplies of conventional amplifiers.
    Type: Grant
    Filed: June 1, 1984
    Date of Patent: April 29, 1986
    Inventor: Robert W. Carver
  • Patent number: 4575686
    Abstract: The output stage for power amplifiers, in particular of the minimum drop, low tension type, is intended for use with apparatus which do not require a high output current, which output stage can operate at a lower minimum voltage supply than comparable known stages. The output stage comprises upper and lower sections interposed between a power supply line and a ground line, each section including transistors across which voltage drops (V.sub.CE sat, V.sub.BE) appear and forming current sources for each section, diodes, and at least one current mirror circuit of the multiplying type adapted to determine as a first approximation the current gain of each section. The minimum voltage drop between the power supply line and ground line, as computed for any electric line connecting the power supply line and ground line, never exceeds the value of V.sub.BE +2V.sub.CE sat.
    Type: Grant
    Filed: July 24, 1984
    Date of Patent: March 11, 1986
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Sergio Palara, Aldo Torazzina
  • Patent number: 4570128
    Abstract: An output stage is disclosed wherein class AB bias is employed. The stage is quiescently biased by means of current mirrors so that the bias is controlled mainly by ratioed geometric elements. The output transistors are biased by means of unity gain common gate drivers that provide the desired level shifting. The output voltage can be swung from from close to the rail potential of the source of the n channel output transistor to close to the rail potential of the source of the p channel transistor. The circuit can drive relatively large load currents and can be fabricated using either CMOS or conventional bipolar integrated circuits.
    Type: Grant
    Filed: July 5, 1984
    Date of Patent: February 11, 1986
    Assignee: National Semiconductor Corporation
    Inventor: Dennis M. Monticelli
  • Patent number: 4560946
    Abstract: A power amplifier with a low distortion and a high power efficiency includes a first amplifier of the low distortion type for being powered by a first voltage source to amplify an input signal thereto to apply an output signal to a first terminal, and a second amplifier of the high power efficiency type for being powered by a second voltage source to amplify the input signal to apply an output signal to a second terminal. A load is connected between the first and second terminals. The output voltage of the second voltage source is greater than that of the first voltage source. A first feedback path is provided for feeding back the output signal of the first amplifier to an input thereof. A second feedback path is provided for feeding back the output signal of the second amplifier to the input of the first amplifier.
    Type: Grant
    Filed: March 21, 1984
    Date of Patent: December 24, 1985
    Assignee: Nippon Gakki Seizo Kabushiki Kaisha
    Inventor: Kenji Yokoyama
  • Patent number: 4555674
    Abstract: A current control circuit coupled to the final stage of the amplifier automatically adjusts the bias current of the final stage so that it is low in the no-load state and higher in the load state. The low no-load value avoids useless energy leakages and heat dissipations, while the higher load value avoids "cross-over" distortions.
    Type: Grant
    Filed: August 15, 1983
    Date of Patent: November 26, 1985
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Sergio Palara, Aldo Torazzina
  • Patent number: 4549147
    Abstract: Disclosed is a load impedance detector for detecting a variation of the load impedance of a single-ended push-pull amplifier having a pair of first and second transistors, the emitters of which are interconnected by a pair of series-connected first and second resistors forming a first node to which the load impedance is connected. Third and fourth resistors are connected in series to the emitter of the first transistor to form a bridge circuit with the first resistor and the load impedance so that the third and fourth resistors define a second node therebetween. A voltage difference between the first and second nodes is detected by a differential circuit which is responsive to there being a simultaneous presence of a first state in which the detected voltage difference is higher than a first predetermined value and a second state in which the potential across the load impedance is higher than a second predetermined value for generating an output signal.
    Type: Grant
    Filed: March 31, 1983
    Date of Patent: October 22, 1985
    Assignee: Victor Company of Japan, Limited
    Inventor: Hikaru Kondo
  • Patent number: 4544895
    Abstract: An asymmetrically driven audio amplifier arrangement comprises two amplifiers (1, 10) whose outputs (3, 12) are each connected to a common capacitor (18) via an associated loudspeaker (7, 16). The amplifier circuits (1, 10) are driven in phase opposition, so that the signal current through said common blocking capacitor becomes substantially zero. In addition, it is possible to replace the two loudspeakers by one loudspeaker of a higher power between the outputs (3, 12) of the two amplifiers (1, 10).
    Type: Grant
    Filed: August 22, 1983
    Date of Patent: October 1, 1985
    Assignee: U.S. Philips Corporation
    Inventor: Albert Stoker
  • Patent number: 4540950
    Abstract: A linear amplifier circuit includes input and output signal ports and a pair of signal amplifying circuits. Each signal amplifying circuit couples an input signal from the input signal port to the output signal port. A bias supply can be connected to the signal amplifying circuits for supplying bias currents thereto. The input and output signal ports are isolated from the bias supply without using capacitors or inductors.
    Type: Grant
    Filed: June 7, 1982
    Date of Patent: September 10, 1985
    Assignee: AT&T Bell Laboratories
    Inventor: David G. Ross
  • Patent number: 4540951
    Abstract: A push-pull amplifer circuit using bipolar transistors in which non-linear distortion caused by the base-emitter voltages of the amplifying transistors of the circuit is eliminated without the use of negative AC feedback and in which variations in a DC output level at the output terminal of the amplifier are detected and fed back to the input side of the amplifier whereby the stability of the circuit at very low frequencies is remarkably improved. A first amplifier stage includes a first transistor having a base to which an input signal is applied and a second transistor the base of which is coupled to an output of the first transistor with the second transistor being of the opposite conductivity type of the first transistor. A current mirror circuit supplies currents to the first and second transistors with the currents thus supplied having a constant ratio. A second amplifying stage is provided having the same construction.
    Type: Grant
    Filed: October 27, 1983
    Date of Patent: September 10, 1985
    Assignee: Pioneer Electronic Corporation
    Inventors: Akio Ozawa, Susumu Sueyoshi, Keishi Sato, Kikuo Ishikawa, Kiyomi Yatsuhashi, Satoshi Ishii, Masamichi Yumino
  • Patent number: 4536662
    Abstract: A bidirectional constant current driving circuit is connected between the positive and negative terminals of a power supply. This drive circuit has an input terminal and an output terminal with a load coupled to the output terminal, and with the current supplied thereto being controlled to vary in either a positive or a negative electrical direction. The inventive driving circuit has four transistors . A first and second of these transistors have a first electrode connected to the first power supply terminal. The second transistor has second and third electrodes connected to a second electrode of the first transistor. A third and fourth of these transistors have a first electrode connected to the second power supply terminal. The fourth of these transistors has second and third electrodes connected to a second electrode of the third transistor. First and second resistors are serially connected between the third electrodes of the second and fourth transistors.
    Type: Grant
    Filed: November 9, 1983
    Date of Patent: August 20, 1985
    Assignee: NEC Corporation
    Inventor: Akira Fujii
  • Patent number: 4531099
    Abstract: An amplifier includes a differential amplifier which is supplied with a small amplitude signal in a normal condition and a large amplitude signal in an abnormal condition. Resistors and diodes jointly act to judge whether the differential amplifier issues a small or large amplitude signal. A small amplitude signal is amplified by a small amplitude signal-amplifying section and a large amplitude signal is amplified by a large amplitude signal-amplifying section. The large amplitude signal-amplifying section is supplied with a first source voltage B.sub.2. The small amplitude signal-amplifying section is impressed with a second source voltage B.sub.1. An output signal of the amplifier is supplied to a load A through an output terminal common to the small amplitude signal-amplifying section and large amplitude signal-amplifying section. The first and second source voltages B.sub.2, B.sub.1 are chosen to have the following relationship:B.sub.2 >B.sub.1.
    Type: Grant
    Filed: April 19, 1983
    Date of Patent: July 23, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Hiroshi Nakane
  • Patent number: 4529948
    Abstract: A class AB CMOS amplifier having a particular circuit configuration and useful in a variety of products such as operational amplifiers, chopper stabilized amplifiers, commutating autozero amplifiers and the like.
    Type: Grant
    Filed: November 7, 1984
    Date of Patent: July 16, 1985
    Assignee: Intersil, Inc.
    Inventor: David Bingham
  • Patent number: 4521740
    Abstract: An amplifier output circuit in which crossover distortion is largely eliminated, temperature compensation of idle current is obviated, and the idle current is maintained stable, independent of the magnitude of the input signal. In one embodiment in which two output amplifying elements are connected in a Class B SEPP circuit configuration, first and second error signal amplifiers are provided. While the first error amplifier functions as an error amplifier for an error voltage level shifted between the voltage at the output electrode of its current amplifying element and the voltage at the circuit input terminal, the second error amplifier functions as an error amplifier for an error voltage level shifted between the voltage at the output terminal of its amplifying element and the voltage at the circuit output terminal.
    Type: Grant
    Filed: February 18, 1983
    Date of Patent: June 4, 1985
    Assignee: Pioneer Electronic Corporation
    Inventor: Kazuaki Nakayama
  • Patent number: 4518928
    Abstract: A power supply circuit for an amplifier is improved with respect to efficiency and lack of distortion by providing a circuit for supplying a voltage corresponding to the output signal level of the amplifier to a power supply terminal thereof. The circuit includes a phase compensated amplifier which receives an input signal corresponding to the amplifier output signal level.
    Type: Grant
    Filed: December 15, 1982
    Date of Patent: May 21, 1985
    Assignee: Pioneer Electronic Corporation
    Inventor: Satoshi Ishii
  • Patent number: 4502020
    Abstract: A wide-band direct-coupled transistor amplifier exhibits greatly improved settling time characteristics as the result of circuitry permitting the use of current feedback rather than voltage feedback in order to reduce the sensitivity of settling time and bandwidth to feedback elements without thereby affecting the manner in which feedback is applied externally by the user, reducing the sensitivity of settling time to the effects of temperature, eliminating saturation and turn-off problems within the amplifier that are related to bias control, to large input signals, and to high frequency input signals or those having fast rise times, and minimizing the sensitivity of settling time to power supply voltages.
    Type: Grant
    Filed: October 26, 1983
    Date of Patent: February 26, 1985
    Assignee: Comlinear Corporation
    Inventors: David A. Nelson, Kenneth R. Saller
  • Patent number: 4499431
    Abstract: An apparatus for improving the salient properties of the output stages of electronic power amplifiers v.s. varying load conditions. A novel circuit, based on current feedback sensing the instantaneous drive current of the output devices, is used to linearize the output characteristics of the output devices. The important features, compared with the presently known and employed drive circuits, relate to a more linear transfer characteristic, much larger output current capability, and more output amplifier design.
    Type: Grant
    Filed: May 3, 1982
    Date of Patent: February 12, 1985
    Assignee: Shin-Shirasuna Electric Corp.
    Inventor: Matti N. Otala
  • Patent number: 4476441
    Abstract: A push-pull power amplifier with quiescent current regulator, in particular for low-frequency power amplifiers of high quality in which the quiescent current or currents of the output transistors is or are sampled at a predetermined output voltage and/or in a predetermined output voltage range of the amplifier, their values coded in one or more comparators and in one or more storage elements the corresponding values with which the desired values of the quiescent current or currents can be corrected or held are stored.
    Type: Grant
    Filed: December 14, 1981
    Date of Patent: October 9, 1984
    Inventor: Zdzislaw Gulczynski
  • Patent number: 4476444
    Abstract: A power amplifier circuit comprises a class A amplifier having a pair of output amplifying devices responsive to an input for driving a load, a power supply connected between power supply terminals of the output amplifying devices for producing a voltage, and a class B power amplifier driven by the input to the class A amplifier. The class B power amplifier includes a pair of push-pull output amplifying devices having outputs connected respectively to the power supply terminals, and a pair of drivers for driving the push-pull output amplifying devices. The drivers have first controlled electrodes for driving the push-pull output amplifying devices and second controlled electrodes connected to a common potential point. A negative feedback loop may be connected for supplying signals dependent upon voltage changes at the power supply terminals back to an input stage of the class B power amplifier.
    Type: Grant
    Filed: May 4, 1982
    Date of Patent: October 9, 1984
    Assignee: Pioneer Electronic Corporation
    Inventor: Satoshi Ishii
  • Patent number: 4471322
    Abstract: A power amplifier is disclosed which reliably amplifies an input signal and decreases power consumption. A pre-driving circuit pre-drives a driving circuit of a power amplifying circuit in response to an input signal. The driving circuit drives an output circuit in the power amplifying circuit. A detecting circuit detects the level of the output of the driving circuit. The pre-driving circuit receives the output of the detecting circuit and supplies the pre-driving circuit with a pre-driving current varying in response to the output of the detecting circuit. Consequently, the pre-driving current can be designed to change in response to demand, i.e., the pre-driving current can be low when demand is low and increase as the occasion demands.
    Type: Grant
    Filed: August 5, 1981
    Date of Patent: September 11, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hiroyasu Yamaguchi, Yasuhiro Kodera
  • Patent number: 4468630
    Abstract: A wide-band amplifier for driving a capacitive load includes an amplifier of a complementary push-pull circuit receiving and amplifying an input signal to produce an output signal for driving the capacitive load, and a controller for controlling bias current of the amplifier in response to a detected output derived from a high frequency component in the output signal of the amplifier. The controller makes the bias current of the amplifier variable with frequency and amplitude of the input signal.
    Type: Grant
    Filed: August 5, 1982
    Date of Patent: August 28, 1984
    Assignee: Hitachi Denshi Kabushiki Kaisha
    Inventors: Yasunori Narukawa, Mitsunobu Iwabuchi
  • Patent number: 4458213
    Abstract: A circuit maintains the quiescent collector current of an output transistor amplifier constant by sensing the voltage developed across a resistor connected in series with the output transistor's collector and, using a differential amplifier, produces a first signal representative thereof which is sampled and held by a circuit controlled by a zero voltage crossing detector sensitive to the amplifier output voltage. The sampled and held signal is inverted and integrated with respect to an adjustable reference voltage to produce a second signal. The second signal controls the current passed by a transistor connected in a voltage divider network supplying the base bias voltage to the output transistor.
    Type: Grant
    Filed: December 13, 1982
    Date of Patent: July 3, 1984
    Assignee: Sony Corporation
    Inventor: Ronald Quan
  • Patent number: 4454479
    Abstract: The disclosed operational amplifier comprises a first pair of complementary type transistors (Q5, Q6) (of high current carrying capacity) that have their emitter-collector paths connected in series across a source of reference potential. The emitters of the transistors are connected together and to an output terminal (17). A second pair of complementary type transistors (Q3, Q4) are coupled across said reference potential, each transistor of said second pair being coupled across the similar conductivity type transistor of said first pair. A first pair of resistances (R1, R2) of predetermined value are respectively connected between the bases of the similar conductivity type transistors of said first and second pair. A second pair of resistances (R3, R4) respectively connect the emitters of the transistors of said second pair to said output terminal.
    Type: Grant
    Filed: December 20, 1982
    Date of Patent: June 12, 1984
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Dewayne A. Spires
  • Patent number: 4450412
    Abstract: A balanced amplifier output stage preferably intended to be used in a telephone instrument and which has its current supply from the telephone line includes two transistor amplifiers connected to parallel each having a top (T1, T2) and a bottom (T3, T4) transistor with series connected emitter-collector-circuits. Equally located transistors (e g T1, T2) in the series connections are driven in push-pull. To stabilize the current sum (I) passing through the two transistor amplifiers (T1, T3; T2, T4) connected in parallel there is a regulation circuit (T5) which compares the current sum (I) with a reference quantity (Vref) and feeds a correction signal in equal phase inputs of the amplifiers connected in parallel.
    Type: Grant
    Filed: January 4, 1981
    Date of Patent: May 22, 1984
    Assignee: Telefonaktiebolaget L M Ericsson
    Inventor: Bengt O. Berg
  • Patent number: 4447790
    Abstract: A distortion eliminating circuit includes an amplifier and a difference detector for detecting a difference between two signals. In this case, the input signal to the amplifier and the output signal therefrom, at least one of which is adjusted in level are applied to the difference detector, or the amplifier is made of a push-pull amplifier consisting of transistors opposite in conductivity type and a series connection of resistors is connected in parallel to a series connection of the emitter resistors of the push-pull amplifier to apply the output obtained at the connection point of the series connection of the resistors to the difference detector which is supplied with the input signal to the push-pull amplifier, and the output from the difference detector is added to the output from the amplifier, to thereby eliminate the distortion of the amplifier.
    Type: Grant
    Filed: October 8, 1981
    Date of Patent: May 8, 1984
    Assignee: Nippon Columbia Kabushikikaisha
    Inventors: Ryuichi Fukuda, Masami Fujiwara, Norio Ishiguro
  • Patent number: RE31749
    Abstract: A complementary inverter amplifier circuit comprising a complementary inverter including a p-channel MIS FET connected to a first source potential, an n-channel MIS FET connected to a second source potential, the gate of the two FETs being applied with a common linear input, respective load resistors connected to the drains of the complementary FETs, an output being derived from the interconnection point of the load resistors or from the drains of the FETs, and a bias resistor connected between the gate and the drain of each of the complementary FETs, the input being supplied to the gates of the FETs through respective capacitors. The p-channel FET and n-channel FET are individually biased so that the circuit may serve as a class B push pull amplifier of low power consumption.
    Type: Grant
    Filed: July 11, 1980
    Date of Patent: November 27, 1984
    Assignee: Hitachi, Ltd.
    Inventor: Osamu Yamashiro