Abstract: A technique for automatically controlling the gain of an amplifier by using a transistor as a voltage controlled variable degeneration resistor. The apparatus and method may be advantageously adapted for use in either voltage-to-current amplifiers or voltage-to-voltage amplifiers, single-ended or differential designs. One benefit of this technique is that, since the bias current is constant, the transistors operate in the correct region (i.e. the transistors are not biased out of the operating region). Additionally, the control mechanism is well-bounded.

Abstract: A gain control circuit that permits a variable gain amplifier circuit to operate with high input linearity and low power consumption is disclosed. The variable gain amplifier includes a standard differential bipolar transistor input circuit and a pair of degeneration transistors connected to a current source transistor. The gain control circuit provides a variable degeneration control voltage to vary the effective resistance of the degeneration transistors and a variable bias voltage to vary the current of the current source transistor. The input linearity of the variable gain amplifier is controlled independently of gain by adjusting the effective resistance and the current in an inverse relationship such that at maximum gain the current is at a maximum while the degeneration resistance is at a minimum, and at minimum gain the current is at a minimum while the degeneration resistance is at a maximum.

Abstract: A variable gain control circuit is provided comprising a bipolar transistor for amplifying an input signal applied to a base, and outputs an output signal via a collector; a serial exchanging unit connected between an emitter of the bipolar transistor; a first voltage node; a parallel exchanging unit connected between the collector of the bipolar transistor and the first voltage node, and wherein the gain of the variable gain control circuit increases in a high gain mode by activating the serial exchanging unit and deactivating the parallel exchanging unit, and the gain of the variable gain control circuit decreases in a low gain mode by deactivating the serial exchanging unit and activating the parallel exchanging unit.

Abstract: Continuous variable-gain low-noise amplifier. The amplifier continuously adjusts its gain between well-defined high and low values by using a cascode current-steering circuit to partition signal current between two different nodes of an output loading network. A shunt feedback network connected from an intermediate node of the loading network to the input provides negative feedback that linearizes the amplifier as its gain is decreased. The circuit degrades the noise figure at lower gains considerably less than conventional circuits by varying the gain without directly dumping the signal current to the power supply. The circuit produces only small changes in input and output impedances and preserves an improved reverse-isolation cascode characteristic as the gain is controlled.

Abstract: Continuously tuning a transconductance. Coupling a degeneration resistance from a first source of a first transistor in a differential pair of transistors to a second source of a second transistor in the differential pair of transistors. Applying a second variable degeneration resistance in parallel to the first degeneration resistance in response to the application of a first variable control voltage. And applying a third variable degeneration resistance in parallel to the first degeneration resistance and the second degeneration resistance in response to the application of a second variable control voltage having a fixed voltage offset from the first variable control voltage.

Abstract: A duplex radio transceiver, coupled to baseband circuitry and to an antenna, includes a receive chain, a transmit chain and a duplexer. The transmit chain includes filter components that attenuate signals originating from the transmit chain in a receive frequency band by a stop-band attenuation that is approximately equal to or greater than the stop-band attenuation of the duplexer in the receive band. Similarly, the receive chain includes filter components filter components that attenuate signals in a transmit frequency band by a stop-band attenuation that is approximately equal to or greater than the stop-band attenuation of the duplexer in the transmit band. A bias control circuit senses a power level associated with radio signals in the transmit chain and adjusts an amplifier in the receive chain responsive to the power level.

Abstract: A low noise amplifier with switchable gain settings comprises a cascoded emitter coupled pair (T1, T2, T5, T6; T3, T4, T7, T8) having a current diverter (T9, T10) which reduces the gain to an intermediate level in response to a control signal on terminals (8, 9). Further control signals on terminals (5, 10, 11, 12, 13) reduce the gain to a low level by introducing emitter degeneration (R3). To compensate for the increase in input impedance caused by the introduction of emitter degeneration feedback loops (C1, R8; C2, R9) are connected between the diversion path and the amplifier inputs.

Abstract: Continuously tuning a transconductance. Coupling a degeneration resistance from a first source of a first transistor in a differential pair of transistors to a second source of a second transistor in the differential pair of transistors. Applying a second variable degeneration resistance in parallel to the first degeneration resistance in response to the application of a first variable control voltage. And applying a third variable degeneration resistance in parallel to the first degeneration resistance and the second degeneration resistance in response to the application of a second variable control voltage having a fixed voltage offset from the first variable control voltage.

Abstract: A two stage amplifier circuit (10), the first stage (12) comprising a modified quad configuration and the second stage (14) comprising a translinear current amplifier configuration. The present invention achieves the advantages of fast response time, low distortion and improved bandwidth. The current gain of the second stage is represented by: (IAout1−IAout2)/(Iout1−Iout2)=(1+R123/R124)·(I135/I134)·(A/(1+A)) where A=gmQ109·R124.

Abstract: A switched gain circuit (350) that employs a plurality of conduction paths (378-384) that provide different levels of signal gain or attenuation to an analog input signal. Each conduction path (378-384) includes a plurality of switching devices (388-402 and 410-424), such as heterojunction bipolar transistors. Further, each conduction path includes a gain device such as a degenerative resistor, that provides gain or attenuation to the analog input signals. A separate control signal is applied to a switching device (410-424) in each conduction path (378-384) to select a particular conduction path to be coupled to the output. The analog input signal can be a differential analog input signal where a first part of the signal is coupled to the base terminal of a bipolar transistor (410-424) in each conduction path (378-384), and a second part of the analog signal is coupled to the base terminal of another bipolar transistor (410-424) in each conduction path (378-384).

Abstract: A degenerating device is connected between the emitter of the amplifying transistor and ground. A resistor connected across the FET switch provides a finite limit, the total resistance in the emitter circuit of the amplifying transistor. Additional circuitry may be provided in the emitter-based circuit of the amplifying transistor such as an impedance correcting circuit designed to compensate for changing base input impedance, the result of change in the resistance of the degeneration circuit.

Abstract: An automatically gain controllable linear differential amplifier using a variable degeneration resistor is disclosed. The linear differential amplifier includes an input end, a bias current source, a load unit, a first MOS transistor and a second MOS transistor. The linear differential amplifiers of the present invention can control an amplifying gain according to an input signal and improve linearity IIP3 without needing additional power consumption caused by improving the linearity. The automatically gain controllable linear differential amplifier uses NMOS/PMOS transistor so an integration process of the amplifier can be implemented more conveniently and efficiently.

Abstract: A simple, scalable cross-degeneration circuit topology is described. The inventive cross-degeneration method and apparatus provides a circuit design having substantially improved linearity as compared to traditional circuit designs having similar power consumption. The improvement in linearity is achieved without unduly increasing circuit noise and without substantially reducing circuit bandwidth. Using the present inventive method and apparatus, a fixed circuit configuration can be used to accommodate a continuous range of specifications simply by varying component values, in contrast to the prior art requirements of providing additional devices or modifying device wiring. The inventive topology can be implemented using bipolar technologies and conventional MOS processes operating above threshold. Additionally, the inventive circuits can be implemented using other three-terminal (or multi-terminal) amplifying device technologies.

Abstract: An input amplifier stage couples its output power to a second gain stage through a transformer. The transformer coupling allows for the removal of a diode voltage drop at a second gain stage, thereby allowing the collector of the transistor in the second stage to have a larger voltage swing.

Abstract: Transimpedance amplifiers are provided that generate low-distortion output voltage signals with simple, inexpensive structures that are compatible with integrated-circuit fabrication processes. The amplifiers include a current processor and a complementary output stage. The processor provides in-phase upper and lower current signals in response to a differential input current signal and differentially alters respective first and second amplitudes of these signals in response to a common-mode input current signal. The complementary output stage has upper and lower transistors that provide the output voltage signal in respective response to the upper and lower current signals and with distortion that is reduced by the altered first and second amplitudes.

Abstract: An amplifier including a first transistor whose emmiter is connected to an amplifier output and whose collector is connected to a first of two current supply terminals, with the base of the first transistor being connected to an input. A constant load circuit is connected between the emitter of the first transistor and the second current supply terminal. The constant load circuit is adapted to ensure that the current through the first transistor will always exceed a lowest value, so that the first transistor will always lie in a limited, generally linear area of its working curve.

Abstract: Continuously tuning a transconductance. Coupling a degeneration resistance from a first source of a first transistor in a differential pair of transistors to a second source of a second transistor in the differential pair of transistors. Applying a second variable degeneration resistance in parallel to the first degeneration resistance in response to the application of a first variable control voltage. And applying a third variable degeneration resistance in parallel to the first degeneration resistance and the second degeneration resistance in response to the application of a second variable control voltage having a fixed voltage offset from the first variable control voltage.

Abstract: An amplifier stage comprises a transistor, an output load, at least two resistive elements, and at least two control switches. The transistor has an input terminal, an output terminal and a ground terminal. The load has a first terminal coupled to the transistor output terminal and a second terminal coupled to a positive power supply source. A first resistive element comprises a first resistor having a first terminal and a second terminal, and a first diode having an anode coupled to the transistor ground terminal and a cathode coupled to the first terminal of the first resistor. A second resistive element comprises a second resistor having a first terminal and a second terminal, and a second diode having an anode coupled to the transistor ground terminal and a cathode coupled to the first terminal of second resistor. The first control switch couples the diode cathode to the positive power supply source.

Abstract: A degenerating device is connected between the emitter of the amplifying transistor and ground. A resistor connected across the FET switch provides a finite limit, the total resistance in the emitter circuit of the amplifying transistor. Additional circuitry may be provided in the emitter-based circuit of the amplifying transistor such as an impedance correcting circuit designed to compensate for changing base input impedance, the result of change in the resistance of the degeneration circuit.

Abstract: A single-ended circuit, such as an LNA (300), in accordance with the present invention includes an input power matching circuit (310) and a bias circuit (305) connected to an output transistor (Qin) which provides the amplification. A degeneration inductance (Le) and load impedance (Lo) couple to the emitter and collector of the output transistor (Qin), respectively. The bias circuit (305) is configured to eliminate base shot-noise of the mirror transistor (Q1) which generates the amplification. The bias circuit (305) in accordance with the present invention also eliminates the noise of the bias resistor (Rx1) that is included within the bias circuit (305). Specifically, the bias circuit (305) includes a current reference source (Iref) and an emitter follower circuit (315) connected to a current mirror circuit (Q1, Q2, Rx2) that connects to a bias resistor(Rx1). This bias circuit (305) can be implemented in a wide-class of single-ended circuits.

Abstract: A single-ended circuit, such as an LNA (300), in accordance with the present invention includes an input power matching circuit (310) and a bias circuit (305) connected to an output transistor (Qin) which provides the amplification. A degeneration inductance (Le) and load impedance (Lo) couple to the emitter and collector of the output transistor (Qin), respectively.

Abstract: A high-precision biasing circuit is provided for a CMOS cascode stage with inductive load and degeneration. The cascode stage includes at least two MOS transistors serially connected between a first voltage reference and a second voltage reference. The biasing circuit includes at least a first MOS replica transistor and a second MOS replica transistor, and two current generators for biasing the first and second MOS replica transistors. A circuit block detects a voltage value on a terminal of the second replica MOS transistor and applies a voltage to a gate terminal of the first replica transistor. Two circuit block implementations include a voltage amplifier and a folded cascode amplifier closed in a shunt feedback. Both implementations allow the threshold voltages of the cascode stage transistors to be tracked, as well as their Early and body effects.

Abstract: An input change-over amplifier is capable of effecting a change-over in outputting two signals having different frequencies, without lowering the signal levels thereof. Two signals having different frequencies are fed into two input terminals of an amplifying element. When a signal is input through one input terminal, the other input terminal is grounded. When a signal is input through the other input terminal, the above one input terminal is grounded. In this way, it is possible to effect a change-over in outputting two signals having different frequencies, without lowering the signal levels thereof. Further, since two signals can be fed into an amplifying element through different paths, it is not necessary to provide a matching circuit at a connection point of signal paths. Therefore, the number of required electronic parts can be reduced, an oscillator which is compact in size can be manufactured, and a necessary circuit can be designed within only a short time.

Abstract: Continuously tuning a transconductance. Coupling a degeneration resistance from a first source of a first transistor in a differential pair of transistors to a second source of a second transistor in the differential pair of transistors. Applying a second variable degeneration resistance in parallel to the first degeneration resistance in response to the application of a first variable control voltage. And applying a third variable degeneration resistance in parallel to the first degeneration resistance and the second degeneration resistance in response to the application of a second variable control voltage having a fixed voltage offset from the first variable control voltage.

Abstract: A microwave amplifier (10) of the present invention contains such an arrangement that both an inductor (12) and a resistor (13) are loaded in a parallel manner between a source electrode of a field-effect transistor (11) and the ground. Since the inductor (12) has a stray capacitance component (B), the inductor (12) is resonated at a resonant frequency “f0”. However, since the source electrode of the field-effect transistor (11) is grounded via a resistor (13) connected in parallel to the inductor (12), even when the inductor (12) is opened due to a resonant operation, the field-effect transistor (11) is operated under normal condition. As a result, the operation of the microwave amplifier (10) is stabilized.

Abstract: A current mirror circuit in accordance with the present invention overcomes many shortcomings of the prior art. A current mirror circuit for providing a current reference signal suitably includes at least one degeneration resistor to provide more degeneration for lower voltage noise while also including at least one clamping device to preventing saturation of the current mirror. The clamping device suitably comprises at least one diode, such as, for example, a Schottky-type diode. Moreover, the clamping device can be suitably configured to facilitate a higher slew rate of the current mirror circuit.

Abstract: A low noise adaptive bias circuit is provided for a low noise bipolar junction input transistor having an emitter degeneration inductance, of an integrated high frequency functional circuit driven by the collector current of the input transistor. The bias circuit includes a shunt line connecting the base node of the input transistor to a first supply node of opposite sign of that of a second supply node to which is coupled, through the degeneration inductance, to the emitter of the input transistor. The shunt line includes a bias current generator dependent, in an inversely proportional manner, on the current gain of the input transistor, and a resistance dependent, in a directly proportional manner, on the current gain of the input transistor.

Abstract: A linear, high frequency, variable gain amplifier is disclosed. The amplifier includes a differential amplifier transistor pair for providing a gain controlled output signal in response to an input signal. Diode pairs connected between the emitters of the transistors, in conjunction with transistor gain control circuitry, provide for gain control of the output signal. A dummy amplifier connected to the differential amplifier transistor pair cancels the capacitance effects created by the diode pair.

Abstract: An amplifier system for a radio receiver, comprising: an amplifier for amplifying a signal applied to an amplifier input to generate an amplifier output signal; a variable reactance means coupled between the emitter or source of the amplifier and a ground voltage; and a feedback loop for sensing the amplifier output signal and, in response to a relatively high level of the output signal, controlling the reactance of the variable reactance means to maintain the amplifier in a substantially linear mode of operation.

Abstract: A multi-stage low power, high dynamic range variable gain amplifier comprises an input stage cascaded with one or more current amplifier stages, whereby the gain of each stage may be independently controlled. The input stage may be comprised of a variable transconductance amplifier using variable emitter degeneration. The current amplifier may be comprised of a differential Darlington amplifier coupled to a differential cascode amplifier. The transconductance amplifier converts an input voltage signal to a current signal. The variable gain amplifier is designed for efficient low power operation.

Abstract: A variable attenuator is provided with a plurality of amplifiers each comprising an emitter grounded or common source amplifier circuit. The amplifiers have different emitter degeneration impedances. One of the amplifiers is selected in accordance with a gain control signal under control of a current switch controller. The selected amplifier is connected to a current source and supplied with an operating current, and thus the selected amplifier is set in an operating state. The other amplifiers are not supplied with an operating current and thus do not operate. The gain of the variable attenuator is determined by a ratio between the emitter degeneration impedance of the selected amplifier and a load impedance.

Abstract: The present invention solves the gain, noise figure, and distortion problems of prior art thermal compensation circuits by incorporating a temperature-compensating circuit in the feedback loop of a transistor amplifier arrangement. Using this method, the insertion loss is reduced as the gain of the amplifier varies proportionately to the temperature. This method has a negligible effect on the noise figure and distortion, and the incremental cost is much lower than the conventional circuits. Furthermore, the present invention can be used in both single-ended or push-pull dual amplifier configurations.

Abstract: The dynamic range of operation of a differential transconductance input stage is reduced when the amplitude of the input signal decreases, thus reducing the level of the noise that is generated by the input stage. A DC signal representative of the sensed amplitude of the input signal is employed for either reducing the value of a common, emitter-degenerating resistance or of the bias current that is forced in the two branches of the differential input stage.

Abstract: An amplifier stage including a differential pair (T1, T2) is provided with a resistive ladder (R1 . . . R2n) coupled between the second control electrodes of said differential pair. Taps on mirror positions along the resistive ladder (R1 . . . R2n) are switchably connected to first and second current source transistors (T3, T4), the current source transistors having their control electrodes connected to the first main electrodes of the transistors forming the differential pair. By placing the switches in series with the current source transistors (T3, T4), the influence of the non-linear impedance of the switches is reduced to negligibly small proportions as the output impedance of the current source transistors (T3, T4) is considerably higher than the impedance of the switches. Thus, a linear conversion impedance is obtained.

Abstract: An AGC amplifier used in a radio transmitter-receiver such as an portable telephone, in which a transistor for amplification is connected in series to a transistor for buffer as in direct current, and a third transistor is connected to the transistor for amplification, or to the transistor for amplification and the transistor for buffer to vary a feed-back quantity by varying a bias at a base or gate of the third transistor so as to vary a gain, thereby preventing a saturation characteristics of the circuit current from changing even In a change of the gain of the amplifier.

Abstract: A preamplifier for use with currents developed by a photodetecting diode is disclosed wherein the currents are coupled to the base of an NPN transistor connected as a common emitter stage and a feedback resistor is connected by way of a buffer amplifier to the base to provide a standard transimpedance configuration. A control loop monitors the signal level by integrating the output of the buffer amplifier, and upon the detection of large signals the control loop causes a MOSFET in parallel with the feedback resistor to decrease the transimpedance and thereby increase the signal handling capability of the preamplifier. The control loop is also connected to a second MOSFET in parallel with the collector load resistor of said NPN transistor to decrease the effective collector load impedance for large signal levels.

Abstract: A variable gain amplifier which includes a first voltage-to-current amplifier having a fixed gain; a second voltage-to-current amplifier having a variable gain, functioning in parallel to said first amplifier; a gain control and stabilization variable current generator; and a current-to-voltage converter. Current output signals produced by said first and second amplifiers and by said variable current generator are summed and the resulting current signal is converted to a voltage signal by said converter.

Abstract: A variable gain amplifier is provided which includes a transistor amplifier having a first bipolar transistor with a base connected to an input for receiving an input signal. The first transistor has a collector coupled to an output. A parallel feedback path is connected between the collector and the base of the first transistor. A series feedback path is connected to an emitter of the first transistor. The series feedback path has a PIN diode which operates as a variable resistance element and receives a variable gain control signal so as to generate a variable gain. A bias compensation network is connected to the variable resistance element for generating a variable current source that provides current bias to the variable resistance element. In addition, a buffer transistor may be further coupled between the collector of the first transistor and the output to further enhance gain performance. The buffer transistor may be biased through a current source transistor.

Abstract: A gain control circuit includes a first FET for serving as an active load, a second FET serving as an amplifier, and a third FET for serving as a current source. The first, second, and third FETs have substantially the same characteristics and are mutually connected in a series. The gain control circuit further includes a fourth FET for serving as a variable active load connected in parallel with the third FET and a capacitor connected between the third and fourth FETs. The fourth FET is also connected to a gain control terminal. The gain of the second FET is controlled by the voltage applied to the gate of the fourth FET through said gain control line.

Abstract: The circuit amplifies an input RF band of signals and exhibits a signal gain in decibels that is a linear function of a logarithmic control signal input. The circuit employs a transistor having an emitter electrode connected through an inductor/resistor combination to a source of common potential. Within a limited band of RF frequencies, the resistor inductor combination appears to be a high impedance. A PIN diode is connected in shunt across the resistor/inductor combination and, in response to a control current, alters its RF resistance. A capacitor is connected across the emitter of the transistor and provides a tuning function so that, at the mid-frequency of the RF band, a resonant tuned circuit results, thereby causing a high value resistive load to appear across the PIN diode. In this manner, linear gain control is achieved by varying a DC control current through the PIN diode.

Abstract: An amplifier circuit includes a grounded-collector circuit for converting an input signal voltage into a first signal current, a second transistor circuit for transmitting the first signal current to an output side, a variable impedance for converting the first signal current transmitted to the output side into a voltage, and a circuit block having a voltage generation circuit connected in series to the variable impedance. A transistor constituting the grounded-collector circuit has a collector connected to a junction of the voltage generation circuit and the variable impedance and an emitter connected to an input side of the second transistor. The amplifier circuit has an operation point in which input and output voltages are maintained constant even if a gain is varied.

Abstract: A gain control circuit arrangement comprises a transistor amplifier (A) for providing an output signal (OP) in response to a received input signal (IP). The gain of the transistor amplifier (A) is controlled by means of a field effect transistor (TF) connected in the emitter circuit of the amplifier and included in a feedback control loop to which a gain control signal (Ref A) is applied in operation of the gain control arrangement. A collector load of the amplifier comprises a potential divider (R1 and R2) one portion of which is shunted by a control loop which serves to maintain constant the collector current passing through the transistor amplifier.

Abstract: A programmable gain instrumentation amplifier includes first and second differential subcircuits, each of which includes first and second input transistors, a first constant current source, first and second gain selection transistors, an output transistor, and a second constant current source. The bases of the first and second input transistors of the first and second subcircuits are connected, respectively, to first and second input terminals. The emitters of the first and second input transistors are connected to first and second gain resistors, respectively, and also are connected to collectors of the first and second gain selection transistors, respectively. The bases of the first and second gain selection transistors of the first and second subcircuits are coupled to first and second gain selection signals, respectively. Collectors of the first and second input transistors are connected to the first constant current source.

Abstract: Herein disclosed is a variable gain amplifying circuit which comprises a heating element, a heat-sensitive resistance coupled thermally to the heating element, an amplifier including the heat-sensitive resistance, and means for controlling the heat of the heat element. This heat of the heating element is controlled so as to control the value of the heat-sensitive resistance. As a result that the value of the heat-sensitive resistance is controlled, the gain of that amplifier is controlled.

Abstract: Disclosed is a gain circuit which comprises a transistor for amplifying a high-frequency signal, a variable impedance element connected with an emitter of the transistor and having an impedance variable in accordance with an amount of current flowing therethrough, a control circuit for controlling the amount of current flowing through the variable impedance element, a series circuit composed of a coil and a resistor connected in series with each other, and another resistor connected between the series circuit and a power supply terminal, the variable impedance element and the series circuit being connected in parallel with each other.

Abstract: A variable resistance gain control integrated circuit has a resistor inserted between the emitters of two transistors serving as a differential pair, and two transistors which serve as an active load and have their emitters connected to the emitters of the two transistors serving as a differential pair. The resistor and the transistors serving as the active load are formed within a single semiconductor island region.

Abstract: A monolithic integrated circuit device is formed on a substrate and made up of an AC negative feedback circuit for a high frequency amplifier circuit. The AC negative feedback circuit includes a semiconductor impedance element and connected to an external terminal on the substrate, and variable control means for adjusting an amount of the AC feedback of the high frequency amplifier circuit. As the semiconductor impedance element is used the junction capacitance of a diode under negative bias, diffusion capacitance between the base and emitter electrodes or between the base and collector electrodes of a transistor or a differentiated resistance of a diode.

Abstract: An amplifier topology suitable for amplification of the frequency dependent output of a transducer to provide a frequency equalized amplifier output includes a first transconductive stage for converting a voltage input signal to the current domain through a signal node and a second transreactive stage for converting the signal current into an output voltage. An active equalization network feeds back a representation of the output signal to the signal node in such a way that the fed back signal voltage error is not affected by the high impedance thereat to provide error correction feedback that is achromatic with frequency and, accordingly, does not vary across the range of frequencies amplified, to provide the second amplifier with a frequency independent closure ratio, while not reducing second amplifier voltage gain.

Abstract: A gain-controlled amplifier is provided, including first and second common emitter-coupled amplifying transistors for receiving differential input signals. The emitter circuits of the amplifying transistors include first and second controlled resistance devices, having base electrodes coupled to each other and to a source of gain-control potential, collector electrodes coupled to a source of reference potential, and respective emitter electrodes coupled to respective emitter electrodes of the amplifying transistors. Each of the controlled resistance devices includes a region of high resistivity (intrinsic) semiconductor material between the base and emitter electrodes, which gives the base-to-emitter junction of the device a PIN diode-like characteristic. The application of a gain-control potential to the bases of the devices may be used to vary both the small base-to-emitter current and the relatively larger emitter-to-collector current in the devices.

Abstract: Differential amplifier having multiple stages, each stage having the gain thereof set by digital control. The gain of each stage is individually controlled, thereby allowing wide dynamic range and gain. Each stage has a differential pair with multiple sets of gain-setting resistors in the emitters of the pair. By selecting which resistor set, or combination of resistor sets, is used, the gain of the stage is controlled. The result is a 4 stage, 0-45 dB gain amplifier for RF or IF applications, with the gain adjustable in 3 dB increments.