Including Current Mirror Amplifier Patents (Class 330/288)
  • Patent number: 7636016
    Abstract: An all-NPN bipolar junction current mirror circuit for mirroring an input reference current is disclosed. The circuit includes an input stage for providing an input reference current to the current mirror circuit, a reference stage for mirroring the input reference current and an output stage electrically connected to the reference stage for providing the mirrored input current to at least one load.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: December 22, 2009
    Assignee: Board of Regents, The University of Texas System
    Inventors: Howard T. Russell, Ronald L. Carter, Wendell A. Davis
  • Patent number: 7633346
    Abstract: A transconductance compensating bias circuit is disclosed that includes a first field-effect transistor (FET) having a first electrode, a second electrode, and a gate connected to the first electrode, wherein a reference current flows through the first and second electrodes; a second FET having a first electrode, a second electrode, and a gate connected to the gate of the first FET, wherein a bias current flows through the first and second electrodes; a resistor connected to the second electrode of the first or second FET; and a comparison part configured to output a signal corresponding to the result of comparison of the first potential of the first electrode of the first FET and the second potential of the first electrode of the second FET. The reference current and the bias current are controlled by the output signal of the comparison part so as to equalize the first and second potentials.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: December 15, 2009
    Assignee: Fujitsu Limited
    Inventor: Kazuaki Oishi
  • Publication number: 20090295486
    Abstract: An operational amplifier includes an amplifying circuit and a bais current generating circuit. The bias current generating circuit generates a bias current to the amplifying circuit. The amplifying circuit comprises a current adjusting unit and a current mirror. The current adjusting circuit has a storage element, receives a reference current and generating a passing current. The passing current is gradually adjusted utilizing the storage element according to a control signal. The current mirror receives the passing current to generate the bias current.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 3, 2009
    Inventor: Ching-Chung Lee
  • Patent number: 7622993
    Abstract: A current mirror circuit including: a first resistance element having one terminal connected to a first potential, and the other terminal connected to a second potential lower than the first potential; an operational amplifier having a high-potential input terminal connected to the first potential and the one terminal of the first resistance element; a second resistance element having one terminal connected to a low-potential input terminal of the operational amplifier, and the other terminal connected to the second potential; and a transistor having a first electrode connected to an output terminal of the operational amplifier, a second electrode connected to the low-potential input terminal of the operational amplifier and the one terminal of the second resistance element, and a third electrode used as an output terminal, wherein the first and second resistance elements both start to operate from a linear area having lower voltage than a saturation area.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: November 24, 2009
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Yoshiki Niki, Haruo Kobayashi, Koichiro Mashiko
  • Publication number: 20090278028
    Abstract: A first transistor is provided on a current path for a phototransistor. A first resistor is provided between one terminal of the first transistor and the power supply line. A second transistor forms a current mirror circuit in cooperation with the first transistor, which amplifies with a predetermined amplification factor the current that flows through the first transistor. A charge capacitor, one terminal of which is connected to a fixed electric potential, is charged with the current thus amplified. A second resistor is provided between one terminal of the second transistor and the power supply line.
    Type: Application
    Filed: October 10, 2006
    Publication date: November 12, 2009
    Applicant: ROHM CO., LTD.
    Inventor: Masao Yonemaru
  • Publication number: 20090278603
    Abstract: The present invention relates to an all n-type transistor current mirror for mirroring an input current to an output current. The current mirror comprises an input n-type transistor (T4, QO, T1) interposed between a positive supply plane (VCC) and an input node (104, 202, 310) with its collector being connected to the positive supply plane (VCC) and its emitter being connected to the input node (104, 202, 310). An output n-type transistor (T3, Q1, T2) is interposed between the positive supply plane (VCC) and an output node (106, 204, 314) with its collector being connected to the positive supply plane (VCC) and its emitter being connected to the output node (106, 204, 314). A feedback circuit equals base-emitter voltages of the input (T4, QO, T1) and the output transistor (T3, Q1, T2) in order to mirror the emitter current of the input transistor (T4, QO, T1) to the emitter current of the output transistor (T3, Q1, T2).
    Type: Application
    Filed: October 13, 2005
    Publication date: November 12, 2009
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Giuseppe Grillo, Mihai Adrian Tiberiu Sanduleanu, Johannes Hubertus Antonius Brekelmans
  • Patent number: 7589592
    Abstract: A system for pre-charging a current mirror includes a controller configured to provide a first current and an additional current to a current mirror to rapidly charge a capacitance associated with the current mirror based on a reference voltage.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: September 15, 2009
    Assignee: Skyworks Solutions, Inc.
    Inventors: Robert Michael Fisher, Michael L. Hageman, David S. Ripley
  • Patent number: 7589586
    Abstract: A high frequency signal detection circuit includes an input terminal for a high frequency signal to be detected, a switch transferring the high frequency signal as intermittent ringing signal to a first node in response to a pulse signal whose frequency is lower than that of the high frequency signal, a transistor amplifying the signal at the first node, and outputting to a second node, a bias generator generating a bias voltage by which the transistor is operated in its weak inversion region, a resonant circuit outputting the bias voltage to the first node, and resonating the high frequency signal, a capacitor removing a high frequency component of the signal at the second node; and a judgment circuit judging whether or not the high frequency signal is inputted by detecting the signal at the second node, which has the same frequency as the pulse signal.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: September 15, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Hiroyuki Toda
  • Patent number: 7573336
    Abstract: A bias circuit 22 in a power amplifier 1 is provided with a VBE-controlled voltage source circuit 20 and a Nagata current mirror circuit 21. The Nagata current mirror circuit 21 includes a transistor Tr5 and a transistor Tr6. The transistor Tr5 has its emitter grounded, its base connected to a control input terminal 17 via a resistor R3, and its collector connected to that base via a resistor R4. The transistor Tr6 has its emitter grounded, its base connected to the collector of the transistor Tr5, and its collector connected to the base of the transistor Tr3. The arrangement is capable of compensating both the temperature characteristics of the gain of the power amplifier 1 and the control input voltage characteristics of the gain of the power amplifier 1. In other words, the arrangement is capable of reducing the temperature dependence and control input voltage dependence of the gain of the power amplifier 1.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: August 11, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiteru Ishimaru, Motoko Furukawa
  • Publication number: 20090189687
    Abstract: A circuit (e.g., a reconstruction filtering circuit) may include a single operational amplifier (op-amp) that is arranged to receive a voltage input and that is arranged to have a biasing of constant gmR, a first device capacitor that is operatively coupled to an output of the single op-amp, a first resistor that is operatively coupled to the first device capacitor, a second device capacitor that is operatively coupled to the first resistor, and a mirror device that is operatively coupled to the second device capacitor, where the mirror device is arranged to provide a feedback loop as a feedback input to the single op-amp and that is arranged to provide a current output.
    Type: Application
    Filed: January 25, 2008
    Publication date: July 30, 2009
    Applicant: BROADCOM CORPORATION
    Inventors: Ahmad Mirzaei, Alireza Zolfaghari, Hooman Darabi
  • Publication number: 20090160557
    Abstract: A self-biased cascode current mirror circuit, including a first transistor having a first current electrode, a control electrode, and a second current electrode; a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the first current electrode of the first transistor, and a second current electrode coupled to a terminal; a third transistor having a first current electrode configured to provide an output current, a control electrode coupled to the control electrode of the first transistor and the first current electrode of the third transistor, and a second current electrode; and a fourth transistor having a first current electrode coupled to the second current electrode of the third transistor, a control electrode coupled to the control electrode of the second transistor, and a second current electrode coupled to the terminal.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 25, 2009
    Applicant: Infineon Technologies AG
    Inventors: RAIMONDO LUZZI, Marco Bucci, Alessandro Trifiletti
  • Publication number: 20090146739
    Abstract: In an optical receiver and amplifier and an optical coupler, a technique for stabilize operations at turning on/off of a power supply by a simple configuration is desired. An optical receiver and amplifier includes: a photodiode generates a photocurrent in response to a light input; an output section outputs output voltage being a low level or a high level in response to a magnitude of the photocurrent by using a power supply voltage supplied from a power supply; and an output control circuit controls an input voltage of the output section such that the output voltage is set to the low level when the power supply is turned on or off during a period where the power supply voltage is lower than a predetermined value. The output voltage can be set to the low level so that an additional circuit for preventing malfunction is not needed.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 11, 2009
    Applicant: NEC Electronics Corporation
    Inventors: Masafumi SHIMIZU, Shinya Sawamoto
  • Patent number: 7532066
    Abstract: Embodiments of apparatuses, articles, methods, and systems for a bias network providing a stable transient response are generally described herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: May 12, 2009
    Assignee: TriQuinto Semiconductor, Inc.
    Inventors: Wayne M. Struble, Haoyang Yu
  • Patent number: 7525387
    Abstract: An amplifier circuit includes a first bipolar transistor of which the emitter is connected to the ground, and a bias circuit of the first bipolar transistor. The bias circuit includes a second bipolar transistor constituting a current mirror circuit along with the first bipolar transistor, a first resistor connected to the bases of the first bipolar transistor and the second bipolar transistor, and a third bipolar transistor of which the emitter is connected to the bases of the first bipolar transistor and the second bipolar transistor through the first resistor, and of which the base is connected to the collector of the second bipolar transistor. The first bipolar transistor amplifies a signal input to the base thereof and then outputs the amplified signal from the collector of the first bipolar transistor.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: April 28, 2009
    Assignee: Panasonic Corporation
    Inventors: Zaman Iqbal Kazi, Junji Ito, Toshihiro Shogaki
  • Publication number: 20090103381
    Abstract: The asynchronous sense amplifier for a ROM comprises a current-mirror circuit, a first negative feedback inverter, a second negative feedback inverter, a first transistor group, a second transistor group and a feedback transistor. The feedback transistor connects the junction of the first transistor group and the first set of the current-mirror circuit and/or the junction of the second transistor group and the second set of the current-mirror circuit to ground, where the feedback transistor is controlled by the output of the first negative feedback inverter and/or the second negative feedback inverter, and the feedback transistor is smaller than one transistor of the second transistor group.
    Type: Application
    Filed: October 22, 2007
    Publication date: April 23, 2009
    Applicant: Winbond Electronics Corp.
    Inventor: Hideharu Koike
  • Patent number: 7522002
    Abstract: A current mirror circuit includes a first current-mirror transistor coupled to a second current-mirror transistor. A load is coupled to the second current-mirror transistor. A first current source is coupled to the first current-mirror transistor to cause a bias current to flow through the first current-mirror transistor and a second current source is coupled to the second current-mirror transistor and in parallel with the load to shunt the bias current away from the load.
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: April 21, 2009
    Assignee: Atmel Corporation
    Inventors: Gabriele Pelli, Lorenzo Bedarida, Massimiliano Frulio, Andrea Bettini
  • Patent number: 7522001
    Abstract: An emitter follower circuit applies to an input terminal of a second amplifying device a voltage according to a reference voltage applied to a reference terminal. First and second resistors are connected in series between the reference terminal and an input terminal of a first amplifying device. The collector of a first transistor is connected to the reference terminal and a control voltage is applied to the base of the first transistor. A third resistor is connected between the emitter of the first transistor and a grounding point. A current mirror circuit draws a current proportional to a current input from the collector of the first transistor from a connection point of the first and second resistors.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: April 21, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Publication number: 20090091393
    Abstract: A dual-path current amplifier having a slow high-gain path and a fast low-gain path is described. In one design, the slow high-gain path is implemented with a positive feedback loop and has a gain of greater than one and a bandwidth determined by a pole. The fast low-gain path has unity gain and wide bandwidth. The two signal paths receive an input current and provide first and seconds currents. A summer sums the first and second currents and provides an output current for the dual-path current amplifier. The dual-path current amplifier may be implemented with first and second current mirrors. The first current mirror may implement the fast low-gain path. The first and second current mirrors may be coupled together and implement the slow high-gain path. The first current mirror may be implemented with P-FETs. The second current mirror may be implemented with N-FETs, an operational amplifier, and a capacitor.
    Type: Application
    Filed: October 3, 2007
    Publication date: April 9, 2009
    Applicant: QUALCOMM Incorporated
    Inventors: Xiaohong Quan, Marzio Pedrali-Noy
  • Publication number: 20090079505
    Abstract: Ground skimming output stages that are designed to drive wideband signals with the ability to provide a high quality output signal all the way to the low supply rail are provided. In accordance with an embodiment of the present invention, the output stage of the present invention includes a translinear current controller, an output transistor and a current mirror. While not limited thereto, embodiments of the present invention only require a single positive power supply, consistent with the recent trend toward integrated circuits that only require a single low voltage power supply.
    Type: Application
    Filed: December 1, 2008
    Publication date: March 26, 2009
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Robert David Zucker, Barry Harvey
  • Publication number: 20090072909
    Abstract: An all-NPN bipolar junction current mirror circuit for mirroring an input reference current is disclosed. The circuit includes an input stage for providing an input reference current to the current mirror circuit, a reference stage for mirroring the input reference current and an output stage electrically connected to the reference stage for providing the mirrored input current to at least one load.
    Type: Application
    Filed: September 17, 2007
    Publication date: March 19, 2009
    Inventors: Howard T. Russell, Ronald L. Carter, Wendell A. Davis
  • Patent number: 7501896
    Abstract: A high frequency power amplifier electronic component (RF power module) is so constituted as to apply bias to an amplifier FET in current mirror configuration. In this RF power module, deviation of a bias point due to the short channel effect of the FET is corrected, and variation in high frequency power amplifier characteristics is reduced. The high frequency power amplifier circuit (RF power module) is so constituted that the bias voltage for the amplifier transistor in a high frequency power amplifier circuit is supplied from a bias transistor connected with the amplifier transistor in current mirror configuration. In addition to a pad (external terminal) connected with the control terminal of the amplifier transistor, a second pad is provided which is connected with the control terminal of the bias transistor connected with the amplifier transistor in current mirror configuration.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: March 10, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Makoto Ishikawa, Hirokazu Tsurumaki, Masahiro Kikuchi, Hiroyuki Nagai
  • Publication number: 20090051434
    Abstract: A signal transfer circuit appropriate for use in realizing both high circuit stability and high current driving ability is disclosed. Signal transfer circuit A has current transfer circuit 3 that transfers a signal current via first reference current I1. In one embodiment, current transfer circuit 3 has current transcription circuit 30 that transcribes signal current Is to first current portion I1-1 of first reference current I1, and output current path 32 that transfers the first current portion I1-1. In one embodiment, current transfer circuit 30 has first current branching circuit 300 and second current branching circuit 302.
    Type: Application
    Filed: October 28, 2008
    Publication date: February 26, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Akira Takahashi
  • Publication number: 20090051435
    Abstract: An RF transmitting device (10) includes an RF amplifier (22) formed having components formed on a common semiconductor substrate (14). RF amplifier (22) includes MOS transistors (42) and (44) and an RF choke (46) stacked between a ground node (32) and a Vdd node (36). Transistors (42) and (44) are directly connected together and are biased by a control terminal bias network (58) so that the voltages appearing across their conduction terminals are about equal. Control terminals (56) and (62) of transistors (42) and (44) are driven by in-phase versions of an RF input signal (20).
    Type: Application
    Filed: August 20, 2007
    Publication date: February 26, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: James R. Griffiths, David M. Gonzalez
  • Patent number: 7485838
    Abstract: The present invention provides a photoelectric conversion device capable of detecting light from weak light to strong light and relates to a photoelectric conversion device having a photodiode having a photoelectric conversion layer; an amplifier circuit including a transistor; and a switch, where the photodiode and the amplifier circuit are electrically connected to each other by the switch when intensity of entering light is lower than predetermined intensity so that a photoelectric current is amplified by the amplifier circuit to be outputted, and the photodiode and part or all of the amplifier circuits are electrically disconnected by the switch so that a photoelectric current is reduced in an amplification factor to be outputted. According to such a photoelectric conversion device, light from weak light to strong light can be detected.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: February 3, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuo Nishi, Tatsuya Arao, Atsushi Hirose, Yuusuke Sugawara, Naoto Kusumoto, Daiki Yamada, Hidekazu Takahashi
  • Patent number: 7482876
    Abstract: An amplifier circuit includes a first series circuit connected between a supply voltage and a reference potential. The first series circuit includes a current source, a first tap and a first component configured as a diode. The amplifier circuit also includes a second series circuit connected between the supply voltage and the reference potential, and includes a controlled path between a first connection and a second connection of a first transistor and a second tap. The control connection of the first transistor is coupled to the first tap. The second tap is used to output a bias voltage. The amplifier circuit includes an amplifier stage coupled to the second tap for setting an operating point of the amplifier stage.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: January 27, 2009
    Assignee: Infineon Technologies AG
    Inventor: Michael Asam
  • Patent number: 7482858
    Abstract: A temperature-sensitive current source includes a first MOS transistor having a source coupled to a first voltage; a second MOS transistor having a source coupled to the first voltage, and a gate coupled to a gate of the first MOS transistor, such that a current output at a drain of the second MOS transistor mirrors a current passing across the first MOS transistor; and a resistor coupled between the source and a drain of the first MOS transistor in parallel, such that the current passing across the first MOS transistor is substantially larger than a current passing through the resistor, wherein the first and second MOS transistors operate in a saturation mode, such that the output current at the drain of the second MOS transistor is responsive to a change of temperature.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: January 27, 2009
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shine Chung, Jonathan Hung
  • Publication number: 20090021308
    Abstract: A voltage regulator circuit comprises an amplifier, bias network and startup circuit. The bias network is configured to generate a bias voltage for setting a bias current in the amplifier. The startup circuit is configured to mirror the amplifier bias current and to assist the bias network in setting the amplifier bias current based on the mirrored amplifier bias current until the bias voltage approximates a desired level.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 22, 2009
    Inventor: Benjamin Heilmann
  • Publication number: 20080315993
    Abstract: Briefly, in accordance with one or more embodiments, a dual mode power amplifier is capable of operating in either linear mode such as class A operation, or a non-linear mode such as class F operation. The power amplifier may be utilized in an RFID interrogator. The power amplifier may be biased to operate in a linear mode if the power amplifier is operating in a higher linearity mode, or may be biased to operate in a non-linear mode if the power amplifier is operating in a higher efficiency, lower power mode. The power amplifier may comprise two or more amplifiers coupled in parallel. A current mirror circuit may turn on more amplifiers if the power amplifier is operating in a higher power mode, and may turn on fewer amplifiers if the power amplifier is operating a lower power mode.
    Type: Application
    Filed: June 22, 2007
    Publication date: December 25, 2008
    Inventors: Issy Kipnis, Daniel Bjork, Jan Rapp
  • Patent number: 7466202
    Abstract: A CMOS current mirror is provided that includes a current input, an input transistor, whose conductivity path is located between the current input and a reference potential terminal, a current output, an output transistor, whose conductivity path is connected to the reference potential terminal and which supplies the current output with an output current, a gate node common for both transistors, and a supply potential terminal. The current mirror further includes a first additional transistor, whose conductivity path is located between the supply potential terminal and the gate node and whose gate terminal is connected to the current input, and a second additional transistor, whose conductivity path is located between the gate node and the reference potential terminal and whose gate terminal is connected to the gate node.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: December 16, 2008
    Assignee: Atmel Germany GmbH
    Inventors: Udo Karthaus, Peter Kolb
  • Publication number: 20080303596
    Abstract: An amplifier circuit is disclosed having an output transistor for driving a complex load over a drive frequency range, wherein in the lower part of the range an inductive component of the load dominates and in the upper part the inductive component does not dominate. The amplifier circuit includes a current mirror circuit that is connected upstream of the output transistor and has a shunt path to a second potential, for the purpose of relatively reducing a DC current flowing through the output transistor in comparison with an AC current flowing through the latter.
    Type: Application
    Filed: June 6, 2007
    Publication date: December 11, 2008
    Inventors: Xianghua Shen, Markus Schimper
  • Patent number: 7459977
    Abstract: A signal transfer circuit appropriate for use in realizing both high circuit stability and high current driving ability is disclosed. Signal transfer circuit A has current transfer circuit 3 that transfers a signal current via first reference current I1. In one embodiment, current transfer circuit 3 has current transcription circuit 30 that transcribes signal current Is to first current portion I1-1 of first reference current I1, and output current path 32 that transfers the first current portion I1-1. In one embodiment, current transfer circuit 30 has first current branching circuit 300 and second current branching circuit 302.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: December 2, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Akira Takahashi
  • Patent number: 7449955
    Abstract: A chain-chopping current mirror and a method for stabilizing output currents are disclosed. The current mirror includes multiple output nodes, a bias source unit, multiple current mirroring units and multiple switch components. The bias source unit provides a reference bias according to the received current. Each of the current mirroring units outputs an output current according to the reference bias. The control terminal of each the switch component receives a clock signal and determines whether the first terminal thereof is coupled with the second terminal or the third terminal thereof according to the clock signal, wherein the first terminal of the ith switch component is coupled with the output terminal of the ith current mirroring unit, the second terminal thereof is coupled with the ith output node and the third terminal thereof is coupled with the (i+1)th output node, where i is a natural number.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: November 11, 2008
    Assignee: Silicon Touch Technology Inc.
    Inventor: Fu-Yang Shih
  • Patent number: 7439776
    Abstract: A peak detector can advantageously increase its bandwidth, i.e. its charging and discharging speed, while minimizing the ripple of its output signal by sensing the charging current of a storage device. In response to that charging current, the peak detector can control a discharge current, thereby accelerating its response. For example, the peak detector can reduce a discharge current in response to an increased charging current (which indicates a charging phase) and increase the discharge current in response to a decreased charging current (which indicates a discharge phase).
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: October 21, 2008
    Assignee: Atheros Communications, Inc.
    Inventor: Manolis Terrovitis
  • Patent number: 7439796
    Abstract: A current mirror circuit that allows for over voltage stress testing includes: a first transistor; a second transistor having a gate coupled to a gate of the first transistor; a switch coupled between the gate of the first transistor and the drain of the first transistor; a bias source coupled to a control node of the switch such that the switch is ON during normal current mirror operation, and the switch is OFF during over voltage stress testing; and a clamp coupled between the control node of the switch and a source node.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: October 21, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Amer Hani Atrash, Reed Wilburn Adams
  • Patent number: 7439806
    Abstract: A bias control circuit for an RF amplifier having an output device for providing an output signal to a load and a driver device for driving the output device includes a current mirror circuit for providing a driver device bias current to the driver device and an output device bias current to the output device. When the amplifier operates in a high power mode, the current mirror circuit supplies the driver device bias current at a level to turn on the driver device at a high current level and an output device bias current to turn on the output device. When the amplifier operates in a low power mode, the current mirror circuit supplies a driver device bias current to turn on the driver device at a reduced current level and an output device bias current to turn off the output device.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: October 21, 2008
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Gee Samuel Dow
  • Patent number: 7432765
    Abstract: A variable gain amplifier includes a voltage-to-current converter for converting the input voltage to a current, a current amplifier for amplifying the current converted by the voltage-to-current converter, a current-to-voltage converter for converting the current amplified by the current amplifier into a voltage, and a controller for controlling an amplification factor of the current amplifier.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: October 7, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Iwao Kojima
  • Patent number: 7425870
    Abstract: There is disclosed a current mirror circuit comprising a first transistor having a first electrode connected to a first potential, a second electrode connected to a second potential lower than the first potential, and a third electrode connected to a third potential higher than the second potential, a second transistor having a first electrode connected to the first potential and the first electrode of the first transistor, and a second electrode connected to the second potential, an operational amplifier having a high-potential input connected to the third potential and the third electrode of the first transistor, and a low-potential input connected to the third electrode of the second transistor, and a third transistor having a first electrode connected to an output of the operational amplifier, a second electrode connected to the low-potential input and the third electrode of the second transistor, and a third electrode used as an output terminal.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: September 16, 2008
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Yoshiki Niki, Haruo Kobayashi, Koichiro Mashiko
  • Patent number: 7420419
    Abstract: A variable gain voltage/current converter circuit of the present invention has an input section active element having an input terminal, an output terminal, and a ground terminal for performing a voltage/current conversion, a potential control circuit for controlling a conversion gain of the input section active element based on a potential at the output terminal of the input section active element, an output section voltage/current converter circuit for generating a current corresponding to a voltage signal generated from the potential control circuit, and a current compensation circuit connected to the output terminal of the input section active element for generating a DC current in accordance with the amount of DC current which flows from the output terminal of the input section active element to the input section active element. The current compensation circuit compensates for a change in a DC current of the input section active element, which occurs when the conversion gain is adjusted.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: September 2, 2008
    Assignee: NEC Corporation
    Inventor: Shinichi Hori
  • Publication number: 20080186101
    Abstract: A circuit and a method for biasing a compound cascode current mirror (CCCM) that enables high-voltage swing at the output and accurate current mirroring is presented. The CCCM has mirror transistors and cascode transistors which may be of a different technology kind. The drain-source voltage Vds of the mirror transistor on the input leg of the CCCM is held at a voltage Vov that is generated by the biasing circuit; Vov is the overdrive voltage of the input mirror transistor of the CCCM and the value of Vov is maintained by the bias circuit and a feed-back amplifier such that the mirror transistor remains on the edge of its active region, over manufacture deviations and tracks even over operational conditions such as temperature and supply variations. The feed-back amplifier drives the gates of the cascode transistors and uses its feedback node to hold the Vds at Vov.
    Type: Application
    Filed: April 30, 2007
    Publication date: August 7, 2008
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Abhijith Arakali, Sunil Rafeeque
  • Publication number: 20080164948
    Abstract: A current mirror circuit includes a first current-mirror transistor coupled to a second current-mirror transistor. A load is coupled to the second current-mirror transistor. A first current source is coupled to the first current-mirror transistor to cause a bias current to flow through the first current-mirror transistor and a second current source is coupled to the second current-mirror transistor and in parallel with the load to shunt the bias current away from the load.
    Type: Application
    Filed: January 4, 2007
    Publication date: July 10, 2008
    Applicant: Atmel Corporation
    Inventors: Gabriele Pelli, Lorenzo Bedarida, Massimiliano Frulio, Andrea Bettini
  • Publication number: 20080157875
    Abstract: Aspects of a method and system for precise current matching in deep sub-micron technology may include adjusting a current mirror to compensate for MOSFET gate leakage currents by using feedback circuits. The feedback circuits may be implemented from active components to create active feedback circuits. If the reference current to be mirrored is noisy, a smoothing effect may be achieved by introducing a low-pass filter coupled to the current mirror design. The active feedback may comprise amplifiers, which may comprise one or more amplifier stages. The amplifier may amplify either a bias voltage error or a bias current error. Furthermore, a transimpedance amplifier may be utilized in the feedback loop. The output bias current of the current mirror may be stabilized dynamically during adjusting. Multiple current sources may be utilized in the current mirrors.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Arya Behzad, Stephen Chi-Wang Au, Dandan Li
  • Patent number: 7394308
    Abstract: A circuit for generating a reference current, comprising a positive feedback loop, a negative feedback loop, and a floating current mirror coupled to the positive feedback loop. The negative feedback loop may operate to divert current directly from the floating mirror, and may also operate to divert current from the floating mirror by using a voltage follower. The circuit may operate with a minimum supply voltage of approximately the sum of the threshold voltage of a transistor plus three drain saturation voltages, in one example.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: July 1, 2008
    Assignee: Cypress Semiconductor Corp.
    Inventors: Jonathon C. Stiff, Jay Kuhn
  • Patent number: 7391404
    Abstract: There is provided a thin film transistor circuit used for a driver circuit for providing a semiconductor display device without a picture blur and with high fineness/high resolution. In the thin film transistor circuit, a TFT having a large size (channel width) is not used, but a plurality of TFTs each having a small size are connected in parallel to each other and are used. By this, while sufficient current capacity of the thin film transistors is secured, fluctuation in the characteristics can be decreased.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: June 24, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Publication number: 20080136525
    Abstract: The invention relates to a current pre-amplifier (11) with an input (N1) capable of receiving or supplying an input current (i3) with at least one pulse, wherein the pre-amplifier comprises a regulated cascode stage comprising an input transistor (M1) and a first current generator (S1) as well as an output transistor (M2) and a second current generator (S2), wherein said pre-amplifier comprises: detection means (M5, M6) capable of detecting an input current pulse (i3), and feedback means (M3, M6, M4, M5, R1, C1, M3, M7, M8, R2, C2) capable of increasing the current supplied by the first and/or the second current generator during the entire detection of the input current pulse.
    Type: Application
    Filed: December 4, 2007
    Publication date: June 12, 2008
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventor: Michael TCHAGASPANIAN
  • Publication number: 20080100382
    Abstract: A system for pre-charging a current mirror includes a controller configured to provide a first current and an additional current to a current mirror to rapidly charge a capacitance associated with the current mirror based on a reference voltage.
    Type: Application
    Filed: October 31, 2007
    Publication date: May 1, 2008
    Inventors: Robert Michael Fisher, Michael L. Hageman, David S. Ripley
  • Publication number: 20080102759
    Abstract: A circuit for biasing a gallium arsenide (GaAs) power amplifier includes a reference voltage generator circuit implemented in a gallium arsenide (GaAs) material system, a field effect transistor (FET) bias circuit implemented in the gallium arsenide material system and adapted to receive an output of the reference voltage generator circuit and adapted to provide an output to a radio frequency (RF) amplifier stage.
    Type: Application
    Filed: August 21, 2007
    Publication date: May 1, 2008
    Inventors: Ziv Alon, Shiaw W. Chang, Andre Metzger
  • Patent number: 7365601
    Abstract: An amplifier for amplifying a signal which is applied to a signal input having a first pair of transistors (10), which is connected to the signal input and which contains two transistors (10-1, 10-2), currents flowing through the two transistors (10-1, 10-2) which have a specific operating current ratio (m) in relation to one another, a second pair of transistors (4), which is connected to the first pair of transistors (10) and which contains two transistors (4-1, 4-2), currents flowing through the two transistors (4-1, 4-2) which have the same operating current ratio (m) in relation to one another, and a signal output (3) of the amplifier (1) being provided between the first pair of transistors (10) and the second pair of transistors (4).
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: April 29, 2008
    Assignee: Infineon Technologies AG
    Inventor: Dieter Draxelmayr
  • Patent number: 7365604
    Abstract: The present invention provides methods and apparatuses for an amplifier circuit for amplifying an input signal. An amplifier circuit for amplifying an input signal comprises an amplifying transistor circuit having a power transistor and a dc bias circuit having a plurality of current mirror circuits and a discharge transistor wherein the discharge transistor and the power transistor form a combined current mirror circuit to control quiescent current in the power transistor.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: April 29, 2008
    Assignee: Mediatek Inc.
    Inventors: Sifen Luo, Yiping Fan, Hongyu Li, Chieh-Yuan Chao
  • Patent number: 7352245
    Abstract: An auto-range current mirror circuit has a current sensing circuit, a front and rear stage current mirrors each has an adjustable amplifying rate. The current sensing circuit presets a threshold current and has an input current of the front stage current mirror. The current sensing current compares the input current with a threshold current and then outputs a controlling signal to the front and rear stage current mirrors to adjust a suitable amplifying rate. Therefore, a bias current of the rear stage current mirror is amplified by the suitable amplifying rate to improve the quality of output current of the rear stage current mirror.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: April 1, 2008
    Assignee: Silicon Touch Technology Inc.
    Inventors: Fu-Yang Shih, Hsu-Yuan Chin
  • Patent number: 7348846
    Abstract: The present invention relates to an amplifier arrangement having a plurality of amplifier stages that form a series circuit. Each amplifier stage comprises a current mirror, the translation ratio of which defines the gain of the amplifier stage. Moreover, a current coupling-out element is provided in each amplifier stage, a partial current being output at said element, and the partial currents are added together in a summation element. An RSSI signal associated with the summed currents is provided at the output of the summation element. The RSSI amplifier arrangement provides constant and thermostable signal amplification, low sensitivity to overvoltages, and exhibits a low current requirement and good radio frequency properties.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: March 25, 2008
    Assignee: Infineon Technologies AG
    Inventor: Johann Traub