Including Current Mirror Amplifier Patents (Class 330/288)
  • Patent number: 6441687
    Abstract: A novel bias voltage generating circuit and method are disclosed. In one embodiment, the bias voltage generating circuit includes a first transistor with a base terminal coupled to the output node and an emitter terminal coupled to ground. The circuit also includes a resistor with a first terminal coupled to a supply voltage node and a second terminal coupled to a collector terminal of the first transistor. A second transistor has an emitter terminal coupled to the collector terminal of the first transistor and a base terminal connected to the collector terminal of the second transistor. A second resistance has a first terminal coupled to the supply voltage node and a second terminal coupled to a collector terminal of the second transistor. A third transistor has a base terminal coupled to the base terminal of the second transistor, a collector terminal coupled to the supply voltage node, and an emitter terminal coupled to the output node.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: August 27, 2002
    Assignee: TriQuint Semiconductor, Inc.
    Inventor: Thomas R. Apel
  • Patent number: 6437647
    Abstract: Two compensating resistors in a mirror bias circuit coupled to a radio frequency (RF) amplifier are configured such that transistor base-emitter voltages are adjusted to stabilize RF transistor quiescent current for variations in collector voltage, Vcc. For example, when battery power is drained during device use, Vcc decreases. As Vcc decreases, less current is drawn through the compensating resistors, thereby decreasing the voltage drop across the compensating resistors and increasing the transistor base-emitter voltages in the mirror bias circuit and the radio frequency (RF) amplifier. Thus, the tendency of the RF transistor quiescent current to decrease as Vcc decreases is off-set because the compensating resistors cause an increase in the RF transistor base-emitter voltage, thereby increasing quiescent current.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: August 20, 2002
    Assignee: Conexant Systems, Inc.
    Inventor: Thomas Fowler
  • Patent number: 6429735
    Abstract: An apparatus for an improved output buffer includes a symmetrical pre-gain stage and a gain stage. The pre-gain stage includes a pair of matched differential amplifiers that are arranged to provide a differential intermediary signal. The gain stage is arranged to receive the differential intermediary signal and provide a single-ended output signal. The pre-gain stage differential amplifiers include transistors that are arranged as differential pairs, where each of differential pair transistors is minimally sized to provide very low capacitive loading. The pre-gain stage differential amplifiers are matched such that symmetrical amplification is obtained from the differential intermediary signal. The pre-gain stage arrangement provides for a differential intermediary signal such that common-mode noise rejection and power supply noise rejection are enhanced.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: August 6, 2002
    Assignee: National Semiconductor Corporation
    Inventors: James R. Kuo, Tuong Hai Hoang
  • Publication number: 20020101287
    Abstract: Two compensating resistors in a mirror bias circuit coupled to a radio frequency (RF) amplifier are configured such that transistor base-emitter voltages are adjusted to stabilize RF transistor quiescent current for variations in collector voltage, Vcc. For example, when battery power is drained during device use, Vcc decreases. As Vcc decreases, less current is drawn through the compensating resistors, thereby decreasing the voltage drop across the compensating resistors and increasing the transistor base-emitter voltages in the mirror bias circuit and the radio frequency (RF) amplifier. Thus, the tendency of the RF transistor quiescent current to decrease as Vcc decreases is off-set because the compensating resistors cause an increase in the RF transistor base-emitter voltage, thereby increasing quiescent current.
    Type: Application
    Filed: January 30, 2001
    Publication date: August 1, 2002
    Inventor: Thomas Fowler
  • Patent number: 6424224
    Abstract: An amplifier having a two different single crystal semiconductor substrates. A first one of the substrates has formed thereon at least one input signal amplifying device, such device comprising a bipolar transistor. A second one of the substrates is a material different from the material of the first substrate. A current mirror is included. The current mirror includes a plurality of electrically interconnected active devices, one portion of the devices being bipolar devices formed on the first substrate and another portion of the active devices comprising an insulated gate field effect transistor formed on the second substrate. The first single crystal substrate is III-V material and the second single crystal substrate is silicon. The bipolar devices are HBTs. The insulated gate field effect transistor is a MOS device. This configuration minimizes the effect of temperature, voltage and process variations on critical transistor operating currents.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: July 23, 2002
    Assignee: Raytheon Company
    Inventors: Michael McPartlin, John A. DeFalco
  • Patent number: 6420933
    Abstract: A current-to-current impedance converter re-circulates the driver transistor collector current back into the output current path to generate an error current that has two portions including a DC offset portion and a second order in 1/&bgr; portion. Since the error current has no first order in 1/&bgr; portion, the current-to-current ronverter exhbits very low distortion.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: July 16, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Neil Gibson, Leland S. Swanson, Marco Corsi
  • Patent number: 6417734
    Abstract: A high-frequency amplifier circuit includes an amplifying transistor and a driver transistor, with the amplifying transistor being connected in either a common emitter or a common source configuration and the driver transistor being connected in a corresponding common collector or a common drain configuration, depending upon whether bipolar or field effect transistors are used. A current-mirror bias circuit is coupled between an input terminal and an output terminal of the driver transistor, with a resistor being provided for coupling the current mirror to the input terminal of the driver transistor. The resistor, which typically has a value of between about 20 and 100 ohms, provides a negative impedance cancellation effect while minimizing power consumption at low bias levels.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: July 9, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Sifen Luo, Tirdad Sowlati
  • Patent number: 6417735
    Abstract: A power amplifier circuit comprises an amplifying transistor and a dc bias circuit. The dc bias circuit comprises a first transistor in a current mirror with the amplifying transistor, and a second transistor to provide the base currents to both the amplifying transistor and the first transistor. A dc bias power source is coupled to the base of the second transistor through a resistor and an inductor connected in series. A bypass capacitor is coupled between a ground and a node between the resistor and the inductor. Thus, the reduced voltage drop across the base-emitter junction of the amplifying transistor due to an increased input power is compensated. Furthermore, by properly scaling the emitter area ratio between the amplifying transistor and the first transistor, and/or the ratio between a bias resistor and a corresponding resistor coupled with the mirroring first transistor, the quiescent current in the amplifying transistor can be made to be in direct proportion to that of the first transistor.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: July 9, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Sifen Luo
  • Publication number: 20020084854
    Abstract: An improved amplifier circuit is disclosed. In one embodiment, the amplifier circuit includes an amplifier transistor that has a base terminal connected to receive an input signal. The amplifier circuit also includes a reference voltage source that generates a reference voltage at a reference voltage output node. A local bias circuit provides a bias voltage to the base terminal of the amplifier transistor. The local bias circuit includes a first transistor that has an emitter terminal coupled to the reference voltage output node, a collector terminal coupled to a supply voltage node, and a base terminal connected to the collector terminal. The local bias circuit also includes a second transistor that has a base terminal coupled to the base terminal of the first transistor, a collector terminal coupled to the supply voltage node, and an emitter terminal coupled to the base terminal of the amplifier transistor.
    Type: Application
    Filed: December 29, 2000
    Publication date: July 4, 2002
    Inventors: Thomas R. Apel, Robert E. Knapp
  • Publication number: 20020084853
    Abstract: The bias control selectively provides for bias of a power amplifier based upon a bandgap voltage generated by the bias control, or by a bias voltage external to the bias control. A controller controls the selection of either the bandgap voltage or external bias voltage. The bias control is fabricated in a first semiconductor material capable of operating at low voltage supply levels, such as complementary metal oxide semiconductor (CMOS) material and may be fabricated on an integrated circuit common with a power amplifier.
    Type: Application
    Filed: October 5, 2001
    Publication date: July 4, 2002
    Inventors: Hugh J. Finlay, Mark Bloom, Thomas Fowler
  • Patent number: 6414552
    Abstract: A non-linear current mirror is achieved. The non-linear current mirror is particularly useful in the output stage of an operational transconductance amplifier for improving slew rate and stability while maintaining low bias current. The non-linear current mirror circuit comprises, first, a first MOS transistor has gate and drain are coupled together and further coupled to a first current input. A second MOS transistor has gate coupled to the first MOS transistor gate, and the drain is coupled to a second current input. A third MOS transistor has drain is coupled to the second MOS transistor source, and the gate is coupled to the second MOS transistor drain. A fourth MOS transistor has gate coupled to the third MOS transistor gate. The source is coupled to the first MOS transistor source and the third MOS transistor source. Finally, the drain forms a current output.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: July 2, 2002
    Assignee: Dialog Semiconductor GmbH
    Inventors: Frank Kronmueller, Paul Zehnich
  • Patent number: 6414553
    Abstract: A power amplifier circuit includes an amplifying transistor and a dc bias circuit for biasing the amplifier transistor to obtain a conduction angle of at least about 180°. The dc bias circuit includes a self-bias boosting circuit which has a cascode current-mirror circuit having an output coupled to a control terminal of the amplifying transistor by a resistor, and a capacitor coupled from the cascode current-mirror circuit to a common terminal. The value of the capacitor can be selected to obtain the desired amount of self-bias boosting.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: July 2, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Sifen Luo
  • Patent number: 6404287
    Abstract: A bias network uses resistive biasing, active biasing and current mirror biasing in combination to enhance RF power amplifier linearity and efficiency by forming a bias network that provides temperature compensation, minimizes current drain requirements for the Vbias source and reduces the level of RF linear amplifier quiescent current.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: June 11, 2002
    Assignee: RF Micro Devices, Inc.
    Inventors: David C. Dening, Jon D. Jorgenson
  • Patent number: 6392489
    Abstract: A high precision current control circuit (current mirror) is disclosed. As in prior current mirrors, a reference voltage is generated from the input reference current. An operational amplifier is placed between the reference diode and the bases of the controlled transistors to provide precise reproduction of the reference voltage with ample current to drive many controlled current sources or current sources with high multiplication ratios from the reference current. As compared to prior emitter follower drivers, a lower voltage threshold of operation from an external proportional control results. Lower power supply voltage is supported, since one diode drop is removed from the reference current path.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: May 21, 2002
    Assignee: RadioCom Corporation
    Inventors: Lawrence Henry Ragan, Mark Richard Gehring
  • Patent number: 6384683
    Abstract: An intermediate stage for a rail-to-rail input/output CMOS opamp includes a floating current source separating two current mirrors (151-154,155-158), where the ideal current source includes a floating current mirror (500,501,502,503,504,505) enabling an output quiescent current to be provided which does not vary with changes in the voltage rails or the common-mode input voltage, and enabling elimination of input offset caused by the mismatch of the two current sources (164,166). The NMOS transistor (502) has a source-drain path provided in series with a PMOS transistor (505) serving to connect the current mirrors (151-154) and (155-158) and to eliminate input offset.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: May 7, 2002
    Assignee: Elantec Semiconductor, Inc.
    Inventor: Xijian Lin
  • Patent number: 6377126
    Abstract: Electronic circuit comprising a first and a second current mirrors, an upstream active element arranged between an input of the first current mirror and an input of the second current mirror, each current mirror being provided with an output. The circuit comprises a first current source arranged in parallel with the input of the first current mirror and a second current source arranged in parallel with the input of the second current mirror, so that the current delivered to the active element is equal to the output current of each current mirror and that the input current of each current mirror is less than the current delivered to the active element by the input of each current mirror and by the associated current source.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: April 23, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Yannick Guedon
  • Patent number: 6369656
    Abstract: A bias network uses resistive biasing, active biasing and current mirror biasing in combination to enhance RF power amplifier linearity and efficiency by forming a bias network that provides temperature compensation, minimizes current drain requirements for the Vbias source and reduces the level of RF linear amplifier quiescent current.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: April 9, 2002
    Assignee: RF Micro Devices, Inc.
    Inventors: David C. Dening, Jon D. Jorgenson
  • Patent number: 6369653
    Abstract: A class AB amplifier biasing circuit is provided for controlling the quiescent state of a pull-up output device and a complimentary pull-down output device. The biasing circuit includes first and second current sources, each having a floating resistor configured to supply current to the pull-up and pull-down devices, respectively. The biasing circuit also includes gate control circuits for controlling the gate voltages of the first and second floating resistors. A device replica transistor is connected to a voltage node associated with the gate of the either the pull-up device or the pull-down device.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: April 9, 2002
    Assignee: Conexant Systems, Inc.
    Inventor: Michael S. Kappes
  • Patent number: 6369620
    Abstract: A cross coupled output stage for a transmitter. It is desirable to have high impedance for a differential cascode output stage of an externally terminated transmitter in order to improve return loss. However, at high frequencies, parasitic capacitances cause shunts at the output nodes due to drain to bulk capacitances and negative feedback loops due to gate-to-drain capacitance. In order to counteract this, cross coupled capacitors are connected to the circuit to cause a positive feedback loop. This counteracts the reduction in impedance causing the impedance to remain high over all frequencies and to improve the return loss.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: April 9, 2002
    Assignee: Intel Corporation
    Inventor: Sandeep K. Gupta
  • Patent number: 6369657
    Abstract: A bias network uses resistive biasing, active biasing and current mirror biasing in combination to enhance RF power amplifier linearity and efficiency by forming a bias network that provides temperature compensation, minimizes current drain requirements for the Vbias source and reduces the level of RF linear amplifier quiescent current.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: April 9, 2002
    Assignee: RF Micro Devices, Inc.
    Inventors: David C. Dening, Jon D. Jorgenson
  • Patent number: 6359516
    Abstract: A high-frequency amplifier circuit includes an amplifying transistor and a bias circuit coupled to the amplifying transistor. The bias circuit includes a first bias subcircuit for controlling a quiescent current in the amplifying transistor and a second bias subcircuit for independently controlling a bias impedance of the amplifying transistor. Using this configuration, it is possible to set the gain and class of operation of the amplifying transistor, while independently controlling the bias impedance of the amplifying transistor to obtain improved linearity and tuning capability as well as increased efficiency.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: March 19, 2002
    Assignee: Philips Electronics North America Corporation
    Inventors: Sifen Luo, Tirdad Sowlati
  • Publication number: 20020030542
    Abstract: An active load circuit is provided, which is suitable for achieving an operational amplifier circuit, and which may cope with both output current capability and lower consumption current, with less offset, and may be capable of operating at higher speed in case of transient response. The active load circuit is comprised of MOS transistors Tr1 and Tr5 for forming a first current mirror circuit, MOS transistors Tr11 and Tr3 for forming a second current mirror circuit, and resistors R1 and R2. The sources of output transistors Tr5 and Tr11 of respective current mirror circuits are connected to the sources of input transistors Tr3 and Tr1 of the other current mirror circuits and then to the resistors R1 and R2.
    Type: Application
    Filed: March 2, 2001
    Publication date: March 14, 2002
    Applicant: Fujitsu Limited
    Inventor: Katsuyuki Yasukouchi
  • Publication number: 20020027476
    Abstract: A current amplifier includes an input branch having a first input; an output branch coupled to said input branch; a bias branch suitable for biasing said input branch. The input branch comprises at least one switch commanded by a first bias voltage supplied by said bias branch so as to substantially block the current flowing in said input branch and consequently substantially block the current flowing in said output branch when the current applied to said first input is null.
    Type: Application
    Filed: August 31, 2001
    Publication date: March 7, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventor: Francesco Chrappan Soldavini
  • Patent number: 6353365
    Abstract: An integrated current reference circuit uses two current mirror circuits, in which one of the transistors of one of the current mirrors has a back gate connection to the power rail, the drain-source path being connected to the power rail via a voltage offset element.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: March 5, 2002
    Assignee: STMicroelectronics Limited
    Inventor: William Bryan Barnes
  • Publication number: 20020024386
    Abstract: The integrated circuit includes a power FET for generating an output voltage, a pilot FET for sensing current through the power driving device and generating a reference voltage, and an amplifier circuit for comparing the reference voltage of the pilot device with the output voltage of the power driving device. The amplifier circuit includes a differential pair of matched bipolar junction transistors (BJTs) having a common base. A first BJT of the differential pair being diode-connected. The amplifier circuit controls the gates of the power FET and the pilot FET.
    Type: Application
    Filed: August 13, 2001
    Publication date: February 28, 2002
    Applicant: Intersil Americas Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Patent number: 6344775
    Abstract: A semiconductor device is provided having a high-frequency amplifying bipolar transistor (10) with its emitter electrode grounded. A current mirror circuit including a bipolar transistor (20) supplies the transistor (10) with a base potential as bias voltages for operating as a Class B or Class AB amplifier. A thermal linkage is established between the transistor (10) and the transistor (20) to reduce a difference between their junction temperatures. A metallic layer (4) is provided as a means for establishing the thermal linkage. The transistor (20) is provided between fingers (1A) and (1B) of the transistor (10) as another means for establishing the thermal linkage. A distance between the transistor (20) and one of the fingers (1A) and (1B) of the transistor (10) is made smaller than the thickness of a semiconductor substrate (7) on which the transistors are formed as other means for establishing the thermal linkage.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: February 5, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kouhei Morizuka, Yasuhiko Kuriyama
  • Patent number: 6344776
    Abstract: To mitigate against base current errors in a current mirror circuit that has limited overhead voltage, a compensated current mirror circuit includes complementary polarity, base current error compensation circuits coupled to a current mirror control node, referenced to the collector-emitter current path of an input transistor. To compensate for total number of base current error components in the output transistor-based mirror circuit, auxiliary transistors are coupled in the collector-emitter paths of the current mirror output transistors, referenced to a relatively large voltage well in excess of the supply rail, to provide ample output current path headroom for the insertion of the auxiliary transistors. By summing and mirroring the base offset currents of these auxiliary transistors back to the control node, the output current mirror transistors are driven with a composite current that makes their output currents equal with the input current and effectively free of base current errors.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: February 5, 2002
    Assignee: Intersil Americas Inc.
    Inventor: Leonal Ernesto Enriquez
  • Patent number: 6313705
    Abstract: A bias network uses resistive biasing, active biasing and current mirror biasing in combination to enhance RF power amplifier linearity and efficiency by forming a bias network that provides temperature compensation, minimizes current drain requirements for the Vbias source and reduces the level of RF linear amplifier quiescent current.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: November 6, 2001
    Assignee: RF Micro Devices, Inc.
    Inventors: David C. Dening, Jon D. Jorgenson
  • Patent number: 6300836
    Abstract: An amplifier circuit comprising a basic amplifier which includes a first and a second transistor of opposite type in which the emitter terminal of the first transistor is connected to the input of the second transistor, and in which the collector terminal of the first transistor is connected to the emitter terminal of the second transistor to form a first current summing point, and a current mirror circuit connected to the first and second transistors to provide substantially equal collector current in each of the first and second transistors. The amplifier circuit includes a current source connected to said first current summing point to control the DC bias point of the first and second transistors. The amplifier may be adapted to a differential configuration using two basic amplifier circuits.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: October 9, 2001
    Assignee: Wolf Technologies Limited
    Inventor: Valeri Belyi
  • Patent number: 6300845
    Abstract: A low voltage, current-folded signal modulator that reduces distortion in the output signal is provided. The signal modulator has a differential amplifier that receives a first input signal and converts it to a current, a current amplifier that has a low impedance input and provides an amplified current signal, and a differential pair circuit that receives a second input signal and modulates the amplified current signal by the second signal.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: October 9, 2001
    Assignee: Linear Technology Corporation
    Inventor: Min Z. Zou
  • Patent number: 6288613
    Abstract: A bias circuit for providing a gate voltage for a first depletion mode FET operating on RF signals comprises a second similar FET in a source-follower configuration with zero gate-source voltage to conduct a drain-source current Idss via a source resistor. A third depletion mode FET has its gate connected to receive a voltage dropped across this source resistor, its source coupled to a diode whose forward voltage drop constitutes a reference voltage, and its drain connected to a second resistor, a voltage drop across which due to the drain-source current of the third FET constitutes a gate-source voltage for the first FET. The bias circuit compensates for process variations in manufacture of the first FET, and also provides temperature compensation.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: September 11, 2001
    Assignee: Nortel Networks Limited
    Inventor: Jeffrey H. Bennett
  • Patent number: 6285258
    Abstract: An offset voltage trimming circuit for sending a current from a constant-current source to a trimming resistor and thus obtaining an offset voltage, the offset voltage trimming circuit having a Zener diode with a temperature characteristic of zero, a transistor connected so as to form a diode and connected in series to the Zener diode, a current-mirror circuit connected to the transistor and a second resistor connected in series to the current-mirror circuit and having a temperature characteristic identical to that of the trimming resistor, with the current being supplied to the trimming resistor from the current-mirror circuit in order to prevent changes in the offset voltage due to changes in temperature.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: September 4, 2001
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Akira Ikeuchi, Kyozo Makime
  • Patent number: 6281730
    Abstract: A driver circuit in accordance with the present invention combines current controlled current source and sink circuits, which are independent of process, temperature, and supply voltage, and voltage controlled current source and sink circuits to control the slew rate at the output of the driver circuit and thereby reduce switching noise. The driver includes an output transistor coupled to an output node, a current source, a current mirror transistor having a control node connected to the control node of the output transistor and a conduction path coupled to the current source, and a voltage controlled switch coupled between the conduction path of the current mirror transistor and the control node of the output transistor. The voltage controlled switch is coupled to the output node and is open when the output node is within a first voltage range, and is closed when the output node is within a second voltage range.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: August 28, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Ha Chu Vu
  • Patent number: 6278326
    Abstract: A current mirror circuit in accordance with the present invention overcomes many shortcomings of the prior art. A current mirror circuit for providing a current reference signal suitably includes at least one degeneration resistor to provide more degeneration for lower voltage noise while also including at least one clamping device to preventing saturation of the current mirror. The clamping device suitably comprises at least one diode, such as, for example, a Schottky-type diode. Moreover, the clamping device can be suitably configured to facilitate a higher slew rate of the current mirror circuit.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: August 21, 2001
    Assignee: Texas Instruments Tucson Corporation
    Inventors: Kenneth W. Murray, Joel M. Halbert
  • Patent number: 6268842
    Abstract: There is provided a thin film transistor circuit used for a driver circuit for providing a semiconductor display device without a picture blur and with high fineness/high resolution. In the thin film transistor circuit, a TFT having a large size (channel width) is not used, but a plurality of TFTs each having a small size are connected in parallel to each other and are used. By this, while sufficient current capacity of the thin film transistors is secured, fluctuation in the characteristics can be decreased.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: July 31, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 6268772
    Abstract: A slew rate controlled power amplifier (112) for use in a dc motor driver circuit is presented. The amplifier (112) has a power transistor (72) connected to control a drive current (IMOTOR) in a phase of the dc motor with which it is associated and to develop an output voltage (VOUT) on the phase in accordance with the drive current (IMOTOR). A mirror transistor (74) is connected to establish the ratioed magnitude of the current in the power transistor (72), and a feedback circuit (90) is connected to controllably feed back the output voltage (VOUT) to the mirror transistor (74) to control the drive current (IMOTOR). A commutatively operated slew-rate control circuit (57,58) is connected to the feedback circuit (90) to control the drive current (IMOTOR). By coupling the feedback from the phase voltage, VOUT, into the current loop the loop stability is greatly improved and oscillations on the output phase voltage are reduced or eliminated.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: July 31, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Ching-Siang Chen
  • Patent number: 6259324
    Abstract: A bias network for a radio frequency signal power amplifier. A current source is connected to a source of band gap voltage and produces a current proportional to the voltage. A reference voltage circuit receives the current and produces a voltage which is proportional to the current, as well as changes in temperature. An operational amplifier is used to connect the reference voltage to the power amplifier, so that the power amplifier is effectively isolated from the reference voltage circuit and current bearer circuit. A power amplifier breakdown protection circuit is connected across the output of the operational amplifier for diverting avalanche current produced form the power amplifier away from the power amplifier when the power amplifier output is mismatched through the antenna. Baseband signal transmission from the power amplifier to the bias network circuit is also significantly reduced, thus avoiding the generation of spurious radiation components.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Phillip Antognetti, Jim Griffiths, David Helms, James Moniz, Scott Munro, Joshua Park, Carl Stuebing, Xiangdong Zhang
  • Patent number: 6249187
    Abstract: A monolithic power amplifier system is described which comprises a biasing system 50, transconductance amplifier circuit 42 and a transimpedance amplifier circuit 44 biasing network 50 is operable to generate a bias voltage which is used by the transimpedance amplifier 44. The transimpedance amplifier 44 receives an input current signal from the transconductance amplifier 42. The changes in the input current are communicated to a pull-up transistor 184 and a pull-down transistor 190 which drive an output voltage VOUT at sufficient levels to power the cathode of an electron gun of a video system.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: June 19, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Chung-Ming Chou, Danny Tsong, William Y. W. Tang
  • Patent number: 6242983
    Abstract: A control circuit employed in a programmable gain amplifier disclosed herein, the control circuit in one preferred embodiment of the present invention includes the following devices. The reference voltage generating circuits is to provide a voltage level for the first current generating device, and then the first current generating device produces a first current. The current repeating device generates a first repeating current with the same magnitude as the first current. In addition, the current repeating device is the current mirror of the current sources in the programmable gain amplifier to generate the second repeating current, the third repeating current and so forth. The magnitude of the second repeating current (and the subsequent bias current) is in proportional to that of the first repeating current as well as to that of the first current. An adjustable resistor, which is the emitter resistor of the first current generating device, can be varied to control the first current.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: June 5, 2001
    Assignee: Industrial Technology Research Institute
    Inventor: Chi-Ming Shiao
  • Patent number: 6229387
    Abstract: The output signal converter for a tube amplifier includes semiconductor devices for amplifying or attenuating an output signal of the tube amplifier while maintaining the output properties of the tube amplifier. The output signal converter according to one embodiment has an output transformer (TR) having an input terminal (TRa); a first circuit branch (C1) connected between the input terminal (TRa) and an output terminal of the tube amplifier and a second circuit branch (C2) connected to the input terminal (TRa) of the output transformer (TR) and in parallel to the first circuit branch and including components that produce an electric current proportional to a current level in the first circuit branch. The first and second circuit branches are located between the tube amplifier and the output transformer (TR) and include semiconductor devices so that the output signal from the tube amplifier is amplified while maintaining the output properties of the tube amplifier.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: May 8, 2001
    Assignee: KORG, Inc.
    Inventors: Fumio Mieda, Yasuhiko Mori, Hirofumi Mitoma
  • Patent number: 6201444
    Abstract: A current mirror bias circuit for an RF amplifier transistor is modified whereby the reference transistor of the current mirror tracks hot carrier degradation in the RF transistor. Gate bias to the current mirror transistor is modified whereby the drain-to-gate voltage can be positive, and the lightly doped drain region in the lateral n-channel reference transistor is shortened and dopant concentration increased to increase the electric field of the reference transistor to provide the hot carrier injection degradation characteristics similar to the main transistor. Additionally, the gate length of the reference transistor can be shortened to effect the hot carrier injection degradation.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: March 13, 2001
    Assignee: Spectrian Corporation
    Inventors: John F. Sevic, Francois Hebert
  • Patent number: 6194967
    Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit includes an operational amplifier coupled in a circuit configuration. The circuit configuration includes two transistors coupled to the operational amplifier so that the corresponding voltages at the terminals or ports of the transistors are substantially identical. Briefly, in accordance with one more embodiment of the invention, an integrated circuit includes an operational amplifier coupled in a circuit configuration. The circuit configuration includes two circuit components coupled to the operational amplifier so that the corresponding voltages at the terminals or ports of the circuit components are substantially identical. The circuit components include any circuit components capable of implementing a transconductance.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: February 27, 2001
    Assignee: Intel Corporation
    Inventors: Luke A. Johnson, Rizwan Ahmed
  • Patent number: 6191656
    Abstract: An RF power amplifier has an RF driver stage that also provides a temperature independent reference current to the RF output power amplifier. A diode reference serves as both a DC current reference and as the first RF amplifier stage. Less DC power is consumed since no circuitry is used exclusively for establishing a DC reference.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: February 20, 2001
    Assignee: RF Micro Devices, Inc.
    Inventor: Alexander John Nadler
  • Patent number: 6188278
    Abstract: An amplification circuit for use with an electro chemical cell is disclosed. The cell is operated in the amperometric mode and finds beneficial application in the detection of carbon monoxide (CO) gas. The amplification circuit of the invention is used to derive electrical output signals from the cell whilst ensuring that the cell electrodes are held at a potential that minimises cross-sensitivities and controlling voltage spikes which the cell would otherwise extend in duration, due to its capacitive behaviour, and comprises an operational amplifier connected to derive electrical output signals from the cell and having a feedback path incorporating at least one component of a current mirror circuit.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: February 13, 2001
    Assignee: Thorn Security Limited
    Inventor: Stephen John Penney
  • Patent number: 6184752
    Abstract: The device has reference current sources (T71, T72, T7M) which are arranged in such a way that the sum of the currents flowing through each of the said sources is equal to the input current (IIN, I′IN) and output current sources (T81, T82, T8N), in each of which the current flowing through the reference sources is duplicated and which are arranged in such a way that the sum of the currents flowing through the output sources is equal to the output current (IOUT, I′OUT). The number of reference sources (T71, T72, T7M) and output sources (T81, T82, T8N) which are connected is controlled by the digital signal (200) and determines the gain of the device. Application to the circuit for processing the signals output by a read head of an optical disc reader apparatus.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: February 6, 2001
    Assignee: THOMSON multimedia
    Inventor: Pierre Dautriche
  • Patent number: 6181206
    Abstract: By selecting a particular configuration of an input stage of a low noise RF amplifier, an optimal combination of linearity and input matching is achieved upon selecting a certain gain factor from a set of fixed step values. Each input stage configuration defines an input matching network specifically suitable to operate at a certain RF frequency. An RF signal input inductor is selectively associated to an input coupling capacitor, and a second degeneration inductor of a gain transistor of the input stage having a different gain value. The selection of a certain configuration is made through at least one switch through which a bias current generator is switched to the programmably selected input stage.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: January 30, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giuseppe Palmisano, Salvatore Pennisi
  • Patent number: 6175275
    Abstract: A preamplifier includes an output stage having a bandwidth which is adjustable by a control signal. The output stage includes an amplifier with an adjustable bandwidth. The amplifier includes a main input for receiving an input current, a main output for providing an output voltage, a resistor connected between the main input and output. A current amplifier with an adjustable gain is connected for receiving the input current. A capacitor is connected between an output of the current amplifier and the main output. An inverting transconductance circuit is connected between the output of the current amplifier and the main output.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: January 16, 2001
    Assignee: STMicroelectronics S.A.
    Inventors: Michel Barou, Danika Chaussy
  • Patent number: 6175278
    Abstract: A variable gain amplifier circuit has: a voltage-current conversion unit for converting an input voltage into a current and outputting the current; a current amplifier for amplifying the current at a set variable gain; a converter for converting the amplified current into an output voltage; and an operating point setting unit for setting an operating point so that the output voltage converges into a predetermined range during a period while a reference voltage is input.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: January 16, 2001
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Jun Hasegawa
  • Patent number: 6169456
    Abstract: In accordance with the present invention, an auto-biased cascode current circuit capable of improved range in headroom is disclosed. In one embodiment, the current circuit includes a current mirror and a bias circuit, where the current mirror contains a reference leg and an output leg. A reference current flows within the reference leg. Included in the output leg is an output terminal, a first output transistor and a second output transistor. The output terminal operates at an output potential. The bias circuit regulates the reference leg of the current mirror such that the output potential is substantially equal to a drain-to-source saturation voltage of the first output transistor plus a drain-to-source saturation voltage of the second output transistor plus a predetermined overdrive voltage. The predetermined overdrive voltage is a design parameter which is less than a threshold voltage.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: January 2, 2001
    Assignee: STMicroelectronics N.V.
    Inventor: Gregory W. Pauls
  • Patent number: 6157259
    Abstract: Methods and circuits are disclosed for low voltage (1.5 Volt and below) CMOS circuits, offering good transconductance and current driving capabilities. These goals are achieved by biasing CMOS transistors in the weak inversion region, by utilizing multiple unit-sized transistors with a fixed gate width to gate length ratio, and by maintaining a uniform threshold voltage of each unit-sized transistor. The required transistor size is obtained by parallel connection of several unit-sized transistors, such that `n` unit sized transistors carry the required current of `n` units. The methods and circuits disclosed eliminate deviation of the output current of current mirrors caused by threshold voltage mismatch. Disclosed are a current mirror and two typical amplifiers as examples of weak inversion design.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: December 5, 2000
    Assignee: Tritech Microelectronics, Ltd.
    Inventor: Uday Dasgupta