Including Current Mirror Amplifier Patents (Class 330/288)
  • Patent number: 6369653
    Abstract: A class AB amplifier biasing circuit is provided for controlling the quiescent state of a pull-up output device and a complimentary pull-down output device. The biasing circuit includes first and second current sources, each having a floating resistor configured to supply current to the pull-up and pull-down devices, respectively. The biasing circuit also includes gate control circuits for controlling the gate voltages of the first and second floating resistors. A device replica transistor is connected to a voltage node associated with the gate of the either the pull-up device or the pull-down device.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: April 9, 2002
    Assignee: Conexant Systems, Inc.
    Inventor: Michael S. Kappes
  • Patent number: 6369656
    Abstract: A bias network uses resistive biasing, active biasing and current mirror biasing in combination to enhance RF power amplifier linearity and efficiency by forming a bias network that provides temperature compensation, minimizes current drain requirements for the Vbias source and reduces the level of RF linear amplifier quiescent current.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: April 9, 2002
    Assignee: RF Micro Devices, Inc.
    Inventors: David C. Dening, Jon D. Jorgenson
  • Patent number: 6369657
    Abstract: A bias network uses resistive biasing, active biasing and current mirror biasing in combination to enhance RF power amplifier linearity and efficiency by forming a bias network that provides temperature compensation, minimizes current drain requirements for the Vbias source and reduces the level of RF linear amplifier quiescent current.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: April 9, 2002
    Assignee: RF Micro Devices, Inc.
    Inventors: David C. Dening, Jon D. Jorgenson
  • Patent number: 6359516
    Abstract: A high-frequency amplifier circuit includes an amplifying transistor and a bias circuit coupled to the amplifying transistor. The bias circuit includes a first bias subcircuit for controlling a quiescent current in the amplifying transistor and a second bias subcircuit for independently controlling a bias impedance of the amplifying transistor. Using this configuration, it is possible to set the gain and class of operation of the amplifying transistor, while independently controlling the bias impedance of the amplifying transistor to obtain improved linearity and tuning capability as well as increased efficiency.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: March 19, 2002
    Assignee: Philips Electronics North America Corporation
    Inventors: Sifen Luo, Tirdad Sowlati
  • Publication number: 20020030542
    Abstract: An active load circuit is provided, which is suitable for achieving an operational amplifier circuit, and which may cope with both output current capability and lower consumption current, with less offset, and may be capable of operating at higher speed in case of transient response. The active load circuit is comprised of MOS transistors Tr1 and Tr5 for forming a first current mirror circuit, MOS transistors Tr11 and Tr3 for forming a second current mirror circuit, and resistors R1 and R2. The sources of output transistors Tr5 and Tr11 of respective current mirror circuits are connected to the sources of input transistors Tr3 and Tr1 of the other current mirror circuits and then to the resistors R1 and R2.
    Type: Application
    Filed: March 2, 2001
    Publication date: March 14, 2002
    Applicant: Fujitsu Limited
    Inventor: Katsuyuki Yasukouchi
  • Publication number: 20020027476
    Abstract: A current amplifier includes an input branch having a first input; an output branch coupled to said input branch; a bias branch suitable for biasing said input branch. The input branch comprises at least one switch commanded by a first bias voltage supplied by said bias branch so as to substantially block the current flowing in said input branch and consequently substantially block the current flowing in said output branch when the current applied to said first input is null.
    Type: Application
    Filed: August 31, 2001
    Publication date: March 7, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventor: Francesco Chrappan Soldavini
  • Patent number: 6353365
    Abstract: An integrated current reference circuit uses two current mirror circuits, in which one of the transistors of one of the current mirrors has a back gate connection to the power rail, the drain-source path being connected to the power rail via a voltage offset element.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: March 5, 2002
    Assignee: STMicroelectronics Limited
    Inventor: William Bryan Barnes
  • Publication number: 20020024386
    Abstract: The integrated circuit includes a power FET for generating an output voltage, a pilot FET for sensing current through the power driving device and generating a reference voltage, and an amplifier circuit for comparing the reference voltage of the pilot device with the output voltage of the power driving device. The amplifier circuit includes a differential pair of matched bipolar junction transistors (BJTs) having a common base. A first BJT of the differential pair being diode-connected. The amplifier circuit controls the gates of the power FET and the pilot FET.
    Type: Application
    Filed: August 13, 2001
    Publication date: February 28, 2002
    Applicant: Intersil Americas Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Patent number: 6344775
    Abstract: A semiconductor device is provided having a high-frequency amplifying bipolar transistor (10) with its emitter electrode grounded. A current mirror circuit including a bipolar transistor (20) supplies the transistor (10) with a base potential as bias voltages for operating as a Class B or Class AB amplifier. A thermal linkage is established between the transistor (10) and the transistor (20) to reduce a difference between their junction temperatures. A metallic layer (4) is provided as a means for establishing the thermal linkage. The transistor (20) is provided between fingers (1A) and (1B) of the transistor (10) as another means for establishing the thermal linkage. A distance between the transistor (20) and one of the fingers (1A) and (1B) of the transistor (10) is made smaller than the thickness of a semiconductor substrate (7) on which the transistors are formed as other means for establishing the thermal linkage.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: February 5, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kouhei Morizuka, Yasuhiko Kuriyama
  • Patent number: 6344776
    Abstract: To mitigate against base current errors in a current mirror circuit that has limited overhead voltage, a compensated current mirror circuit includes complementary polarity, base current error compensation circuits coupled to a current mirror control node, referenced to the collector-emitter current path of an input transistor. To compensate for total number of base current error components in the output transistor-based mirror circuit, auxiliary transistors are coupled in the collector-emitter paths of the current mirror output transistors, referenced to a relatively large voltage well in excess of the supply rail, to provide ample output current path headroom for the insertion of the auxiliary transistors. By summing and mirroring the base offset currents of these auxiliary transistors back to the control node, the output current mirror transistors are driven with a composite current that makes their output currents equal with the input current and effectively free of base current errors.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: February 5, 2002
    Assignee: Intersil Americas Inc.
    Inventor: Leonal Ernesto Enriquez
  • Patent number: 6313705
    Abstract: A bias network uses resistive biasing, active biasing and current mirror biasing in combination to enhance RF power amplifier linearity and efficiency by forming a bias network that provides temperature compensation, minimizes current drain requirements for the Vbias source and reduces the level of RF linear amplifier quiescent current.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: November 6, 2001
    Assignee: RF Micro Devices, Inc.
    Inventors: David C. Dening, Jon D. Jorgenson
  • Patent number: 6300845
    Abstract: A low voltage, current-folded signal modulator that reduces distortion in the output signal is provided. The signal modulator has a differential amplifier that receives a first input signal and converts it to a current, a current amplifier that has a low impedance input and provides an amplified current signal, and a differential pair circuit that receives a second input signal and modulates the amplified current signal by the second signal.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: October 9, 2001
    Assignee: Linear Technology Corporation
    Inventor: Min Z. Zou
  • Patent number: 6300836
    Abstract: An amplifier circuit comprising a basic amplifier which includes a first and a second transistor of opposite type in which the emitter terminal of the first transistor is connected to the input of the second transistor, and in which the collector terminal of the first transistor is connected to the emitter terminal of the second transistor to form a first current summing point, and a current mirror circuit connected to the first and second transistors to provide substantially equal collector current in each of the first and second transistors. The amplifier circuit includes a current source connected to said first current summing point to control the DC bias point of the first and second transistors. The amplifier may be adapted to a differential configuration using two basic amplifier circuits.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: October 9, 2001
    Assignee: Wolf Technologies Limited
    Inventor: Valeri Belyi
  • Patent number: 6288613
    Abstract: A bias circuit for providing a gate voltage for a first depletion mode FET operating on RF signals comprises a second similar FET in a source-follower configuration with zero gate-source voltage to conduct a drain-source current Idss via a source resistor. A third depletion mode FET has its gate connected to receive a voltage dropped across this source resistor, its source coupled to a diode whose forward voltage drop constitutes a reference voltage, and its drain connected to a second resistor, a voltage drop across which due to the drain-source current of the third FET constitutes a gate-source voltage for the first FET. The bias circuit compensates for process variations in manufacture of the first FET, and also provides temperature compensation.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: September 11, 2001
    Assignee: Nortel Networks Limited
    Inventor: Jeffrey H. Bennett
  • Patent number: 6285258
    Abstract: An offset voltage trimming circuit for sending a current from a constant-current source to a trimming resistor and thus obtaining an offset voltage, the offset voltage trimming circuit having a Zener diode with a temperature characteristic of zero, a transistor connected so as to form a diode and connected in series to the Zener diode, a current-mirror circuit connected to the transistor and a second resistor connected in series to the current-mirror circuit and having a temperature characteristic identical to that of the trimming resistor, with the current being supplied to the trimming resistor from the current-mirror circuit in order to prevent changes in the offset voltage due to changes in temperature.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: September 4, 2001
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Akira Ikeuchi, Kyozo Makime
  • Patent number: 6281730
    Abstract: A driver circuit in accordance with the present invention combines current controlled current source and sink circuits, which are independent of process, temperature, and supply voltage, and voltage controlled current source and sink circuits to control the slew rate at the output of the driver circuit and thereby reduce switching noise. The driver includes an output transistor coupled to an output node, a current source, a current mirror transistor having a control node connected to the control node of the output transistor and a conduction path coupled to the current source, and a voltage controlled switch coupled between the conduction path of the current mirror transistor and the control node of the output transistor. The voltage controlled switch is coupled to the output node and is open when the output node is within a first voltage range, and is closed when the output node is within a second voltage range.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: August 28, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Ha Chu Vu
  • Patent number: 6278326
    Abstract: A current mirror circuit in accordance with the present invention overcomes many shortcomings of the prior art. A current mirror circuit for providing a current reference signal suitably includes at least one degeneration resistor to provide more degeneration for lower voltage noise while also including at least one clamping device to preventing saturation of the current mirror. The clamping device suitably comprises at least one diode, such as, for example, a Schottky-type diode. Moreover, the clamping device can be suitably configured to facilitate a higher slew rate of the current mirror circuit.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: August 21, 2001
    Assignee: Texas Instruments Tucson Corporation
    Inventors: Kenneth W. Murray, Joel M. Halbert
  • Patent number: 6268842
    Abstract: There is provided a thin film transistor circuit used for a driver circuit for providing a semiconductor display device without a picture blur and with high fineness/high resolution. In the thin film transistor circuit, a TFT having a large size (channel width) is not used, but a plurality of TFTs each having a small size are connected in parallel to each other and are used. By this, while sufficient current capacity of the thin film transistors is secured, fluctuation in the characteristics can be decreased.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: July 31, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 6268772
    Abstract: A slew rate controlled power amplifier (112) for use in a dc motor driver circuit is presented. The amplifier (112) has a power transistor (72) connected to control a drive current (IMOTOR) in a phase of the dc motor with which it is associated and to develop an output voltage (VOUT) on the phase in accordance with the drive current (IMOTOR). A mirror transistor (74) is connected to establish the ratioed magnitude of the current in the power transistor (72), and a feedback circuit (90) is connected to controllably feed back the output voltage (VOUT) to the mirror transistor (74) to control the drive current (IMOTOR). A commutatively operated slew-rate control circuit (57,58) is connected to the feedback circuit (90) to control the drive current (IMOTOR). By coupling the feedback from the phase voltage, VOUT, into the current loop the loop stability is greatly improved and oscillations on the output phase voltage are reduced or eliminated.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: July 31, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Ching-Siang Chen
  • Patent number: 6259324
    Abstract: A bias network for a radio frequency signal power amplifier. A current source is connected to a source of band gap voltage and produces a current proportional to the voltage. A reference voltage circuit receives the current and produces a voltage which is proportional to the current, as well as changes in temperature. An operational amplifier is used to connect the reference voltage to the power amplifier, so that the power amplifier is effectively isolated from the reference voltage circuit and current bearer circuit. A power amplifier breakdown protection circuit is connected across the output of the operational amplifier for diverting avalanche current produced form the power amplifier away from the power amplifier when the power amplifier output is mismatched through the antenna. Baseband signal transmission from the power amplifier to the bias network circuit is also significantly reduced, thus avoiding the generation of spurious radiation components.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Phillip Antognetti, Jim Griffiths, David Helms, James Moniz, Scott Munro, Joshua Park, Carl Stuebing, Xiangdong Zhang
  • Patent number: 6249187
    Abstract: A monolithic power amplifier system is described which comprises a biasing system 50, transconductance amplifier circuit 42 and a transimpedance amplifier circuit 44 biasing network 50 is operable to generate a bias voltage which is used by the transimpedance amplifier 44. The transimpedance amplifier 44 receives an input current signal from the transconductance amplifier 42. The changes in the input current are communicated to a pull-up transistor 184 and a pull-down transistor 190 which drive an output voltage VOUT at sufficient levels to power the cathode of an electron gun of a video system.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: June 19, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Chung-Ming Chou, Danny Tsong, William Y. W. Tang
  • Patent number: 6242983
    Abstract: A control circuit employed in a programmable gain amplifier disclosed herein, the control circuit in one preferred embodiment of the present invention includes the following devices. The reference voltage generating circuits is to provide a voltage level for the first current generating device, and then the first current generating device produces a first current. The current repeating device generates a first repeating current with the same magnitude as the first current. In addition, the current repeating device is the current mirror of the current sources in the programmable gain amplifier to generate the second repeating current, the third repeating current and so forth. The magnitude of the second repeating current (and the subsequent bias current) is in proportional to that of the first repeating current as well as to that of the first current. An adjustable resistor, which is the emitter resistor of the first current generating device, can be varied to control the first current.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: June 5, 2001
    Assignee: Industrial Technology Research Institute
    Inventor: Chi-Ming Shiao
  • Patent number: 6229387
    Abstract: The output signal converter for a tube amplifier includes semiconductor devices for amplifying or attenuating an output signal of the tube amplifier while maintaining the output properties of the tube amplifier. The output signal converter according to one embodiment has an output transformer (TR) having an input terminal (TRa); a first circuit branch (C1) connected between the input terminal (TRa) and an output terminal of the tube amplifier and a second circuit branch (C2) connected to the input terminal (TRa) of the output transformer (TR) and in parallel to the first circuit branch and including components that produce an electric current proportional to a current level in the first circuit branch. The first and second circuit branches are located between the tube amplifier and the output transformer (TR) and include semiconductor devices so that the output signal from the tube amplifier is amplified while maintaining the output properties of the tube amplifier.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: May 8, 2001
    Assignee: KORG, Inc.
    Inventors: Fumio Mieda, Yasuhiko Mori, Hirofumi Mitoma
  • Patent number: 6201444
    Abstract: A current mirror bias circuit for an RF amplifier transistor is modified whereby the reference transistor of the current mirror tracks hot carrier degradation in the RF transistor. Gate bias to the current mirror transistor is modified whereby the drain-to-gate voltage can be positive, and the lightly doped drain region in the lateral n-channel reference transistor is shortened and dopant concentration increased to increase the electric field of the reference transistor to provide the hot carrier injection degradation characteristics similar to the main transistor. Additionally, the gate length of the reference transistor can be shortened to effect the hot carrier injection degradation.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: March 13, 2001
    Assignee: Spectrian Corporation
    Inventors: John F. Sevic, Francois Hebert
  • Patent number: 6194967
    Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit includes an operational amplifier coupled in a circuit configuration. The circuit configuration includes two transistors coupled to the operational amplifier so that the corresponding voltages at the terminals or ports of the transistors are substantially identical. Briefly, in accordance with one more embodiment of the invention, an integrated circuit includes an operational amplifier coupled in a circuit configuration. The circuit configuration includes two circuit components coupled to the operational amplifier so that the corresponding voltages at the terminals or ports of the circuit components are substantially identical. The circuit components include any circuit components capable of implementing a transconductance.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: February 27, 2001
    Assignee: Intel Corporation
    Inventors: Luke A. Johnson, Rizwan Ahmed
  • Patent number: 6191656
    Abstract: An RF power amplifier has an RF driver stage that also provides a temperature independent reference current to the RF output power amplifier. A diode reference serves as both a DC current reference and as the first RF amplifier stage. Less DC power is consumed since no circuitry is used exclusively for establishing a DC reference.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: February 20, 2001
    Assignee: RF Micro Devices, Inc.
    Inventor: Alexander John Nadler
  • Patent number: 6188278
    Abstract: An amplification circuit for use with an electro chemical cell is disclosed. The cell is operated in the amperometric mode and finds beneficial application in the detection of carbon monoxide (CO) gas. The amplification circuit of the invention is used to derive electrical output signals from the cell whilst ensuring that the cell electrodes are held at a potential that minimises cross-sensitivities and controlling voltage spikes which the cell would otherwise extend in duration, due to its capacitive behaviour, and comprises an operational amplifier connected to derive electrical output signals from the cell and having a feedback path incorporating at least one component of a current mirror circuit.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: February 13, 2001
    Assignee: Thorn Security Limited
    Inventor: Stephen John Penney
  • Patent number: 6184752
    Abstract: The device has reference current sources (T71, T72, T7M) which are arranged in such a way that the sum of the currents flowing through each of the said sources is equal to the input current (IIN, I′IN) and output current sources (T81, T82, T8N), in each of which the current flowing through the reference sources is duplicated and which are arranged in such a way that the sum of the currents flowing through the output sources is equal to the output current (IOUT, I′OUT). The number of reference sources (T71, T72, T7M) and output sources (T81, T82, T8N) which are connected is controlled by the digital signal (200) and determines the gain of the device. Application to the circuit for processing the signals output by a read head of an optical disc reader apparatus.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: February 6, 2001
    Assignee: THOMSON multimedia
    Inventor: Pierre Dautriche
  • Patent number: 6181206
    Abstract: By selecting a particular configuration of an input stage of a low noise RF amplifier, an optimal combination of linearity and input matching is achieved upon selecting a certain gain factor from a set of fixed step values. Each input stage configuration defines an input matching network specifically suitable to operate at a certain RF frequency. An RF signal input inductor is selectively associated to an input coupling capacitor, and a second degeneration inductor of a gain transistor of the input stage having a different gain value. The selection of a certain configuration is made through at least one switch through which a bias current generator is switched to the programmably selected input stage.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: January 30, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giuseppe Palmisano, Salvatore Pennisi
  • Patent number: 6175278
    Abstract: A variable gain amplifier circuit has: a voltage-current conversion unit for converting an input voltage into a current and outputting the current; a current amplifier for amplifying the current at a set variable gain; a converter for converting the amplified current into an output voltage; and an operating point setting unit for setting an operating point so that the output voltage converges into a predetermined range during a period while a reference voltage is input.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: January 16, 2001
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Jun Hasegawa
  • Patent number: 6175275
    Abstract: A preamplifier includes an output stage having a bandwidth which is adjustable by a control signal. The output stage includes an amplifier with an adjustable bandwidth. The amplifier includes a main input for receiving an input current, a main output for providing an output voltage, a resistor connected between the main input and output. A current amplifier with an adjustable gain is connected for receiving the input current. A capacitor is connected between an output of the current amplifier and the main output. An inverting transconductance circuit is connected between the output of the current amplifier and the main output.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: January 16, 2001
    Assignee: STMicroelectronics S.A.
    Inventors: Michel Barou, Danika Chaussy
  • Patent number: 6169456
    Abstract: In accordance with the present invention, an auto-biased cascode current circuit capable of improved range in headroom is disclosed. In one embodiment, the current circuit includes a current mirror and a bias circuit, where the current mirror contains a reference leg and an output leg. A reference current flows within the reference leg. Included in the output leg is an output terminal, a first output transistor and a second output transistor. The output terminal operates at an output potential. The bias circuit regulates the reference leg of the current mirror such that the output potential is substantially equal to a drain-to-source saturation voltage of the first output transistor plus a drain-to-source saturation voltage of the second output transistor plus a predetermined overdrive voltage. The predetermined overdrive voltage is a design parameter which is less than a threshold voltage.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: January 2, 2001
    Assignee: STMicroelectronics N.V.
    Inventor: Gregory W. Pauls
  • Patent number: 6157259
    Abstract: Methods and circuits are disclosed for low voltage (1.5 Volt and below) CMOS circuits, offering good transconductance and current driving capabilities. These goals are achieved by biasing CMOS transistors in the weak inversion region, by utilizing multiple unit-sized transistors with a fixed gate width to gate length ratio, and by maintaining a uniform threshold voltage of each unit-sized transistor. The required transistor size is obtained by parallel connection of several unit-sized transistors, such that `n` unit sized transistors carry the required current of `n` units. The methods and circuits disclosed eliminate deviation of the output current of current mirrors caused by threshold voltage mismatch. Disclosed are a current mirror and two typical amplifiers as examples of weak inversion design.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: December 5, 2000
    Assignee: Tritech Microelectronics, Ltd.
    Inventor: Uday Dasgupta
  • Patent number: 6072359
    Abstract: A current generator circuit with controllable frequency response has at least one current mirror formed of MOS transistors, being powered through a terminal held at a constant voltage, having an input leg through which a reference current (I1) is driven by a first current generator (G1), and having an output leg for generating, on an output terminal (OUT) of the mirror, a mirrored current (I.sub.out) which is proportional to the reference current (I1). The input leg includes at least a first transistor (M1) which is diode-connected and has a control terminal (Ga1) coupled to a corresponding terminal (Ga2) of a second transistor (M2) included in the output leg. In accordance with the invention, the mirror circuit also has an impedance matching circuit connected across the control terminals (Ga1 and Ga2) of the first and second transistors and configured to hold the same voltage value at both terminals (Ga1 and Ga2).
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: June 6, 2000
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Davide Brambilla, Daniela Nebuloni, Giorgio Rossi, Sergio Lecce
  • Patent number: 6072995
    Abstract: An amplifier circuit in a wireless telecommunications device includes a digital-to-analog converter (DAC) and a mirror circuit to deliver variable current levels to transmission circuitry. The DAC receives a digital signal indicating the desired current strength under the particular device circumstances and requirements, and an analog signal corresponding thereto is forwarded to the mirror circuit, which amplifies the analog signal to the desired level for driving the transmission circuitry.
    Type: Grant
    Filed: February 26, 1997
    Date of Patent: June 6, 2000
    Assignee: Ericsson Inc.
    Inventors: Ronald D. Boesch, John W. Northcutt
  • Patent number: 6064268
    Abstract: A first current source supplies current to the collector of an emitter follower stage and a sense transistor. The sense transistor programs a current mirror so that most of the base current required by the emitter follower transistor comes from the current mirror instead of the input. A second current source that requires more current that the first current source supplies is connected to the output of the emitter follower and sinks the current coming out of the emitter of the emitter follower and the collector current of a load transistor. The load transistor supplies the difference in current between the amount of current supplied by the first current source and the amount sunk by the second current source.
    Type: Grant
    Filed: January 28, 1999
    Date of Patent: May 16, 2000
    Assignee: Hewlett--Packard Company
    Inventor: Jimmie D Felps
  • Patent number: 6064267
    Abstract: A current mirror utilizes an operational amplifier to provide linear operation over a wide output voltage range. The current mirror includes input transconductance, output transconductance, input cascode and output cascode devices. The operational amplifier has two inputs, one of which is coupled to a node between the output transistors, and the other of which is coupled to a node between the input transistors. The output of the amplifier is used to drive the control terminal of the input cascode device so that the operating voltage of the input transconductance device will be approximately equal to that of the output transconductance device.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: May 16, 2000
    Assignee: GlobeSpan, Inc.
    Inventor: Lanny Lewyn
  • Patent number: 6018271
    Abstract: A novel amplifier circuit having a wide output signal amplitude range and a small current consumption is disclosed. A signal conversion circuit converts the input signal thereof into a first current signal. A current calculation circuit calculates the difference between a predetermined current value and the first current signal. A current amplifier circuit amplifies the difference current. Since the difference current calculated by the current calculation circuit is amplified, the dynamic range of the output can be widened with a small current flowing in the signal conversion circuit and the current calculation circuit. Further, this amplifier circuit, if designed to supply no output current under no load, can reduce the current consumption since the only steady current that flows under that condition is the small one flowing in the signal conversion circuit and the current calculation circuit.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: January 25, 2000
    Assignee: Fujitsu Limited
    Inventor: Tachio Yuasa
  • Patent number: 6011415
    Abstract: A shock sensor circuitry (26) is provided for processing an input signal generated by a shock sensor (28) in response to the shock sensor (28) detecting a force or shock. The shock sensor circuitry (26) includes a leakage tolerant input amplifier (38) for receiving the input signal, and any leakage currents that may also be provided, and amplifying the input signal to generate an amplified input signal. The leakage tolerant input amplifier (38) provides an ac gain of ten and a dc gain of zero. The shock sensor circuitry (26) also includes a filter and amplification circuit and a window comparator. The filter and amplification circuit filters the amplified input signal and amplifies select frequencies of the amplified input signal to generate a summed signal that is provided to the window comparator and compared to a reference value.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: January 4, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Dennis V. Hahn, Rolf Lagerquist, William R. Krenik
  • Patent number: 5986507
    Abstract: A current mirror circuit comprises a first current-to-voltage converter for inputting an input current, a second current-to-voltage converter, a first transistor, the collector or drain of which outputs an output current, and the emitter or source of which is connected to the second current-to-voltage converter, and a control unit for controlling a control electrode of the first transistor. The control unit refers a voltage current-to-voltage converted by the first and second current-to-voltage converters to control the first transistor so that currents flow from the control unit to the first and second current-to-voltage converters at a predetermined ratio.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: November 16, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Itakura, Zdzislaw Czarnul
  • Patent number: 5969574
    Abstract: An accurate, low voltage, low parts-count current sense amplifier can be employed to sense either high side or low side currents. A pair of transistors are connected in a common-base configuration and biased with equal currents, with a sense resistor connected between their respective emitter circuits. A sensed current develops a voltage across the sense resistor which unbalances the transistor currents. A third transistor is connected to provide a feedback current to detect and correct the current imbalance; the feedback current is directly proportional to the sensed current, and serves as the current sense amplifier's output. The current sense amplifier requires only three transistors, can be realized with bipolar or FET devices of either polarity, and can operate at supply voltages as low as about 1.1 volts.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: October 19, 1999
    Assignee: Analog Devices, Inc.
    Inventor: Bryan A. Legates
  • Patent number: 5963096
    Abstract: An amplifier circuit can operate stably without increasing a consumed current even when a direct current amplification of a transistor is fluctuated due to tolerance in manufacturing process. The amplifier circuit has a first transistor having an emitter grounded. A second transistor has an emitter connected to a collector of said first transistor and a collector connected to a power source via a load and a first bias resistor circuit network. A third transistor constructs a current mirror circuit together with said first transistor and receives a bias current via a second bias resistor circuit network. The second bias resistor circuit network has a power source side terminal connected to a junction point between said load and said first bias resistor circuit network.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: October 5, 1999
    Assignee: NEC Corporation
    Inventor: Koichi Hoshino
  • Patent number: 5952884
    Abstract: A current mirror circuit has a reference current source for supplying a reference current, and a plurality of field effect transistors including an input circuit connected to the reference current source and supplied with the reference current and at least an output circuit connected to the input circuit in a current mirror fashion. The input circuit has first and second input transistors connected in series with each other. The gates of the first and second input transistors are connected both to the drain of the second input transistor. The drain of the second input transistor is connected to the reference current source. The output circuit has first and second output transistors connected in series with each other. The source of the first output transistor is connected to the source of the first input transistor. The gates of the first and second output transistors are connected to the gates of the first and second input transistors, respectively.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: September 14, 1999
    Assignee: Fujitsu Limited
    Inventor: Satoshi Ide
  • Patent number: 5949288
    Abstract: This circuit arrangement has the property of an amplifier with a set or adjustable non-inverting gain and contains an opamp (3) having an a non-inverting and an inverting input (31, 32) as well as an output (33) which is also a signal output (A) of the circuit arrangement, and a current copier (8) having a current input and a current output. The noninverting input (31) is connected to a first reference potenial (P.sub.1) and the output (33) via a first resistor (1) to the inverting input (32). The input (E) of the circuit arangement is connected via a second resistor (2) to the current input of the current copier (8) the current output of which is connected to the inverting input (32). The output section of the current copier is connected to a second reference potential (P.sub.2) and its input section to the first reference potential.
    Type: Grant
    Filed: July 24, 1997
    Date of Patent: September 7, 1999
    Assignees: Endress + Hauser GmbH + Co., ENVEC Mess- und Regeltechnik GmbH + Co., Vega Grieshaber KG, Kavilco Corporation
    Inventor: Petrus H. Seesink
  • Patent number: 5936471
    Abstract: The present invention relates to a current amplifier including a first MOS transistor with a drain defining a first terminal for controlling the amplifier with a current and a source connected to a first supply line. It also includes a second MOS transistor with a drain forming a terminal of current output of the amplifier and a source connected to the first supply line, and at least one first bipolar transistor having a base connected to the first control terminal, an emitter connected to a gate of the first MOS transistor and is, via a first biasing resistor, connected to the first supply line and having a collector of the first bipolar transistor being connected to a second supply line.
    Type: Grant
    Filed: July 15, 1997
    Date of Patent: August 10, 1999
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Marius Reffay, Michel Barou
  • Patent number: 5936231
    Abstract: When a third transistor receives first photoelectric currents outputted from a sensing photodiode, the third transistor provides second photoelectric currents to bases of a first transistor and a second transistor, then the first transistor turns on and carries the first photoelectric currents, so first currents corresponding to the first photoelectric currents flow to a first terminal. Thus, the first photoelectric currents can be directly outputted from the first terminal. On the other hand, the second transistor also turns on and carries second currents corresponding to amplified first photoelectric currents, so the second currents flow to a third terminal. Thus, the amplified first photoelectric currents can be outputted from the third terminal.
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: August 10, 1999
    Assignee: Denso Corporation
    Inventors: Katsunori Michiyama, Keiji Horiba
  • Patent number: 5933441
    Abstract: A circuit for protecting a laser indicator is disclosed in which a current amplifying circuit composed of two transistors drives a laser light emitting diode (LED) to generate a laser light. A base of one of the two transistors connects with a protective resistor and a variable resistor. The variable resistor is used to control the magnitude of a base current of the transistor and the protective resistor is used to prevent an overrating current. A diode is further coupled to a positive power input terminal of the current amplifying circuit to prevent the circuit for protecting a laser indicator from being damaged due to being reversely connected the polarities of the power source. Through a design of such a circuit, a stable laser light-spot is achieved and the components in the circuit will not be damaged.
    Type: Grant
    Filed: November 6, 1997
    Date of Patent: August 3, 1999
    Inventor: Hung-Ping Chen
  • Patent number: 5929708
    Abstract: A power-conserving, linear and broad band RF amplifier, suitable for use at more than one band in the ultra-high frequency regions allotted to radiotelephone transceivers, employs an emitter-follower output transistor to deliver the nominal 1.0 milliwatt RF power to a single-ended load from a low voltage battery, typically 2.7 v. dc, without the use of output coupling transformers. The amplifier receives only a small differential input signal from the preceding mixer or multiplier stage having a typical peak-to-peak magnitude of 0.3 v. The differential input signal is applied to the emitters of a pair of transistors whose bases are interconnected, one transistor of which (B6) is diode-connected in a current-mirror configuration and the other (B5) of which is configured in a common-base connection with emitter degeneration. The signals are summed at the collector of the common-base transistor to deliver a substantial voltage swing, illustratively 1.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: July 27, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Paul Cooper Davis, Milton Luther Embree, Brian K. Horton
  • Patent number: 5923217
    Abstract: A low-noise amplifier circuit (40) and a method for generating a bias voltage within the amplifier circuit (40). The amplifier circuit includes a cascode configured circuit (15) having a common emitter transistor (12) biased by a current sourcing circuit (43) and a common base transistor (13) biased by a bias voltage generator (21). The current sourcing circuit (43) measures a base current of the common emitter transistor (12) and transmits the base current to a current mirror (41). Further, a current source (50) transmits a bias current to the current mirror (41). The current mirror sums the currents from the current sourcing circuit (43) and the current mirror (41) and generates a mirror output current. A portion of the mirror output current drives the bias voltage generator (21) and a portion of the mirror output current serves as the base current of the common base transistor (13).
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: July 13, 1999
    Assignee: Motorola, Inc.
    Inventor: Jeffrey C. Durec
  • Patent number: 5917381
    Abstract: In an amplifier, a first transistor of npn type has its base connected to an input terminal, a second transistor of pnp type has its base connected to the base of the first transistor, and a third transistor of pnp type has its base connected to the base of the first transistor. A current mirror circuit doubles the collector current of the second transistor so that the doubled current is used as the emitter current of the third transistor. The base currents of the first and second transistors are supplied by the base current of the third transistor.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: June 29, 1999
    Assignee: Rohm Co., Ltd
    Inventor: Hideki Tawarayama