Abstract: An RF power amplifier operates over the range of supply voltages provided by a DC/DC converter whether the range of voltages is intentional or unintentional. A system for digitally adjusting the bias levels relative to the supply voltage includes at least one RF power amplifier stage, a digital control block, and a bias circuit. The RF power amplifier stage has at least one RF input signal, at least one RF output signal, and at least one bias input that controls its bias conditions. The RF Power Amplifier Stage includes one or more active gain elements used to amplify the RF input signals. The RF power amplifier operates in a number of bias states controlled by the digital control block. The digital control block uses information related to the supply voltage and may use other information stored in memory to select the desired bias.

Abstract: A (e.g., Doherty) circuit with carrier and peaking amplifier paths, has an independently controlled, variable phase shifter in each of those signal processing paths that is controlled to compensate for distortion resulting from operating at frequencies that are relatively far from the optimal (e.g., center) frequency of the circuit's operating bandwidth.

Abstract: A power amplifier architecture includes high and low power paths. The high power path may include a number of different amplifier structures. The low power path includes a switching element configured to short a signal line to ground or provide an open between the signal line and ground. The low power path and an output of the high power path are summed at a summing junction. Circuitry, responsive to one or more control signals, is configured in a high power mode to turn on amplifier(s) in the amplifier structure, route an input signal through a driver amplifier to the high power path and place the switching element in one of the open/closed positions; the circuitry is configured in a low power mode to turn off the amplifier(s), route the input signal through a driver amplifier to the low power path and place the switching element in the other position.

Abstract: A integrated Doherty amplifier circuit comprising a main input terminal, a peak input terminal and an output terminal, a main input conductor and a peak input conductor that are offset from one another in a first direction, the main and peak input conductors extend in a second direction that is perpendicular to the first direction, and wherein an input end of the main input conductor is coupled to the main input terminal and an input end of the peak input conductor is coupled to the peak input terminal, an output conductor that extends in the second direction, an output end of the output conductor is coupled to the output terminal, a main amplifier stage extends in the second direction and has a main stage input and a main stage output, a peak amplifier stage extends in the second direction and has a peak stage input and a peak stage output.

Abstract: A Doherty amplifier has a distributor for branching an input signal into two signals, a carrier amplifier to which one of the signals is inputted from the distributor, a peak amplifier to which another signal of the signals is inputted from the distributor, and a synthesizer for synthesizing output signals from the carrier amplifier and the peak amplifier. The carrier amplifier has a compound semiconductor device with at least two terminals. The peak amplifier has a single element semiconductor device. Bias voltages having the same polarity are applied to the two terminals of the compound semiconductor device.

Abstract: The invention concerns a detection device including a photodiode (Ph) designed to capture a luminous signal to transform it into a current (Iph) and including first and second terminals, a transimpedance amplifier circuit connected between the first terminal and the second terminal of the photodiode (Ph) and designed to amplify the current (Iph) coming from the photodiode (Ph). The transimpedance amplifier circuit includes a plurality of operational amplifiers (AOP1, AOP2, AOP3) connected in parallel and a gain resistor (Rgain) common to all the connected amplifiers.

Abstract: Methods and systems for split voltage domain receiver circuits are disclosed and may include amplifying complementary received signals in a plurality of partial voltage domains. The signals may be combined into a single differential signal in a single voltage domain. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. The sum of the partial domains may be equal to a supply voltage of the integrated circuit. The complementary signals may be received from a photodiode. The amplified received signals may be amplified via stacked common source amplifiers, common emitter amplifiers, or stacked inverters. The amplified received signals may be DC coupled prior to combining. The complementary received signals may be amplified and combined via cascode amplifiers. The voltage domains may be stacked, and may be controlled via feedback loops. The photodetector may be integrated in the integrated circuit.

Abstract: The invention relates to a high frequency power multiplier solution which enables multiple coupled high frequency power amplifier assemblies to be interconnected for adding individual powers thus avoiding the need of otherwise conventional and functionally complex functional groups of a power combiner.

Abstract: An integrated power amplifier circuit is disclosed. The circuit comprises: first and second amplifiers fabricated on one or more dies, the one or more dies being mounted on a support structure; a first set of one or more connection elements connected to the first amplifier and passing above a portion of the support structure; and a second set of one or more connection elements connected to the second amplifier and passing above a portion of the support structure. The support structure comprises at least one void, at least a portion of the at least one void being positioned directly underneath at least one of the first and second sets of one or more connection elements.

Abstract: An amplification unit is provided. The amplification unit, comprises a first amplifier, a second amplifier, a first sensor, a first predistortion component, and a signal combiner. The first amplifier amplifies a first signal to produce a second signal. The first sensor produces a third signal based on the second signal. The second amplifier turns on and to amplifies a fourth signal to produce a fifth signal when the amplitude of the fourth signal exceeds a threshold amplitude and turns off when the amplitude of the fourth signal is less than the threshold amplitude. The first predistortion component produces the first signal based on a first input signal, based on the third signal, and based on an on-off state of the second amplifier. The signal combiner produces an output of the amplification unit based on the second signal and the fifth signal.

Abstract: The present invention relates to a power amplifier apparatus and power amplifier circuit, and the power amplifier circuit uses the Doherty circuit structure, and uses a high voltage heterojunction bipolor transistor (HVHBT) power amplifier to achieve a Carrier amplifier of the Doherty circuit structure, and uses lateral double-diffused metal oxide semiconductor (LDMOS) to achieve a Peak amplifier. The power amplifier apparatus and power amplifier circuit in the present invention improves the efficiency of the power amplifier.

Abstract: An amplifier circuit includes an RF transistor, a parallel resonator and a series resonator. The RF transistor has an input, an output and an intrinsic output capacitance. The parallel resonator is connected to the output of the RF transistor and includes a first inductive component connected in parallel with the intrinsic output capacitance of the RF transistor. The series resonator connects the output of the RF transistor to an output terminal and includes a second inductive component connected in series with a capacitive component. The series resonator is operable to compensate for a change in impedance of the parallel resonator over frequency.

Abstract: A wideband Doherty amplifier circuit includes a main amplifier configured to operate in a linear mode, a peaking amplifier configured to operate in a non-linear mode and a Doherty combiner directly connected to an output of each amplifier so that no output match devices are in the path between the amplifier outputs and the Doherty combiner. The Doherty combiner is configured to present the same load impedance to each amplifier when both amplifiers are conducting and present a modulated load impedance to the main amplifier when the peaking amplifier is non-conducting so that a variation in the VSWR seen by the main amplifier is less than 5% over a plurality of frequency bands and/or so that the peaking amplifier has an off-state impedance spreading of 20 degrees or less over the plurality of frequency bands.

Abstract: Circuits and methods for performing multilevel power amplification using multiple different supply voltages or states are disclosed. In some embodiments, power amplifiers are provided that switch between three or more supply voltages or states.

Abstract: A symmetric Doherty amplifier includes a main amplifier and a peaking amplifier of the same size as the main amplifier. The symmetric Doherty amplifier is configured to operate at peak output power when the main amplifier and the peaking amplifier are each in saturation, and at output-back-off (OBO) when the main amplifier is in saturation and the peaking amplifier is not in saturation. Phase shift circuitry is configured to shift the phase at an output of the peaking amplifier at OBO so that a load impedance seen by the main amplifier and efficiency of the symmetric Doherty amplifier both increase at OBO as a function of the phase shift at the peaking amplifier output.

Abstract: The present invention is directed to an impedance transformation device for use in a system having a characteristic system impedance, the device being characterized by a predetermined bandwidth having a center frequency. The device housing size is one-eighth wavelength of the center frequency. A first coupler is characterized by an even mode impedance and an odd mode impedance. The bandwidth is a function of the even mode impedance and the odd mode impedance substantially corresponds to the component port impedance. At least one second coupler is disposed in parallel with the first coupler and is characterized by the even mode impedance and the odd mode impedance.

Abstract: A control method and apparatus of a peak amplifier of a Doherty power amplifier are disclosed, wherein, the control apparatus includes a Radio Frequency (RF) switching circuit in a peak amplification branch of the Doherty power amplifier, which is used to control the turn-on and turn-off of the peak amplifier in the peak amplification branch. The method and apparatus avoid a disadvantage that the peak branch in the Doherty power amplifier is turned on ahead of time, thus reducing the power consumption of the peak power amplifier, and enhancing the mass efficiency of the whole power amplifier; and largely reducing the product expense and production expense of the power amplifier compared to the scheme of some manufacturers improving on-time of the peak power amplifier using complex digital circuits.

Abstract: A high-frequency power amplifier that amplifies a high-frequency input signal and outputs a signal having one power selected from a plurality of powers includes a high output route that is a circuit, which amplifies the input signal and outputs a signal of a high power, and a medium output route that is a circuit, which amplifies the input signal and outputs a signal of a medium power. The high output route includes a high-output amplifier that amplifies the input signal, an output matching circuit that is connected to an output node of the high-output amplifier, and a switch element that is connected to an output node of the output matching circuit. The medium output route includes a medium-output amplifier that amplifies the input signal and a switch element that is connected between an output node of the medium-output amplifier and an output node of the output matching circuit.

Abstract: A semiconductor power amplifier of an embodiment includes: a plurality of unit FETs disposed in parallel in a direction of a substantially straight line connecting source electrodes of the unit FETs; a first via hole which connects the two source electrodes positioned between adjacent ones of the unit FETs in common and an RF ground electrode; and a second via hole which connects the source electrode on a side having no adjacent unit FET and the RF ground electrode. Each unit FET includes: a gate electrode which connects gate finger electrodes and leads out the gate finger electrodes; a drain electrode which connects drain finger electrodes disposed facing the gate finger electrodes and leads out the drain finger electrodes; and two source electrodes which connects source finger electrodes disposed facing the gate finger electrodes and lead out the source finger electrodes to opposing sides in a widthwise direction thereof.

Abstract: The present invention relates to an amplifier comprising a plurality of Doherty amplifier cells each Doherty amplifier cell comprising an input and an output respectively connected to an input and an output of the amplifier, a main amplifier stage, a peak amplifier stage and a signal combining circuit configured to combine signals from outputs of the main and peak amplifiers and provide a combined signal to the output of the Doherty amplifier cell. Each cell comprises a controllable splitter having an input (connected to the input of the Doherty amplifier cell. The controllable splitter is configured to receive a splitter control signal and modify an amplitude and phase of a signal at the input of the Doherty amplifier cell in response to the splitter control signal.

Abstract: An apparatus for amplifying power is provided. The apparatus includes a supply modulator for generating a supply voltage based on an amplitude component of a transmission signal, and a power amplify module for amplifying power of the transmission signal using the supply voltage, wherein the power amplify module includes a first power amplifier and a second power amplifier, and when an output power of the transmission signal is greater than a reference power, the first power amplifier amplifies the power of the transmission signal using the supply voltage, and when the output power of the transmission signal is equal to or less than the reference power, the second power amplifier amplifies the power of the transmission signal using the supply voltage.

Abstract: A Doherty power amplifier including a main amplifier, an auxiliary amplifier and a controller governing the operation of the auxiliary amplifier, the controller being operative to switch the operational state of the auxiliary amplifier between an operational state and a non-operational state as a function of input signal voltage supplied to the power amplifier such that the auxiliary amplifier is inoperative when the input voltage is below an input voltage threshold and is operative when the input voltage is above the input voltage threshold.

Abstract: Amplifiers with shunt switches to mitigate interference are disclosed. In an exemplary design, an apparatus includes an amplifier and a shunt switch. The amplifier has an input operatively coupled to an input/output (I/O) pad of an integrated circuit (IC) chip. The shunt switch grounds the amplifier when the shunt switch is closed. The shunt switch is isolated from the I/O pad and the amplifier input. The amplifier may be a low noise amplifier (LNA) or some other type of amplifier. In an exemplary design, the shunt switch is isolated from the I/O pad by a series switch. The series switch and the shunt switch may be closed when the amplifier is disabled and may be opened when the amplifier is enabled.

Abstract: A radio frequency amplifier circuit includes: low-output transistors, each of which includes an input terminal, an output terminal, and a ground terminal, and amplifies a radio frequency signal; a harmonic processing circuit provided for each of the low-output transistors to be connected to the output terminal of the low-output transistor, and processing a secondary harmonic included in an amplified radio frequency signal, and a resistor connected to the output terminal of each of the low-output transistors. The input terminal of each of the low-output transistors is connected to an input terminal of the radio frequency amplifier circuit via an inductor, and the output terminal of each of the low-output transistors is connected to the other output terminal via the resistance and is further connected to an output terminal of the radio frequency amplifier circuit via an inductor.

Abstract: A circuit for amplifying an input signal can comprise a plurality of couplers. A splitting coupler of the plurality of couplers can receive the input signal and a combining coupler of the plurality of couplers can provides an output signal. N number of amplifiers can be included in the circuit to amplify the input signal, wherein N is a non-binary integer greater than one. At least one of the plurality of couplers can comprise a hybrid coupler that has two ports terminated into substantially equal reactances.

Abstract: A Doherty amplifier has a distributor for branching an input signal into two signals, a carrier amplifier to which one of the signals is inputted from the distributor, a peak amplifier to which another signal of the signals is inputted from the distributor, and a synthesizer for synthesizing output signals from the carrier amplifier and the peak amplifier. The carrier amplifier has a compound semiconductor device with at least two terminals. The peak amplifier has a single element semiconductor device. Bias voltages having the same polarity are applied to the two terminals of the compound semiconductor device.

Abstract: A Doherty amplifier comprises a first amplifier, one or more second amplifiers and a third amplifier to receive inputs of high-frequency signals in parallel, wherein the first amplifier serving as a carrier amplifier amplifies the high-frequency signal, each of the second amplifiers serving as the carrier amplifiers or peaking amplifiers amplifies the high-frequency signal, and the third amplifier serving as the peaking amplifier amplifies the high-frequency signal.

Abstract: A dual band amplifier is provided comprising a first matching circuit disposed in a first radiofrequency path between an input port and a first amplifier and a second matching circuit disposed in a second radiofrequency path between the input port and a second amplifier. The first matching circuit transforms a first input impedance of the first amplifier to a predetermined input port impedance when the radiofrequency signal is in a first frequency range and transmits the first input impedance to the input port when the radiofrequency signal is in the second frequency range. The second matching circuit transforms the second input impedance to the input port impedance when the input signal is in the second frequency range and transmits the second input impedance to the input port when the radiofrequency signal is in the first frequency range.

Abstract: A transconductance circuit that improves linearity and output current over a wider range of input voltages than prior designs. The transconductance circuit may include first and second sets of paired differential transistors. In each set, emitters of the paired transistors may be commonly coupled to corresponding nodes of a common impedance, and collectors may be coupled to output terminals of the transconductance circuit. The circuit may further include first and second sets of doublet differential transistor pairs, each doublet pair having transistors of different sizes. Each doublet pair may have current sources coupled between commonly coupled emitters and a source potential. Respective collectors for each doublet pair may be coupled to the output terminals of the transconductance circuit. A pair of voltage followers may be provided to replicate corresponding input voltages across corresponding bases of the differential transistor pairs and the doublet transistor pairs.

Abstract: A multi-mode power amplifier includes a high-power mode amplifier circuit, a mid-power mode amplifier circuit, and a low power amplifier circuit, where the low-power mode amplifier circuit comprises a plurality of independently selectable power cell/amplifier branches. The multi-mode power amplifiers selectively enable or disable amplifier branches to provide multiple levels of amplification. Selectively enabling certain of a plurality of split collector amplifier branches provides multiple low power and ultra-low power amplifier modes without the impedance mismatch or board layout problems associated with an RF switch.

Abstract: An amplifying apparatus includes: a plurality of amplifiers; a linear combiner receiving a plurality of leakage signals resulting from cross leakage between outputs of the plurality of amplifiers and performing a linear combination of level values of the plurality of leakage signals to generate a plurality of linear combination signals; and an output calculator calculating real level values of a plurality of output amplified signals of the amplifiers from level values of the linear combination signals.

Abstract: An amplifying apparatus includes a first amplifier that amplifies a first signal of a constant amplitude; a second amplifier that amplifies a second signal identical in amplitude and differing in phase with respect to the first signal; a first transmission line of which, a first end is connected to an output terminal of the first amplifier; a second transmission line differing in length with respect to the first transmission line and of which, a first end is connected to an output terminal of the second amplifier and a second end is connected to a second end of the first transmission line; and an amplitude balance adjusting element connected to the first or the second transmission line. The amplifying apparatus outputs from a connection node of the first and the second transmission lines, a signal that is a combination of output signals of the first amplifier and of the second amplifier.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A low quiescent current amplifier and driver having multiple amplifiers (e.g. Class AB and B amplifiers) work in concert to independently amplify all or a portion of a signal into multiple amplified signals combined into a unified signal. Operation of a second amplifier is slaved to operation of a first amplifier. Each amplifier may have its own feedback loop providing the same gain transfer function to align transitions of the multiple amplified signals. Operation of the first amplifier may be detected using a replica of a signal, stage or transconductance in the first amplifier. At the same threshold, operation of the first and second amplifiers may be transitioned, e.g., the second amplifier may transition between providing increasing or decreasing current and providing zero current while the first amplifier may transition between providing constant current and providing increasing or decreasing current.

Abstract: According to one embodiment, a circuit comprises a Capacitive Trans-Impedance Amplifier (CTIA) configured to receive a current pulse at an input and convert the current pulse to a voltage step. The voltage step is directed to a first signal path and a second signal path. When the voltage step exceeds a first threshold, the first signal path directs an enable pulse to the second signal path. The second signal path generates an output pulse when the voltage step exceeds a second threshold and the enable pulse is enabled. The second signal path comprises a first, a second, and a third amplifier to increase detection of the voltage step by the second signal path.

Abstract: A Doherty amplifier having a main amplifier branch and one or more peak amplifier branches, where the functionality and structure of the cascade of the main output matching network, the main offset line, and the quarter-wave transformer of the main amplifier branch of a conventional Doherty amplifier are subsumed into the main output matching network of the main amplifier branch, and the functionality and structure of each cascade of the peak output matching network and the peak offset line of each peak amplifier branch of a conventional Doherty amplifier are subsumed into the peak output matching network of the corresponding peak amplifier branch. Furthermore, the output quarter-wave transformer can be replaced by a wideband node matching network that does not have to perform frequency inversion.

Abstract: A system and method for operating a power amplifier comprising the steps of determining a first impedance generated by a first amplifier component of the power amplifier, determining a second impedance generated by a second amplifier component of the power amplifier, and, adjusting the first impedance or the second impedance to an optimal impedance condition by altering a current ratio of a current delivered by the first amplifier component and a current delivered by the second amplifier component.

Abstract: A power-amplifier arrangement (35) is disclosed. The power-amplifier arrangement (35) comprises a pulse modulator (40) adapted to receive a digital input signal of the power-amplifier arrangement (35) and generate, based on the digital input signal of the power-amplifier arrangement (35), an output signal of the pulse modulator (40) with a plurality of quantization levels. The pulse modulator has a plurality of output ports (50—1-50_n) for representing the output signal of the pulse modulator (40). Each output port (50—1-50_n) of the pulse modulator (40) is associated with a unique one of the quantization levels such that a signal output on the output port (50—1-50_n) adopts a first state when the output signal of the pulse modulator (40) equals or exceeds the associated quantization level, or, otherwise, a second state. A related radio-transmitter circuit and a related radio-communication apparatus are also disclosed.

Abstract: A power amplifier includes: a first amplifying element amplifying an input signal; a second amplifying element amplifying an output signal of the first amplifying element; a third amplifying element amplifying the input signal; a first switch connected between an output of the first amplifying element and an input of second amplifying element; a second switch connected between an output of the first amplifying element and an output of the third amplifying element; a third switch connected between an output of the first amplifying element and an output of the second amplifying element; a reference voltage generating a circuit generating reference voltage; a bias circuit supplying a bias current, based on the reference voltage, to inputs of the first, second, and third amplifying elements; and a control circuit controlling the first, second and third switches and the reference voltage generating circuit.

Abstract: A LINC power amplifier selects, based on an amplitude of an input signal, partial signals used for combination, and determines, based on the amplitude and a phase of the input signal, an amplitude and a phase of the selected partial signals so that a range of output power that the LINC power amplifier operates a given efficiency is expanded, inputs the selected partial signals to corresponding power amplifiers, and combines signals obtained by amplification of the selected partial signals by the corresponding power amplifiers.

Abstract: A Lange coupler having a first plurality of lines on a first level and a second plurality of lines on a second level. At least one line on the first level is cross-coupled to a respective line on the second level via electromagnetic waves traveling through the first and second plurality of lines. The first and second plurality of lines may be made of metal, and the first level may be higher than the second level. A substrate may be provided into which the first and second plurality of lines are etched so as to define an on-chip Lange coupler.

Abstract: A system and method of calibrating an amplifier are presented. The amplifier has a first amplification path and a second amplification path. An attenuation of the first amplification path is set to a first attenuation value and an attenuation of the second amplification path is set to the first attenuation value. A first phase shift of the first amplification path and a second phase shift of the second amplification path that meets a first performance criteria is determined. A phase shift of the first amplification path is set to the first phase shift and a phase shift of the second amplification path is set to the second phase shift. A first attenuation of the first amplification path and a second attenuation of the second amplification path that meets a second performance criteria is determined.

Abstract: The invention is based on the fact that the current output from a DDB controlled amplifier in backoff, i.e. for low amplitudes, is reduced more or less linearly with the amplitude of the signal to be amplified. Therefore, it is enough to use smaller amplifiers which are able to output the necessary RF current. Hence, according to the present invention, the total DDB amplifier is divided into smaller parts that are coupled to the output only when needed.

Abstract: A Doherty amplifier having a main amplifier branch and one or more peak amplifier branches, where the functionality and structure of the cascade of the main output matching network, the main offset line, and the quarter-wave transformer of the main amplifier branch of a conventional Doherty amplifier are subsumed into the main output matching network of the main amplifier branch, and the functionality and structure of each cascade of the peak output matching network and the peak offset line of each peak amplifier branch of a conventional Doherty amplifier are subsumed into the peak output matching network of the corresponding peak amplifier branch. Furthermore, the output quarter-wave transformer can be replaced by a wideband node matching network that does not have to perform frequency inversion.

Abstract: The present invention relates to an amplifier circuit where a load modulation is applied to a segmented amplifier. This will reduce the shunt loss since the loss of a segmented amplifier is reduced by allowing each amplifier segment or combination of segments to operate to their full output power capacity, rather than limited to a lower output power which results in a higher shunt loss. Hence, operation to full capacity before adding more segments is made possible by dynamically modulating the load.

Abstract: Techniques for generating bias voltages for a multi-cascode amplifier. In an aspect, a multi-cascode bias network is provided, each transistor in the bias network being a replica of a corresponding transistor in the multi-cascode amplifier, enabling accurate biasing of the transistors in the multi-cascode amplifier. In another aspect, a voltage supply for the multi-cascode amplifier is provided separately from a voltage supply for the replica bias network, to advantageously decouple variations in the amplifier voltage supply from the bias network voltage supply. In yet another aspect, the bias voltages of transistors in the multi-cascode amplifier may be configured by adjusting the impedance of resistive voltage dividers coupled to the transistor gate biases. As the gain of the amplifier depends on the bias voltages of the cascode amplifiers, the gain of the amplifier may be adjusted in this manner without introducing a variable gain element directly in the amplifier signal path.

Abstract: The present invention relates to a power amplifier apparatus and a power amplifier circuit thereof, the power amplifier circuit uses Doherty circuit structure, and it uses a high voltage heterojunction bipolar transistor (HVHBT) power amplifier to achieve a Carrier amplifier with the Doherty circuit structure, and uses a high electron mobility transistor (HEMT) power amplifier to achieve a Peak amplifier with the Doherty circuit structure. The power amplifier apparatus and a power amplifier circuit thereof in the present invention improves the efficiency of the power amplifier.

Abstract: The present invention discloses a Doherty power amplifier and an implementation method thereof. A peak amplifying circuit of the Doherty power amplifier comprises a radio frequency switching circuit configured to control turn-on of the peak amplifying circuit; wherein a last stage carrier amplifier of a carrier amplifying circuit of the power amplifier uses a HVHBT device, and a last stage peak amplifier of the peak amplifying circuit of the power amplifier uses a GaN device. The present invention avoids the shortcoming when the peak branches in the Doherty power amplifier are turned on ahead of time, decreases power consumption of the peak amplifier and improves the batch efficiency of the whole Doherty power amplifier.

Abstract: The present invention relates to a power amplifier apparatus and a power amplifier circuit. The power amplifier circuit uses a Doherty circuit structure, uses a High Electron Mobility Transistor (HEMT) power amplifier to implement a Carrier amplifier with the Doherty circuit structure, and uses a Laterally Diffused Metal Oxide Semiconductor Field Effect Transistor (LDMOS) to implement a Peak amplifier. With the power amplifier apparatus and power amplifier circuit of the present invention, the power amplifier efficiency is improved.

Abstract: A method and system for designing and implementing a reconfigurable Doherty amplifier system are disclosed. In one embodiment, a design method includes determining, using a processor, a first set of ABCD transmission parameters of a first output compensation network in a main path of a Doherty amplifier for the case where an auxiliary amplifier of the Doherty amplifier is off. The method further includes determining, using a processor, a second set of ABCD transmission parameters of a second output compensation network in an auxiliary path of the Doherty amplifier based on the first set of ABCD transmission parameters.