Including Balanced To Unbalanced Circuits And Vice Versa Patents (Class 330/301)
  • Patent number: 8576005
    Abstract: An integrated circuit is disclosed, including a balun, a transistor pair, and a degeneration inductor winding. The balun has an outer boundary, and comprises a primary winding and a secondary winding. The primary winding is adapted to receive an input signal. The secondary winding is magnetically coupled to the primary winding, and adapted to convert the input signal into a differential form. The transistor pair is connected to the secondary winding and adapted to amplify the input signal. The degeneration inductor winding is connected to the transistor pair and located within the outer boundary of the balun.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: November 5, 2013
    Assignee: Mediatek Inc.
    Inventor: Chih-Fan Liao
  • Patent number: 8547185
    Abstract: An electronic balun circuit is provided for converting a single-ended signal into a differential signal and vice versa, comprising a center-tapped inductor having a first node, a center-tap coupled to a constant voltage source, and a second node. A first impedance circuit is coupled with the first node and with a line carrying single-ended signal to and from the first node. A second impedance circuit is coupled with the second node. The first node receives the single-ended signal to produce a differential signal at the first and second nodes. The first and second nodes receive the differential signal to produce the single-ended signal at the first node. Both first and second impedance circuits have an impedance of 2RL, resulting in a total effective impedance of Rin for achieving an impedance match between the line and the first node. Furthermore, a passive network is added to balance the balun.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: October 1, 2013
    Assignee: Mindtree Limited
    Inventor: Manoj Shridhar Soman
  • Publication number: 20130207721
    Abstract: An envelope tracking power amplifier uses signal cancellation techniques to provide isolation between RF signals and envelope signals, without the use of filters. In this manner, the envelope tracking power amplifiers are capable of operating with envelope signals that are at or near the frequency of the corresponding RF signals. In at least one embodiment, a double balanced power amplifier is provided that includes a balanced RF input port, a balanced RF output port, and a balanced envelope input port. The balanced nature of the amplifier results in ports of the amplifier forming virtual grounds with respect to signals at other ports. In some other embodiments, a single balanced amplifier is provided that provides isolation between ports thereof.
    Type: Application
    Filed: February 14, 2013
    Publication date: August 15, 2013
    Applicant: AURIGA MEASUREMENT SYSTEMS, LLC
    Inventor: AURIGA MEASUREMENT SYSTEMS, LLC
  • Patent number: 8497739
    Abstract: There is provided a single-differential converting circuit that can reduce the variations in the input voltage of an operational amplifier sufficiently, made by changes in the voltages input from the exterior, while maintaining the function as the amplifier. The single-differential converting circuit is configured to include: an operational amplifier 104 provided with an inverting input terminal 104a and a noninverting input terminal 104c, for respectively receiving an input signal and a signal indicative of a reference voltage, a noninverting output terminal 104b and an inverting output terminal 104d having opposite polarities to each other; and a positive feedback impedance element 103a connected between one of the two input terminals and one, of the output terminals, having a same polarity with the above one of the two input terminals.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: July 30, 2013
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Kazuo Koyama
  • Patent number: 8476981
    Abstract: A differential amplifier including an input of a balanced type relative to a reference potential; a balanced output; first and second bipolar transistors mounted in common emitter configuration, emitters of the first and second transistors linked by two feedback impedances in series; and a perfect current generator, wherein an impedance Zg at the terminals of the current generator is connected between a common point of the two feedback impedances and the reference potential, the input is connected to a base of the first transistor, a base of the second transistor is linked to the reference potential to form, with a base of the first transistor, the unbalanced input, the balanced output is produced by collectors of the first and second transistors through an impedance matching stage of the output, a correction feedback impedance Zcorr, wherein Zcorr=2·Zg, connects the collector of the second transistor and the base of the first transistor.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: July 2, 2013
    Assignee: Thales
    Inventors: Remi Corbiere, Bruno Louis, Vincent Petit
  • Patent number: 8476980
    Abstract: A power amplifier includes an amplifying circuit, and first through third transmission lines. The amplifying circuit amplifies an input signal having a fundamental frequency to generate a first amplified signal and a second amplified signal whose phase is opposed to the first amplified signal. The first transmission line adds a first group of phases, different in correspondence with a frequency, to the first amplified signal by using a left-handed material to generate a first transmission signal. The second transmission line adds a second group of phases, different in correspondence with a frequency, to the second amplified signal by using a right-handed material to generate a second transmission signal. The third transmission line overlaps the first and the second transmission signals to generate an output signal. The first and the second group of phases include a phase difference configured to weaken a second harmonic and a third harmonic.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: July 2, 2013
    Assignee: NEC Corporation
    Inventor: Akio Wakejima
  • Publication number: 20130135029
    Abstract: This invention relates to an open wireless architecture (OWA) radio frequency (RF) transceiver architecture including RF front-end system. Specifically, the invention relates to an OWA RF front-end utilizing non-broadband RF hardware to support wide range frequency bands and broad transmission bandwidth for future wireless communications.
    Type: Application
    Filed: November 28, 2011
    Publication date: May 30, 2013
    Inventors: LIMEI XU, WEI LU
  • Patent number: 8421541
    Abstract: Techniques for designing a highly differential single-ended-to-differential converter for use in, e.g., communications receivers. In an exemplary embodiment, an auxiliary current path including cascomp transistors is coupled to a main current path including input transistors and cascode transistors. The transistors are biased such that inter-modulation products generated by the auxiliary current path cancel out inter-modulation products generated by the main current path. In another exemplary embodiment, current source transistors for the main current path are adaptively biased depending on the level of the input signal received. In an exemplary embodiment, the techniques may be applied to designing a converter for interfacing a single-ended low-noise amplifier (LNA) output voltage with a differential mixer input in a communications receiver.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: April 16, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Susanta Sengupta, Kenneth C. Barnett
  • Patent number: 8410856
    Abstract: The noise figure of a low noise amplifier (LNA) is reduced without sacrificing performance such as gain, IIP3, and wideband impedance matching. Embodiments include configuring a control module of the LNA to sum and scale an output from a current-sensing branch of the LNA and an output from a voltage sensing branch of the LNA into one or more summed and scaled outputs. The control module also feeds the one or more summed and scaled outputs back to at least one of the outputs of the branches of the LNA.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: April 2, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Ching Kuo, Yi-Shing Shih, Shih-Hao Tarng
  • Patent number: 8391927
    Abstract: An antenna structure includes first and second antennas. The first antenna has a first geometry corresponding to a first frequency. The second antenna has a second geometry corresponding to a second frequency. The second antenna is proximal to the first antenna and utilizes electrical-magnetic properties of the first antenna to transceive signals at the second frequency.
    Type: Grant
    Filed: June 12, 2010
    Date of Patent: March 5, 2013
    Assignee: Broadcom Corporation
    Inventors: Jesus Alfonso Castaneda, Franco De Flaviis, Ahmadreza (Reza) Rofougaran
  • Patent number: 8368464
    Abstract: The balanced output signal generator uses four interconnected plus-type second-generation current conveyors, a couple of load resistors and a single input resistor that can provide both current- and voltage-mode outputs. No matching conditions are required.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: February 5, 2013
    Assignee: King Fahd University of Petroleum and Minerals
    Inventor: Muhammad Taher Abuelma'atti
  • Patent number: 8362835
    Abstract: A wide bandwidth planar four port MMIC transformer is provided by input diplexers which divide up the incoming signal into a high band and a low band, with the resulting signals coupled to high band and low band four port transformers implemented in one embodiment using spiral inductors and coupled lines, the outputs of which are combined using two output diplexers to provide a decade bandwidth transformer.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: January 29, 2013
    Assignee: Gradual Tech Software L.L.C.
    Inventor: David E. Meharry
  • Patent number: 8362841
    Abstract: A differential amplifier showing a suppressed output offset is disclosed. The differential amplifier includes a pair of differential transistors, a pair of cascode transistors, and a reference generator. One of differential transistors receives an AC signal, while, the other of differential transistors receives an average voltage of the AC signal. The reference generator receives the average voltage of the AC signal and outputs a bias commonly provided to the cascode transistor. The bias is raised by a substantially constant level from the average voltage, which compensates the output offset of the differential amplifier.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: January 29, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Makoto Ito, Sosaku Sawada
  • Patent number: 8358991
    Abstract: Embodiments of an RF receiver front-end are presented herein. In an embodiment, the RF receiver front-end comprises a transconductance LNA, a passive mixer, and a gm-enhanced common-gate buffer. The transconductance LNA is configured to convert an RF voltage signal to an RF current signal and provide the RF current signal at an output. The passive mixer is coupled to the output of the transconductance LNA and is configured to mix the RF current signal with a local oscillator signal to produce a frequency translated current signal. The gm-enhanced common-gate buffer is configured to receive the frequency translated current signal at an input and convert the frequency translated current signal to a frequency translated voltage signal. In an embodiment, the input of the gm-enhanced common-gate buffer is configured to provide a low input impedance to limit a voltage swing of the frequency translated current signal.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: January 22, 2013
    Assignee: Broadcom Corporation
    Inventors: Xinyu Chen, Calvin (Shr-Lung) Chen, John Leete
  • Patent number: 8339203
    Abstract: An on-chip power amplifier includes first and second variable capacitors connected in parallel with first and second windings, respectively, of an on-chip balun. The first balun winding connects between the differential outputs of an on-chip differential amplifier. Varying the first variable capacitor changes the imaginary part of the load impedance of the differential amplifier, while varying the second variable capacitor changes the real part of the load impedance of the differential amplifier. In one embodiment, the first and second variable capacitors are generally orthogonal, such that the first and second variable capacitors are less than 25% correlated. As a result, varying the first variable capacitor has little impact on the real part of the load impedance, and varying the second variable capacitor has little impact on the imaginary part of the load impedance. In this way the load impedance can be tuned to the optimum performance.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: December 25, 2012
    Assignee: ST-Ericsson SA
    Inventors: Hendrik Visser, Roeland Heijna, Norbert Van Den Bos
  • Patent number: 8324968
    Abstract: An amplifier circuit is provided to be switchable between a single end output configuration and a differential output configuration without increasing a circuit area. When first and fourth switches are turned off and a second switch is turned on, a load circuit functions as an active load on a differential pair and a first output terminal is internally disconnected. The amplifier circuit is provided with a single end output configuration and differentially amplifies input voltages inputted to input terminals and outputs an imbalanced signal from a second output terminal. When the first and fourth switches are turned on and the second switch is turned off, the load circuit functions as a load on the differential pair and the first output terminal is internally connected. The amplifier circuit is provided with a differential output configuration and differentially amplifies the input voltages inputted to the input terminals and outputs balanced signals from the output terminals.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: December 4, 2012
    Assignee: DENSO CORPORATION
    Inventors: Kazutaka Honda, Tetsuya Makihara, Masakiyo Horie
  • Patent number: 8310311
    Abstract: According to an embodiment, a semiconductor integrated circuit device includes an amplifier and a feedback circuit. The amplifier includes an input terminal receiving an input signal and an output terminal outputting an output signal. The feedback circuit includes a first transistor generating a bias current. The feedback circuit is configured to operate based on the bias current. The feedback circuit is configured to receive the output signal to supply a feedback signal to the input terminal. A signal having a reverse phase to the output signal is input to a gate of the first transistor.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: November 13, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Junji Wadatsumi
  • Patent number: 8306494
    Abstract: Methods and systems for a single-ended input low noise amplifier (LNA) with differential output are disclosed and may include configuring the LNA and/or a balun on a chip for single-ended or differential mode, which may function as a load for the LNA. A frequency response and gain of the LNA may be configured via switched capacitors and resistors, which may include CMOS transistors. A transition frequency, and thus impedance matching and matching network gain, may be tuned via configurable gate-source capacitors. A received signal may be filtered via a surface acoustical wave (SAW) filter. The LNA may be impedance matched with an input device via the transition frequency tuning and off chip inductors and/or capacitors. The LNA may be configured for single-ended or differential input mode via switches outside of a signal path to the LNA and reverse isolation may be enabled via a cascode device.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: November 6, 2012
    Assignee: Broadcom Corporation
    Inventor: Adedayo Ojo
  • Patent number: 8289085
    Abstract: An amplifier circuit includes a pair of amplifying devices, a first balun coupled between an input port of the amplifier circuit and RF input ports of the pair of amplifying devices and a second balun coupled between RF output ports of the pair of amplifying devices and an output port of the amplifier circuit wherein the first and second baluns are configured such that the amplifier circuit operates under open condition for signals at a second harmonic frequency even when the second harmonic frequency is within an operating frequency band of a fundamental frequency of the amplifier circuit. In one embodiment, the amplifier circuit includes a bypass circuit which selectively couples balun ports to ground such that in response to a first control signal, the amplifier circuit operates in an amplifying mode and in response to a second control signal, the amplifier circuit operates in a bypass mode.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: October 16, 2012
    Assignee: Auriga Measurement Systems, LLC
    Inventors: Yusuke Tajima, John Muir
  • Patent number: 8269561
    Abstract: Embodiments of the invention may provide CMOS power amplifiers with power mode control to provide the desired power-added efficiency (PAE), idle current, output power, and Adjacent Channel Leakage Ratio (ACLR). For instance, there may be a multi-mode WCDMA CMOS RF power amplifier having high/medium/low output power modes aimed to achieve high PAE and low idle current in a portable wireless environment. According to an example embodiment, a CMOS RF power amplifier may provide a plurality of separate signal paths for purposes of supporting multi-power modes. For example, there may be a first signal path which supports a high-power mode, and a second path which is subsequently divided into two recursive signal paths or sub-paths to support respective medium and low-power modes. One of the three power modes may be selected or controlled using bias control switches in the first and second paths.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: September 18, 2012
    Assignee: Samsung Electro-Mechanics
    Inventors: Yunseo Park, Chang-Ho Lee
  • Patent number: 8264281
    Abstract: A low-noise amplifier (LNA) includes a pair of transistors connected in a cascode configuration to provide amplification to an input signal. The LNA generates an amplified output in differential form across a pair of output terminals. One of the pair of output terminals is the output node of the cascode configuration. The LNA further includes a feedback transistor with its gate terminal connected to the output node of the cascode configuration and its drain terminal connected to the other one of the pair of output terminals. The differential nature of the amplified output reduces the noise figure of the LNA. A frequency-selective network connected across the pair of output terminals sets the frequency selectivity of each of the input section and the output section of the LNA.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: September 11, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Gireesh Rajendran, Visvesvaraya Appala Pentakota, Vijaya Bhaskar Rentala
  • Patent number: 8248164
    Abstract: Apparatus and methods for an integrated circuit, single ended-to-differential amplifier are provided. In an example, the amplifier can include an amplifier circuit having a first input configured to receive a single-ended signal, a second input, and a differential output configured to provide an amplified representation of the single-ended signal. The amplifier can include a filter circuit configured to balance a common-mode voltage between the first and second inputs of the amplifier circuit. The filter circuit can include a common-mode input configured to receive the common-mode voltage, a first impedance network coupled between the common-mode input and the first input of the amplifier circuit, and a second impedance network coupled between the common-mode input and the second input of the amplifier circuit. The filter circuit can provide a low frequency pole below 1 hertz.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: August 21, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Andrew M. Jordan, Hrvoje Jasa
  • Patent number: 8229367
    Abstract: A low noise amplifier (LNA) with combined input matching, balun, and/or transmit/receive (T/R) switch is described. In one exemplary design, an apparatus includes a coupled inductor and an LNA. The coupled inductor receives a single-ended input signal, performs single-ended to differential conversion, and provides a differential input signal. The LNA receives and amplifies the differential input signal and provides a differential output signal. The coupled inductor includes magnetically coupled first and second coils. The first coil provides input impedance matching when the LNA is enabled. A resonator circuit formed with the first coil provides high input impedance when the LNA is disabled. A tuning capacitor coupled to the second coil provides amplitude imbalance tuning for the differential input signal. A transmit switch is coupled between the first coil and a transmitter.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: July 24, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Ngar Loong Alan Chan, Byung Wook Min
  • Patent number: 8207791
    Abstract: An amplifier circuit including an amplifier to amplify a signal and to output the amplified signal in a first output, a coupling line connected to the first output line in a first connection point and having a length so that a standing electrical wave is generated in it, and a second output line coupled to the coupling line in a second connection point so that a power level of a resulting signal in the second output line is depending on the power level of the amplified signal in the first output line. The amplifier circuit a high integration of an amplifier circuit and an integrated circuit with small size.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: June 26, 2012
    Assignee: Sony Corporation
    Inventor: Stefan Koch
  • Publication number: 20120154056
    Abstract: The noise figure of a low noise amplifier (LNA) is reduced without sacrificing performance such as gain, IIP3, and wideband impedance matching. Embodiments include configuring a control module of the LNA to sum and scale an output from a current-sensing branch of the LNA and an output from a voltage sensing branch of the LNA into one or more summed and scaled outputs. The control module also feeds the one or more summed and scaled outputs back to at least one of the outputs of the branches of the LNA.
    Type: Application
    Filed: December 17, 2010
    Publication date: June 21, 2012
    Applicant: Industrial Technology Research Institute
    Inventors: Ming-Ching Kuo, Yi-Shing Shih, Shih-Hao Tarng
  • Patent number: 8183932
    Abstract: Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. In this regard, one or more circuits comprising an integrated amplifier may be configurable such that, in a first configuration, the one or more circuits are operable to handle a differential input signal, and, in a second mode of operation, the one or more circuits are operable to handle a single-ended input signal. The one or more circuits may output a differential signal when handling a differential input signal and when handling a single-ended input signal. In some instances, whether the one or more circuits are operable to handle a differential input signal or a single-ended input signal may determined by an inductance of a bond wire coupling the integrated amplifier to an integrated circuit package.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: May 22, 2012
    Assignee: Broadcom Corporation
    Inventor: Alireza Zolfaghari
  • Patent number: 8154347
    Abstract: An audio processing circuit is provided, receiving a microphone signal from a microphone to output a differential signal. A preamplifier receives the microphone signal to output a first preamplified voltage and a second preamplified voltage. A gain stage receives the first preamplified voltage and the second preamplified voltage to output the differential signal comprising a first differential output and a second differential output. In the preamplifier, a first operational amplifier is provided. A first voltage controlled current source is controlled by the output end of the first operational amplifier to provide a first current. A first transistor has a gate coupled to a ground voltage supply, a source coupled to the first voltage controlled current source for receiving the first current, and a drain coupled to a voltage ground. Likewise, a second voltage controlled current source and a second transistor are presented symmetrically to render the differential output.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: April 10, 2012
    Assignee: Fortemedia, Inc.
    Inventors: Jui-Te Chiu, Li-Te Wu
  • Patent number: 8138830
    Abstract: Techniques for providing an instrumentation amplifier having a plurality of selectable gain settings. In an exemplary embodiment, a gain adjustment block for accepting a differential input voltage is coupled to a differential-to-single-ended conversion block for generating a single-ended output voltage. The gain adjustment block may have a plurality of gain settings selectable by one or more switches. The instrumentation amplifier advantageously offers precise gain control without the need for external calibration, while being robust and simple to design.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: March 20, 2012
    Assignee: QUALCOMM, Incorporated
    Inventor: Paul L Bugyik
  • Patent number: 8130039
    Abstract: An RF power amplifier includes a first amplifier module comprising a first push-pull amplifier including a first plurality of field effect transistors and a first output transformer. An output impedance of the first amplifier module is 25 ohms. A second amplifier module includes a second push-pull amplifier including a second plurality of field effect transistors and a second output transformer. An output impedance of the second amplifier module is 25 ohms. A combiner is connected to the first amplifier module and the second amplifier module. The combiner combines an output from the first amplifier module and an output from the second amplifier module into a combined signal. An output impedance of the combiner is 50 ohms.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: March 6, 2012
    Inventor: Steven M. Dishop
  • Patent number: 8115555
    Abstract: Systems and methods are provided for a transformer or balun function with reference enhancement. The systems and methods may include a transformer having at least a primary winding and a secondary winding for reference enhancement, where the primary winding includes a center tap, where the secondary winding includes a first port and a second port, and an electrical connection that electrically connects the second port and the center tap of the primary winding to provide a common reference for the primary winding and the secondary winding. The primary winding of the transformer may be configured to receive differential outputs of a power amplifier, and the transformer may be configured to convert the differential outputs from a balanced signal to an unbalanced signal available at the first port of the secondary winding.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: February 14, 2012
    Assignee: Samsung Electro-Mechanics
    Inventors: Kyu Hwan An, Yunseo Park, Chang-Ho Lee
  • Patent number: 8098097
    Abstract: Systems, methods, and devices for receiving a differential input signal and generating a non-differential output signal are described herein. For example, an RF buffer is described that includes first and second transistor elements. The first transistor element receives a first polarity signal of a differential signal and drives a non-differential output of the RF buffer. A second transistor element receives a second polarity signal of the differential signal and drives the non-differential output of the RF buffer. The first and second transistor elements substantially simultaneously drive the non-differential output of the RF buffer.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: January 17, 2012
    Assignee: Honeywell International Inc.
    Inventors: Said Abdelli, Jeffrey Kriz
  • Patent number: 8044721
    Abstract: A low noise amplifier including an amplifier kernel circuit and a DC bias unit is provided. The amplifier kernel circuit is used for receiving a single input signal or a differential input signal so as to output a differential output signal. The DC bias unit is coupled to the amplifier kernel circuit, and is used for processing a signal source to generate the single input signal or the differential input signal according to its circuit configuration.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: October 25, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Ching Kuo, Chien-Nan Kuo, Shiau-Wen Kao
  • Patent number: 8031004
    Abstract: An active balun with a stacked structure includes: a first amplification unit including a first transistor having a first terminal connected with a first input terminal, a second terminal connected with a power voltage terminal, and a third terminal connected with an output terminal; a second amplification unit including a second transistor having a first terminal connected with a second input terminal, a second terminal connected with the output terminal, and a third terminal connected with a ground; and a capacitance matching unit connected between the first terminal and the third terminal of the first transistor and having a pre-set matching capacitance.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: October 4, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Moon Suk Jeong, Yoo Sam Na
  • Publication number: 20110234321
    Abstract: A multi-function MMIC operated by a switch using an amplifier is disclosed. A switch may be configured by connecting an input or an output of a plurality of amplifiers, and an insertion loss may be reduced by selecting a transmission mode or a reception mode of an MMIC using the switch. A noise characteristic, a power characteristic, and a gain characteristic may also be improved.
    Type: Application
    Filed: October 5, 2010
    Publication date: September 29, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jin Cheol JEONG, In Bok YOM
  • Patent number: 7994865
    Abstract: An amplifier and a method for converting a single ended signal to an amplified differential signal. The amplifier comprises an input configured to receive a single ended signal, a differential amplifier that outputs an amplified differential signal based on the single ended signal, and a compensator coupled to the differential amplifier and configured to inject an adjusted distortion compensating signal based on the even order distortion signal to compensate for a distortion in the amplified differential signal. The method comprises receiving a single ended signal, converting the single ended signal to an amplified differential signal, and generating a distortion compensating signal to substantially cancel an even order distortion signal injected to the differential signal by the converting.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: August 9, 2011
    Assignee: Marvell International Ltd.
    Inventors: Danilo Manstretta, Fernando De Bernardinis
  • Patent number: 7990222
    Abstract: A circuit for converting first and second differential input signals into an output signal is provided with a first differential input stage comprising first and second inputs for receiving the first differential input signal and comprising first and second outputs and with a second differential input stage comprising third and fourth inputs for receiving the second differential input signal and comprising third and fourth outputs and with an output stage comprising a first terminal connected to the first output that is further connected to the third output and comprising a second terminal connected to the second output that is further connected to the fourth output and comprising a third terminal for providing the output signal, to avoid complex operational amplifiers. The differential input stages comprise two pairs of transistors and the output stage comprises a current mirror with a third pair of transistors.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: August 2, 2011
    Assignee: ST-Ericsson SA
    Inventor: Zhenhua Wang
  • Patent number: 7973603
    Abstract: A low-noise amplifier includes a first resistor that receives a first signal of a differential input signal, and a second resistor that receives a second signal of the differential input signal. The amplifier includes a first transconductance device coupled to the first resistor that provides a first signal of a differential output signal, and a second transconductance device coupled to the second resistor, that provides a second signal of the differential output signal. The receiver also includes a first capacitor coupled between the first resistor input and a control electrode on the second transconductance device, and a second capacitor coupled between the second resistor input and a control electrode on the first transconductance device. The low-noise amplifier can include additional gain stages.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: July 5, 2011
    Assignee: Silicon Laboratories Inc.
    Inventors: Abhishek V. Kammula, Aslamali A. Rafi, George Tyson Tuttle
  • Patent number: 7948322
    Abstract: A balun amplifier is provided, which includes two input terminals, two output terminals and two modules. The first and the second input terminals receive a single-ended input signal, respectively. The first and the second output terminals provide a differential output signal. The first module is coupled to the first input terminal, the first output terminal, and the second output terminal. The second module is coupled to the second input terminal, the first output terminal, and the second output terminal. The first and the second modules receive the single-ended input signal through the first and the second input terminals respectively, amplify the single-ended input signal respectively, and convert the single-ended input signal into the differential output signal. The circuit topologies of the first and the second modules are symmetric except that types of transistors in the first and the second modules are different.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: May 24, 2011
    Assignee: Industrial Technology Research Institute
    Inventor: Ching-Feng Lee
  • Patent number: 7944310
    Abstract: An active balun circuit is provided, which includes an input end, a first and a second output ends, a first and a second transistors, a feedback capacitor, and a current source. The input end receives an input signal. A drain of the first transistor is coupled to the second output end, and a gate of the first transistor is coupled to the input end. A gate of the second transistor is coupled to a ground end, and a drain of the second transistor is coupled to the first output end. The feedback capacitor is coupled between the second output end and the gate of the second transistor. One end of the current source is coupled to sources of the first and second transistors, and the other end of the current source is coupled to the ground end.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: May 17, 2011
    Assignee: Novatek Microelectronics Corp.
    Inventor: Ying-Chung Chiu
  • Publication number: 20110063032
    Abstract: A balun amplifier is provided, which includes two input terminals, two output terminals and two modules. The first and the second input terminals receive a single-ended input signal, respectively. The first and the second output terminals provide a differential output signal. The first module is coupled to the first input terminal, the first output terminal, and the second output terminal. The second module is coupled to the second input terminal, the first output terminal, and the second output terminal. The first and the second modules receive the single-ended input signal through the first and the second input terminals respectively, amplify the single-ended input signal respectively, and convert the single-ended input signal into the differential output signal. The circuit topologies of the first and the second modules are symmetric except that types of transistors in the first and the second modules are different.
    Type: Application
    Filed: November 24, 2009
    Publication date: March 17, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Ching-Feng Lee
  • Publication number: 20110037522
    Abstract: An active balun with a stacked structure includes: a first amplification unit including a first transistor having a first terminal connected with a first input terminal, a second terminal connected with a power voltage terminal, and a third terminal connected with an output terminal; a second amplification unit including a second transistor having a first terminal connected with a second input terminal, a second terminal connected with the output terminal, and a third terminal connected with a ground; and a capacitance matching unit connected between the first terminal and the third terminal of the first transistor and having a pre-set matching capacitance.
    Type: Application
    Filed: December 23, 2009
    Publication date: February 17, 2011
    Applicant: Samsung Electric-Mechanics Co., Ltd.
    Inventors: Moon Suk JEONG, Yoo Sam NA
  • Patent number: 7884673
    Abstract: A wideband low-noise amplifier includes a source-degenerated common-source amplifier, a common-gate amplifier, and a matching frequency band determiner. The source-degenerated common-source amplifier is configured to amplify an input signal to output a first signal that is opposite in phase to the input signal. The common-gate amplifier is connected in parallel to the source-degenerated common-source amplifier to amplify the input signal to output a second signal that has the same phase as the input signal. The matching frequency band determiner is configured to isolate an input terminal of the source-degenerated common-source amplifier and an input terminal of the common-gate amplifier and determine a matching frequency band.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: February 8, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seon Ho Han, Cheon Soo Kim, Jae Young Kim, Hyun Kyu Yu
  • Patent number: 7868697
    Abstract: A converting circuit for converting differential signals to a single-ended signal. The converting circuit comprises a cascode amplifier comprising a first transistor and a second transistor, wherein the first transistor comprises a control terminal, a first terminal, and a second terminal, the control terminal to which one of the differential signals is input, the control terminal being electrically-grounded; and, the second transistor comprises a first terminal and a second terminal, the first terminal of the second transistor being connected to the first terminal, the second terminal of the second transistor from which output signal is outputted, a capacitor for adjusting the phase, the capacitor being connected to the second terminal; and a current source being connected to the second terminal.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: January 11, 2011
    Assignee: Fujitsu Limited
    Inventor: Tomoyuki Arai
  • Patent number: 7863986
    Abstract: Techniques for improving the quality factor (“Q”) of a balun in the presence of loading stages are disclosed. In an exemplary embodiment, the ground node of a balun secondary (single-ended) element is connected to a source node of an amplifier stage via a common ground node. The connection may be made physically short to minimize any parasitic elements. In another exemplary embodiment, the common ground node may be coupled to an off-chip ground voltage via a peaking inductor. The peaking inductor may be implemented on-chip, e.g., as a spiral inductor, or off-chip e.g., using bondwires.
    Type: Grant
    Filed: August 11, 2008
    Date of Patent: January 4, 2011
    Assignee: QUALCOMM Incorporation
    Inventors: Chiewcharn Narathong, Sankaran Aniruddhan
  • Patent number: 7859337
    Abstract: A Class-D amplifier having a wideband driver circuit including a first transmission line transformer and a second transmission line transformer. An input of the first transmission line transformer is approximately 180 degrees out of phase from an input of the second transformer. A first transistor (Q1) has an input operatively connected to the first transmission line transformer. A second transistor (Q2) has an input being operatively connected to the second transmission line transformer. The first and the second transmission line transformers cooperate to provide a signal of sufficient magnitude to saturate their associated power transistors in the ON mode and to cut them off in the OFF mode with very small rise and fall transit times, thus providing high efficiency.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: December 28, 2010
    Assignee: Rockwell Collins, Inc,
    Inventors: Thanh D. Chu, Scott L. Heibel, Gamal M. Hegazi
  • Patent number: 7843272
    Abstract: A low noise amplifier having a wide operating frequency band and a high dynamic range is provided. A transformer having a secondary winding connected between an input terminal to which an input signal is applied and a positive differential output terminal, and a primary winding connected between a negative differential output terminal and an input node is provided as a feedback circuit between a cascode amplifier circuit, which includes transistors and a resistor, and an output circuit, which includes a transistor and a constant current source. Selective use of a transformer whose leakage inductance has an adequate value as the feedback transformer can realize a low noise amplifier which has a wide operating frequency band and a high dynamic range.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: November 30, 2010
    Assignee: Icom Incorporated
    Inventor: Kouichiro Yamaguchi
  • Patent number: 7839219
    Abstract: A low-noise amplifier circuit includes a MOS transistor in a common gate amplifier configuration. A single-ended input is at a source of the MOS transistor. A resonant cavity filter circuit is coupled to a gate of the MOS transistor.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: November 23, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Ching Kuo, Shiau-Wen Kao, Chih-Hung Chen
  • Patent number: 7834703
    Abstract: An amplifier provided according to an aspect of the present invention includes a set of passive impedances forming a tuned load to a gain stage and also to provide a 180 degrees phase shifted signal of a gain signal received from the gain stage. The output of the gain stage and the 180 degrees phase shifted signal together form a differential amplified signal corresponding to an input signal gained by the gain stage. In an embodiment, the set of passive impedances includes a three terminal centre tapped inductor in combination with a capacitor, together operating as a filter to pass only a desired frequency band. The windings of the inductor may be designed to provide mutual coupling between two portions such that there is a negative correlation between the strength of the received gained signal and the 180 degree phase shifted signal.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: November 16, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Saravana Kumar Ganeshan
  • Patent number: 7812675
    Abstract: The invention relates to a receiver (1) comprising an amplifier (31-34) for amplifying an antenna signal, which amplifier (31-34) comprises an amplifier input (11a) and an amplifier output (12a,12b), the amplifier input (11a) being a single ended input for receiving the antenna signal, the amplifier output (12a, 12b) being a differential output, and the amplifier (31-34) comprising circuit (41,42) for reducing a common mode input impedance of the amplifier (31-34).
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: October 12, 2010
    Assignee: ST-Ericsson SA
    Inventors: Edwin Van Der Heijden, Hugo Veenstra
  • Patent number: 7808316
    Abstract: A differential amplifier is formed from a first single-ended amplifier circuit, a second single-ended amplifier circuit, and a four-port transformer circuit coupled to the first and second single-ended amplifier circuits to form the differential amplifier.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: October 5, 2010
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventor: David E. Meharry