Sum And Difference Amplifiers Patents (Class 330/69)
  • Publication number: 20120229214
    Abstract: A differential amplifier circuit comprises a differential pre-amplifying stage which is designed to allow an input signal with a first common mode voltage range, and to generate an output which has a narrower common mode voltage variation. This pre-amplifier stage is designed to accept a large common mode input voltage and to process the signal so that it can be amplified by a main amplifying stage which is designed to allow an input signal with a smaller common mode voltage range.
    Type: Application
    Filed: February 23, 2012
    Publication date: September 13, 2012
    Applicant: NXP B.V.
    Inventor: Sunil Kasanyal
  • Publication number: 20120229205
    Abstract: An amplifier circuit capable of reducing load of a circuit at the previous stage by providing increased input impedance producing less noises. The amplifier circuit includes a fully-differential operational amplifier composed of an inverting input terminal, a non-inverting input terminal receiving a signal different from a signal to be input to the inverting input terminal, an inverting output terminal with the same polarity of the inverting input terminal, and a non-inverting output terminal with reverse polarity; an input impedance element with one end connected to the inverting input terminal; an input impedance element with one end connected to the non-inverting input terminal; and positive feedback impedance elements, with one end of connected to the other end of the input impedance element and the other end connected to the inverting output terminal or to the non-inverting output terminal.
    Type: Application
    Filed: August 29, 2011
    Publication date: September 13, 2012
    Inventor: Kazuo Koyama
  • Publication number: 20120223772
    Abstract: A multilevel class-D differential amplifier which can be operated in at least three modes includes a first power stage and a second power stage. In an idle mode, an output of the first power stage varies between a first voltage level and a second voltage level, wherein an output of the second power stage varies between the first voltage level and the second voltage level. In a PWM mode, the output of the first power stage varies between the first voltage level and the second voltage level, wherein the output of the second power stage varies between the first voltage level and the second voltage level. In a Multi-Level mode, the output of said first power stage varies between said second voltage level and a third voltage level, wherein said output of said second power stage is fixed at said first voltage level, and wherein said differential signal between said outputs of said power stages is pulse width modulated.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 6, 2012
    Inventor: Cristian Cerutti
  • Patent number: 8258864
    Abstract: A pre-amplifier circuit can be cascaded and drive a latch for use in a precision analog-to-digital converter (ADC). The pre-amplifier has a main section and a feedback section connected by feedback resistors that do not produce voltage drops in the main section. Offset is stored on offset capacitors during an autozeroing phase and isolated by transmission gates during an amplifying phase. The offset capacitors drive the gates of feedback transistors that drive output nodes in the main section. Autozeroing sink transistors in the feedback section operate in the linear region while current sink transistors in the main section operate in the saturated region. Kickback-charge isolation transistors may be added for charge isolation. The output may also be equalized by an equalizing transmission gate. A very low power-supply voltage is supported even for high-speed operation with offset cancellation, due to the folded feedback resistor arrangement.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: September 4, 2012
    Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
    Inventors: Kwai Chi Chan, Yat To (William) Wong, Ho Ming (Karen) Wan, Kam Chuen Wan, Kwok Kuen (David) Kwong
  • Patent number: 8258865
    Abstract: A signal generating apparatus comprises an amplifier, which comprises differential input terminals for receiving a first input signal, a common mode output signal adjusting terminal for receiving a second input signal, and an output terminal. The signal generating apparatus may provide two or more differential output signals according to the first input signal, and provide two or more common mode output signals according to the second input signal. The amplifier provides an output signal comprising one of the differential output signals and one of the common mode output signals at the output terminal.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: September 4, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chen-Chih Huang, Yu-Chang Chen, Wei-Chou Wang, Sheng-Huang Tsao
  • Publication number: 20120212291
    Abstract: A radio frequency amplification stage comprising: an amplifier for receiving an input signal to be amplified and a power supply voltage; and a power supply voltage stage for supplying said power supply voltage, comprising: means for providing a reference signal representing the envelope of the input signal; means for selecting one of a plurality of supply voltage levels in dependence on the reference signal; and means for generating an adjusted selected power supply voltage, comprising an ac amplifier for amplifying a difference between the reference signal and one of the selected supply voltage level or the adjusted selected supply voltage level, and a summer for summing the amplified difference with the selected supply voltage to thereby generate the adjusted supply voltage.
    Type: Application
    Filed: April 30, 2012
    Publication date: August 23, 2012
    Applicant: NUJIRA LIMITED
    Inventor: Martin Paul Wilson
  • Patent number: 8248158
    Abstract: A chopper stabilized amplifier may include a modulation circuit that performs a digital conversion on an input signal so as to convert the input signal into a first modulated signal by using a modulation signal, the modulation signal being a rectangular wave having a predetermined frequency, an operational amplifier circuit that amplifies the first modulated signal so as to convert the first modulated signal into a second modulated signal, and a demodulation circuit that performs analog conversion on the second modulated signal so as to convert the second modulated signal into an output signal by using a demodulation signal, the demodulation signal having a waveform that corresponds to the differences between frequency components of the first modulated signal and the second modulated signal.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: August 21, 2012
    Assignee: Olympus Corporation
    Inventor: Masato Osawa
  • Publication number: 20120206198
    Abstract: A differential amplifier replicates the input stage and cross-connects the inputs, so that the input-to-output delay will be balanced in an averaged sense. The outputs of each of the two input stages are then summed after an open loop delay matched inversion has taken place. The result is a reduction in the duty cycle distortion of the receiver amplifier over process voltage and temperature (PVT) variation. This is enabled by the fact that a full swing CMOS delay cell can be made to have good delay matching over PVT, whereas the input stage to a differential amplifier may, depending on architecture, have poor delay matching because of impedance mismatches within the amplifier.
    Type: Application
    Filed: February 9, 2012
    Publication date: August 16, 2012
    Applicant: Cavium, Inc.
    Inventor: Scott Meninger
  • Publication number: 20120206197
    Abstract: A differential amplifier amplifies the difference between a signal input to the non-inverting terminal via a capacitor and a signal input to the inverting terminal. A switch switches whether to input the signal to the non-inverting terminal via the capacitor. A resistance is connected between the non-inverting terminal and the inverting terminal. An offset voltage corrector corrects the offset voltage of the differential amplifier based on the output signal of the differential amplifier during a correction period in which the switch is controlled not to input the signal to the non-inverting terminal via the capacitor.
    Type: Application
    Filed: January 23, 2012
    Publication date: August 16, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Yoshikazu Yamazaki
  • Patent number: 8237497
    Abstract: An amplifier processes a differential input received at a differential input port. The amplifier includes a first amplifier circuit and a second amplifier circuit. The first amplifier circuit is disposed in a first signal path between a first input node and a first output node of the amplifier, and arranged to amplify a first input signal received at the first input node and accordingly generate a first amplified signal to the first output node. The second amplifier circuit is disposed in a second signal path between a second input node and a second output node of the amplifier, and arranged to amplify a second input signal received at the second input node and accordingly generate a second amplified signal to the second output node. A driving capability of the first amplifier circuit is different from a driving capability of the second amplifier circuit.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: August 7, 2012
    Assignee: Mediatek Inc.
    Inventor: Sung-Han Wen
  • Publication number: 20120194268
    Abstract: A differential voltage sensing method for achieving input impedance matching comprises the steps of: providing a first bio-potential signal to a first variable resistor for generating a first signal; providing a second bio-potential signal to a second variable resistor for generating a second signal; differentially amplifying first and second signals for generating a third signal; selecting an operation band of the third signal for generating first and second logic signals; and dynamically adjusting one of the impedances of the first and second variable resistors according to the first and second logic signals, wherein each of the first and second bio-potential signals has a common signal voltage level and a differential signal voltage level.
    Type: Application
    Filed: April 16, 2012
    Publication date: August 2, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen Ying CHANG, CHENG HUNG CHANG, YING JU CHEN
  • Publication number: 20120188009
    Abstract: Apparatus and methods reduce the likelihood of amplifier saturation due to propagated DC offsets, and reduce the recover from saturated stated when such saturation occurs. Advantageously, these attributes are beneficial for monitoring of bioelectric signals. A circuit uses an instrumentation amplifier connected as a high pass filter to attenuate large DC offsets and amplify small signals. The circuit can include an instrumentation amplifier electrically coupled with a first feedback circuit including at least one resistor and a second feedback circuit including an op-amp. The feedback circuit can also include a low-pass filter. The op-amp in the second feedback circuit can be configured as a non-inverting amplifier, an inverting amplifier, and/or an integrator circuit. Alternatively, the circuit can include an instrumentation amplifier with one feedback circuit including at least one resistor, and a coupling capacitor electrically coupled with a reference voltage.
    Type: Application
    Filed: January 25, 2011
    Publication date: July 26, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Alasdair Gordon Alexander, David James Plourde, Matthew Nathan Duff
  • Publication number: 20120182068
    Abstract: This document discusses, among other things, an amplifier circuit including first and second amplifiers configured to receive an input signal and to provide a differential output signal using a feedback loop including a transconductance amplifier. A non-inverting input of a first amplifier can be configured to receive an input signal. The feedback loop can be configured to receive the outputs from the first and second amplifiers and to provide a feedback signal to the non-inverting input of the second amplifier, for example, to reduce a DC offset error or to increase a dynamic range of the amplifier circuit.
    Type: Application
    Filed: January 13, 2012
    Publication date: July 19, 2012
    Inventors: Andrew M. Jordan, Hrvoje Jasa
  • Publication number: 20120169417
    Abstract: A current generating circuit for providing one or more than one load current is provided. The current generating circuit includes: one or more than one operational amplifier, coupled to a reference voltage source, wherein each positive input end of the one or more than one operational amplifier receives the reference voltage source; one or more than one semiconductor switch, used for controlling the output of the one or more than one load current, wherein each semiconductor switch is respectively coupled to a corresponding operational amplifier and a load, and the semiconductor switch operates according to signals outputted from the output end of the corresponding operational amplifier to output the corresponding load current; and a control unit, coupled to the one or more than one operational amplifier, for outputting a control signal to control the operation of the one or more than one operational amplifier.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 5, 2012
    Applicant: PRINCETON TECHNOLOGY CORPORATION
    Inventor: Koichi SAKAI
  • Publication number: 20120161994
    Abstract: A gain amplifier may have a differential amplifier with feedback capacitors; a switched input stage having first and second outputs coupled with the differential amplifier, and having: first and second capacitors, a first input receiving a first signal of a differential input signal; a second input receiving a second signal of the differential input signal; a first plurality of switches controlled by a first clock signal to connect the first terminals of the first capacitor with the first or second input, respectively and to connect the first terminals of the second capacitors with the second and first input, respectively; and a second plurality of switches controlled by a phase shifted clock signal to connect the second terminal of the first capacitor with a first or second input of the differential amplifier and connecting the second terminal of the second capacitor with the second or first input of the differential amplifier.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 28, 2012
    Inventors: Vincent Quiquempoix, Philippe Deval, Fabien Vaucher
  • Publication number: 20120161872
    Abstract: A comparator includes: a pre-amplification module, configured to generate two amplified differential signal reference currents according to an input voltage and a reference voltage; and a differential signal obtaining module, configured to obtain a differential signal according to the two amplified differential signal reference currents. The pre-amplification module includes a differential unit, an offset unit, and an amplification unit, where the differential unit is configured to generate two direct current bias currents according to the input voltage and the reference voltage; the offset unit is configured to generate an offset current of the two direct current bias currents according to the input voltage and the reference voltage, so as to reduce magnitude of the two direct current bias currents and obtain two differential signal reference currents; the amplification unit is configured to receive the two differential signal reference currents, and amplify the two differential signal reference currents.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 28, 2012
    Applicant: Huawei Admintration Building
    Inventors: Shifu Pang, Ding Li
  • Patent number: 8203381
    Abstract: A voltage output device which is capable of preventing an increase in circuit scale and includes an offset compensation function that is suitably applicable in particular to a drive circuit for display devices such as liquid crystal display panels. The voltage output device includes an operational amplifier which has an inverting input terminal and a non-inverting input terminal. Resistance values of a load resistor on the inverting input side and a load resistor on the non-inverting input side are maintained when the output voltage of the amplifier has changed while sequentially varying either one or both of the resistance values of the load resistor on the inverting input side and the load resistor on the non-inverting input side in a state that the inverting input terminal and the non-inverting input terminal are connected. The voltage output device is configured to output the output voltage of the amplifier with the inverting input terminal not connected to the non-inverting input terminal.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: June 19, 2012
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Hiroyoshi Ichikura
  • Publication number: 20120149315
    Abstract: Provided is a detector device including: an amplifier (AMP1) for amplifying a voltage of an input electric signal and outputting the amplified electric signal; a first detector circuit (Det1) for outputting a first detection signal having a current corresponding to the voltage of the input electric signal; a second detector circuit (Det2) for outputting a second detection signal having a current corresponding to the voltage of the input electric signal; and a current summing circuit (SUM1) to which the first detection signal and the second detection signal are input, for outputting a third detection signal having a current value obtained by summing current values of the first detection signal and the second detection signal, in which an input signal to be detected is divided into two, one of the divided signals being input to the first detector circuit (Det1) and the other of the divided signals being input via the amplifier (AMP1) to the second detector circuit (Det2).
    Type: Application
    Filed: August 25, 2010
    Publication date: June 14, 2012
    Applicant: KYOCERA CORPORATION
    Inventors: Akira Nagayama, Yasuhiko Fukuoka, Sadao Igarashi
  • Publication number: 20120146720
    Abstract: An adaptive amplification circuit is disclosed, which includes an operational amplifier including a variable bias current source for providing a variable bias current for the operational amplifier, a simulation unit for simulating operational characteristics of the operational amplifier and transforming a simulation input voltage to a simulation output voltage, and a bias control unit for generating a bias control signal to the variable bias current source according to the simulation output voltage so as to adjust the variable bias current.
    Type: Application
    Filed: August 2, 2011
    Publication date: June 14, 2012
    Inventors: Xie-Ren Hsu, Chia-Hung Lin, Wei-Hsiang Hung
  • Publication number: 20120146721
    Abstract: A voltage detection circuit including a comparator circuit, a tunable gain circuit and a switch circuit is disclosed. The comparator circuit has a first input terminal and a second input terminal. The tunable gain circuit is coupled between the first input terminal and a reference signal. The tunable gain circuit has a plurality of gain configurations. The tunable gain circuit adjusts the reference signal and transmits the adjusted reference signal to the first input terminal. The switch circuit selectively transmits a signal under test or the reference signal to the second input terminal. When the voltage detection circuit is in an auto-trimming mode, the switch circuit transmits the reference signal to the second input terminal and the tunable gain circuit sequentially adopts the gain configurations until the comparator circuit detects that voltage levels of the first input terminal and the second input terminal are substantially equal.
    Type: Application
    Filed: November 20, 2011
    Publication date: June 14, 2012
    Applicant: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Wen-Yi LI
  • Publication number: 20120133431
    Abstract: In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.
    Type: Application
    Filed: February 6, 2012
    Publication date: May 31, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Tsuyoshi KAWAKAMI, Akihiko FURUKAWA, Satoshi YAMAKAWA, Tetsuya IIDA, Masao KONDO, Yutaka HOSHINO
  • Publication number: 20120133430
    Abstract: An audio amplification circuit is provided having an amplifier that receives an input signal, an output, and a digital control input for receiving a control value in a number n of bits; a comparator having a first input that receives the amplifier's output signal image, a second input that receives a reference potential, and an output; and a thermometer counter having a selection input coupled to the comparator output, and an output delivering an n-bit digital value to the amplifier control input. The amplifier comprises a differential input stage having a first and a second differential branch, each traversed by a bias current, the current in the first branch being modifiable by n basic current sources which each deliver either a current identical for all current sources, or no current, as a function of one respective bit of the digital control value received at the control input.
    Type: Application
    Filed: May 28, 2010
    Publication date: May 31, 2012
    Applicants: ST-ERICSSON (GRENOBLE) SAS, ST-ERICSSON SA
    Inventors: Remy Cellier, Francois Amiard
  • Publication number: 20120126888
    Abstract: A circuit includes a first input terminal for receiving a first pulsed voltage and a second input terminal for receiving a second pulsed voltage. The circuit further includes a load and an LC filter. The LC filter includes a coupled inductor pair that includes a first winding and a second winding magnetically coupled to each other. The first winding is coupled between the first input terminal and the load, and the second winding is coupled between the second input terminal and the load. A frequency of a first current flowing through the first winding is increased by the second pulsed voltage applied to the second winding.
    Type: Application
    Filed: January 5, 2012
    Publication date: May 24, 2012
    Inventors: Alexandr Ikriannikov, David Hoffman, Noah A. Wilson
  • Patent number: 8183916
    Abstract: A non-inverting amplifier includes an operational amplifier, an input resistor, and a feedback resistor. The operational amplifier amplifies and outputs a difference between an input voltage and a voltage of a control node. The input resistor is connected between a reference voltage port and the control node. The feedback resistor is connected to an output port of the operational amplifier and the control node. The non-inverting amplifier supplies a control current to the control node for controlling an offset voltage of the output port.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: May 22, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang-Woog Byon
  • Patent number: 8179183
    Abstract: A switched-capacitor circuit including at least one first capacitor and a circuit for switching at least one armature of the first capacitor alternately to one and the other of two terminals at a switching frequency. The circuit further includes a second capacitor connected to the first capacitor at a node; and a filtering circuit connecting the node to a virtual ground only for frequencies belonging to a frequency range.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: May 15, 2012
    Assignee: Dolphin Integration
    Inventors: Christian Costa-Domingues, Laetitia De Rotalier
  • Patent number: 8174312
    Abstract: Signal processing circuit for voltage signals from electrodes of a magneto-inductive, flow measuring device, wherein two measuring electrodes are connected with a fully differentially working amplifier having two inputs and two outputs.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: May 8, 2012
    Assignee: Endress + Hauser Flowtec AG
    Inventor: Thomas Bier
  • Patent number: 8159292
    Abstract: To efficiently obtain two outputs including one at a normal level and the other at an excessive level. An input signal input to the negative input terminal of an operational amplifier (14) having a negative feedback path is amplified to output an output signal. Signal combining units (18, 20, 22) are provided for adding in a weighted manner a negative input terminal side signal obtained by combining the input signal input to the negative input terminal of the operational amplifier (14) and a feedback signal from the negative feedback path and the output signal from the operational amplifier to output a combined signal, so that two signals, namely the output signal from the operational amplifier (14) and the combined signal, are obtained.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: April 17, 2012
    Assignee: ON Semiconductor Trading Ltd.
    Inventor: Masahito Kanaya
  • Publication number: 20120086448
    Abstract: The present invention relates to an amplifying unit comprising: a pull up down unit pulling up or pulling down a positive GMR signal and a negative GMR signal provide by a GMR sensor; a GMR amplifying unit including a plurality of amplifying units generating a GMR signal by amplifying a difference between the stand-alone type signal and the negative GMR signal according to the GMR sensor; a low pass filtering unit attenuating noise of the GMR signal; a reference converting unit generating a reference voltage having a predetermined range for generating a GMR signal; and a gain converting unit amplifying the GMR signals inputted to the plurality of amplifying units by several ten or hundred times.
    Type: Application
    Filed: March 19, 2010
    Publication date: April 12, 2012
    Applicant: LG Innotek Co., Ltd.
    Inventors: Young Muk Kim, Jeong Ryul Kim, Man Hue Choi, Chung Wan Lee, Ji Hye Yang, Mun Suk Kang
  • Patent number: 8150058
    Abstract: An audio host device has an electrical interface having a speaker contact, a microphone contact, and a reference contact. The reference contact is shared by a microphone and a speaker. The reference contact is also directly coupled to a power return plane of the audio host device. A difference amplifier is provided, having a cold input and a hot input. The hot input is coupled to the microphone contact. A switched attenuator circuit is also provided that has first and second states. In the first state, the attenuator circuit couples a sense point of the reference contact to the cold input, while in the second state the cold input is isolated from the reference sense point. Other embodiments are also described and claimed.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: April 3, 2012
    Assignee: Apple Inc.
    Inventors: Timothy M. Johnson, Lawrence F. Heyl, Wendell B. Sander, Douglas M. Farrar
  • Patent number: 8138830
    Abstract: Techniques for providing an instrumentation amplifier having a plurality of selectable gain settings. In an exemplary embodiment, a gain adjustment block for accepting a differential input voltage is coupled to a differential-to-single-ended conversion block for generating a single-ended output voltage. The gain adjustment block may have a plurality of gain settings selectable by one or more switches. The instrumentation amplifier advantageously offers precise gain control without the need for external calibration, while being robust and simple to design.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: March 20, 2012
    Assignee: QUALCOMM, Incorporated
    Inventor: Paul L Bugyik
  • Publication number: 20120062317
    Abstract: A nanothermocouple detector includes a nanowire coupled across two electrodes. The two electrodes are electrically connected to an amplifier. The two electrodes generally have a separation of about five micrometers to about thirty micrometers across which the nanowire is coupled. A focusing element is disposed to admit photons that fall on the focusing element onto the nanowire to heat it. A voltage change across the nanowire caused by the heating of the nanowire by the light is detected by the amplifier. The voltage change corresponds to the energy absorbed from the light by the nanowire. The color of a single photon can be detected using such device. An array of such devices can be used for sensing light on a two-dimensional scale, thereby providing an image showing small variances in the energies of the light impinging upon the detector array.
    Type: Application
    Filed: May 19, 2010
    Publication date: March 15, 2012
    Applicant: HOWARD UNIVERSITY
    Inventor: Tito E. Huber
  • Publication number: 20120062316
    Abstract: A signal generating apparatus comprises an amplifier, which comprises differential input terminals for receiving a first input signal, a common mode output signal adjusting terminal for receiving a second input signal, and an output terminal. The signal generating apparatus may provide two or more differential output signals according to the first input signal, and provide two or more common mode output signals according to the second input signal. The amplifier provides an output signal comprising one of the differential output signals and one of the common mode output signals at the output terminal.
    Type: Application
    Filed: September 9, 2011
    Publication date: March 15, 2012
    Inventors: Chen-Chih HUANG, Yu-Chang Chen, Wei-Chou Wang, Sheng-Huang Tsao
  • Patent number: 8130132
    Abstract: A differential chopper comparator compares an input signal voltage and a first voltage, and includes a first capacitor, a second capacitor, and a differential amplification unit including a differential amplification circuit. Either the input signal voltage or the first voltage is applied to one end of the first capacitor via a first switch unit. A fixed voltage is applied to one end of the second capacitor via a second switch unit. Either a non-inverting input terminal or an inverting input terminal of the differential amplification circuit is connected to the other end of the first capacitor, and the other terminal is connected to the other end of the second capacitor. An impedance of the first switch unit side viewed from one end of the first capacitor and an impedance of the second switch unit side viewed from one end of the second capacitor are substantially same.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: March 6, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Fumio Nakano
  • Patent number: 8130032
    Abstract: The invention relates to systems and methods for high-sensitivity detection of input bias current. The invention more particularly relates to platforms and techniques for the calibration and measurement of input bias current in op amps or other devices. In embodiments, the platform can incorporate a servo loop connected to a high-sensitivity test amplifier, such as an instrumentation amplifier. The test amplifier can complete a switchable circuit with the servo loop and detect a calibration input bias current for the test platform, without a production device in place. The device under test can be switched into the servo loop, and the total bias current measured with both the device under test and test amplifier in-circuit. The difference between the measured current with the device inserted and the previously measured calibration current represents the bias current for the subject device, without attaching external meters or requiring reference parts of the production type.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: March 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Dale Alan Heaton, David Walker Guidry
  • Publication number: 20120049959
    Abstract: The embodiments of the present invention disclose a high power-supply rejection ratio (PSRR) amplifier circuit. The amplifier circuit comprises a low dropout regulator, a negative charge pump and an amplifier. The output voltages of the negative charge pump and the low dropout regulators don't track the change of input voltage. Therefore the amplifier circuit has high PSRR.
    Type: Application
    Filed: August 25, 2011
    Publication date: March 1, 2012
    Inventors: Rui Wang, Jinyan Lin, Huijie Zhao, Yunping Lang
  • Patent number: 8125275
    Abstract: An amplifier has an input section with one or more input cells and an output section with one or more output cells. Either the input section or the output section includes at least two cells that may be selected to provide discrete gain settings. A loop amplifier is configured in a feedback arrangement with the input section. The input and output sections may have multiple selectable cells to provide coarse and fine gain steps. The gain of the loop amplifier may be coordinated with the gain of the input section to provide constant bandwidth operation.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: February 28, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Barrie Gilbert, John Cowles
  • Patent number: 8125270
    Abstract: An amplifier system providing improved Cartesian feedback is provided. A complex band pass error amplifier is provided. A quadrature up converter is connected to the complex band pass error amplifier so as to receive as input, output from the complex band pass error amplifier. An amplifier is connected to the quadrature up converter so as to receive as input, output from the quadrature up converter. A quadrature down converter is connected at or beyond the amplifier output so as to receive as input a signal proportional to that delivered by the amplifier as output to a load, wherein the complex band pass error amplifier is connected to the quadrature down converter so as to receive as a first input, output from the quadrature down converter and as a second input, a quadrature reference signal.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: February 28, 2012
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Marta G. Zanchi, Greig C. Scott
  • Publication number: 20120046004
    Abstract: According to one embodiment, an improved preamplification chain for implementation in a transmitter comprises a frequency conversion stage for up-converting a baseband signal to a transmit signal, a variable gain control power amplifier driver for preamplifying the transmit signal, and a differential feedback calibration stage receiving first and second differential outputs of a current steering unit of the power amplifier driver and providing calibration feedback to a baseband signal generator of the transmitter. In one embodiment, the frequency conversion stage includes an adjustable low-pass filter for filtering the baseband signal, a passive mixer for up-converting the baseband signal to the transmit signal, and a clock conversion unit configured to convert a fifty percent (50%) duty cycle clock input to a twenty-five percent (25%) duty cycle clock output for driving the passive mixer.
    Type: Application
    Filed: August 19, 2010
    Publication date: February 23, 2012
    Applicant: Broadcom Corporation
    Inventors: Ahmad Mirzaei, Hooman Darabi, Amir Hadji-Abdolhamid
  • Patent number: 8120423
    Abstract: An operational amplifier with two pairs of differential inputs for use with an input switch capacitor network. The operational amplifier has reset devices for resetting the second pair of differential inputs while amplifying the first pair of differential inputs, and for resetting the first pair of differential inputs while amplifying the second pair of differential inputs for reducing memory effect in electronic circuits. In an embodiment, the amplifier has an additional reset device for resetting the outputs during a prophase of amplifying the first pair of differential inputs and a prophase of amplifying the second pair of differential inputs.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: February 21, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Liping Deng, Tiejun Dai, Wei Zheng, Xueqing Wang
  • Patent number: 8115544
    Abstract: An amplifier circuit on a single die comprises a low voltage amplifier with a first common mode voltage and having an input and an output. A power amplifier has a second common mode voltage whose input is operably coupled to an output of the low voltage amplifier. The first common mode voltage and second common mode voltage are unequal. A compensation circuit is operably coupled to an input of the power amplifier and arranged to inject a DC-current or apply a common mode voltage into the power amplifier that is representative of a difference between the first common mode voltage and the second common mode voltage.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: February 14, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Gerhard Trauth, Ludovic Oddoart
  • Patent number: 8111100
    Abstract: The present invention covers novel approaches to the differential amplification of an input signal. Embodiments of the present invention have precise gain, swing to within micro-volts (?V) of ground, and have high CMRR without the need for precision resistors or tuned potentiometers. Embodiments of the present invention are particularly suited for the amplification of an instrumentation signal for delivery to an analog-to-digital converter. Examples of such signals include the product of a strain-gauge front end, a temperature sensor front end, and certain devices for bioelectronics detection.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: February 7, 2012
    Assignee: National Semiconductor Corporation
    Inventor: Robert Allen Pease
  • Patent number: 8085079
    Abstract: According to one embodiment of the invention, a summing circuit comprises a first transmitter, a second transmitter, a first current offset circuit and a first transconductance amplifier. The first current offset circuit is coupled to the emitters of the first and second transistors. The first transconductance amplifier is coupled to the first current offset circuit.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: December 27, 2011
    Assignee: Menara Networks
    Inventors: Kelvin Tran, Matthias Bussmann, Lloyd Linder, Salam Elahmadi, Harry Tan
  • Patent number: 8072262
    Abstract: A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input chopping circuitry (9) chops the first signal at a second frequency substantially greater than the first frequency to produce a second signal. The first frequency is a sub-harmonic of the second frequency. Post-chopping circuitry (30) chops the second chopped signal at the first frequency to produce a third signal that is applied to an input of a signal conditioning circuit (2). The output chopping circuitry (10) chops an output of the signal conditioning circuit at the second frequency to generate a fourth signal. The fourth signal is filtered.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: December 6, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Rodney T. Burt, Joy Y. Zhang
  • Patent number: 8054133
    Abstract: A device and a method for eliminating feedback common mode signals are provided, which belong to the electronic technology field. The device includes an operational amplifier circuit with two output ends. The two output ends are a first output end and a second output end. The device also includes a feedback unit. The feedback unit is configured to receive level signals of the first output end and the second output end of the operational amplifier circuit, and superpose feedback common mode signals to input ends of the operational amplifier circuit according to states of the level signals. The method includes: the feedback unit receives level signals of a first output end and a second output end of an operational amplifier circuit, and superposes feedback common mode signals to the input ends of the operational amplifier circuit according to the states of the level signals.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: November 8, 2011
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Yongping Liu
  • Publication number: 20110268289
    Abstract: For headphone subsystems that employ common ground switches for speaker outputs (for example), there can be a significant issue with cross-talk and ground noise. Here, configurations for an amplifier and switch network are provided, which generally cancel noise from the “ground switch,” so as to provide an improvement over conventional configurations with little overhead. Additionally, the cross-talk for these configurations are not generally dependent on the “ground switch” or speaker impedance.
    Type: Application
    Filed: July 19, 2010
    Publication date: November 3, 2011
    Applicant: Texas Instruments Incorporated
    Inventors: Shailendra K. Baranwal, Amit Goyal
  • Publication number: 20110267144
    Abstract: A differential Low Noise Amplifier (LNA) includes a first stage of resistive feedback amplifiers and second stage of complementary amplifiers, where the outputs of the first stage are coupled to the inputs of the second stage in a cross-coupled fashion. An inductive load, such as a transformer, combines signals output from the complementary amplifiers of the second stage. In one example, the LNA has an input impedance of less than 75 ohms, a noise factor of less than 2 dB, and a gain of more than 20 dB. Due to the low input impedance, the LNA is usable to amplify a signal received from a source having a similar low impedance without the use of an impedance matching network between the output of the source and the input of the LNA.
    Type: Application
    Filed: May 3, 2010
    Publication date: November 3, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventors: Manas Behera, Harish S. Muthali, Kenneth Charles Barnett
  • Patent number: 8050423
    Abstract: An n-channel integrated circuit device (n is an integer of 1 or greater) for muting an audio signal includes a control circuit configured to generate a control signal and a delayed control signal, a charging and discharging circuit configured to charge and discharge a time constant control terminal according to the control signal and the delayed control signal, an N-th voltage-to-current converting circuit (N is an integer from 1 to n) configured to generate a (2N?1)-th current corresponding to a voltage on the time constant control terminal and a (2N)-th current corresponding to an intermediate voltage, a (2N?1)-th mirror circuit configured to copy the (2N?1)-th current to generate (4N?3)-th and (4N?2)-th intermediate currents, a (2N)-th mirror circuit configured to copy the (2N)-th current to generate (4N?1)-th and (4N)-th intermediate currents, a (2N?1)-th selecting and combining circuit configured to combine a (2N?1)-th mute control current using the (4N?3)-th intermediate current and the (4N?1)-th interm
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: November 1, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Publication number: 20110260788
    Abstract: A first low-pass filter circuit includes a first input terminal which receives a sensor signal, a second input terminal, and an output terminal which outputs a first output signal. A second low-pass filter circuit includes an input terminal connected to the second input terminal of the first low-pass filter circuit, and an output terminal. A third low-pass filter circuit includes an input terminal connected to the output terminal of the second low-pass filter circuit, and an output terminal which outputs a second output signal.
    Type: Application
    Filed: July 5, 2011
    Publication date: October 27, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Fumihito INUKAI, Hitoshi KOBAYASHI, Shigeo MASAI
  • Publication number: 20110241770
    Abstract: An amplifier processes a differential input received at a differential input port. The amplifier includes a first amplifier circuit and a second amplifier circuit. The first amplifier circuit is disposed in a first signal path between a first input node and a first output node of the amplifier, and arranged to amplify a first input signal received at the first input node and accordingly generate a first amplified signal to the first output node. The second amplifier circuit is disposed in a second signal path between a second input node and a second output node of the amplifier, and arranged to amplify a second input signal received at the second input node and accordingly generate a second amplified signal to the second output node. A driving capability of the first amplifier circuit is different from a driving capability of the second amplifier circuit.
    Type: Application
    Filed: September 15, 2010
    Publication date: October 6, 2011
    Inventor: Sung-Han Wen
  • Patent number: 8026759
    Abstract: A multistage amplifying circuit includes a first amplifying circuit that either samples a first analog voltage input or amplifies a difference between the first analog voltage and a first digital voltage converted from the first analog voltage, in response to a control signal. A second amplifying circuit either samples a second analog voltage input or amplifies a difference between the second analog voltage and a second digital voltage converted from the second analog voltage, in response to the control signal. A common amplifier receives output voltages of the first amplifying circuit and the second amplifying circuit and either resets the output voltage of the first amplifying circuit and determines an output voltage by using the second amplifying circuit, or resets the output voltage of the second amplifying circuit and determines an output voltage by using the first amplifying circuit, in response to the control signal.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: September 27, 2011
    Assignees: Samsung Electronics Co., Ltd., Sogang University
    Inventors: Michael Choi, Ho-jin Park, Eun-seok Shin, Kyoung-jun Moon, Seung-hoon Lee, Kyung-hoon Lee, Young-ju Kim, Se-won Lee, Beom-soo Park