Abstract: An apparatus and method for biasing each amplifier of an amplification stage provides that the voltage across each current sensing element of each amplifier of the amplification stage is measured. For each pair of voltage measurements taken, a sum and difference is calculated, where the sum is processed to determine minima peaks and the difference is averaged. A portion of the sum term and the average of the difference term are summed to yield the individual bias current conducted by a first amplifier of the amplification stage. The difference between a portion of the sum term and the average of the difference term is calculated to yield the individual bias current conducted by the second amplifier of the amplification stage. The bias current conducted by the first and second amplifiers may then be individually modified manually, or conversely, may be modified automatically based upon the bias current measurements taken.

Abstract: Current conveyor based instrumentation amplifiers are disclosed. Such instrumentation amplifiers may have the higher common mode rejection ratios (CMRR), lower area requirements in integrated circuits, fewer resistors, fewer resistor matching requirements, less noise, and less distortion than prior art instrumentation amplifiers. One embodiment, with two input voltage lines and one output voltage line, comprises a single current conveyor and two resistors. Another embodiment, with two input voltage lines and two output voltage lines, comprises two current conveyors and four resistors, possibly in two matched pairs. Buffers may be used for impedance, frequency, and phase delay adjustment on any or all of the voltage lines.

Abstract: Chopper stabilized operational amplifiers are in common use. One drawback of these amplifiers, however, is that there is an inherent tone present at the chopper frequency. Conventional circuits have attempted to reduce the effects of this tone by using various filtering schemes, such as a notch filter. Here, however, a track-and-hold circuit is used in conjunction with matched amplifiers to compensate for this tone.

Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Abstract: An instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the input signals. A low pass filter provides passive band limiting of the output signal. Each operational amplifier is implemented as a multi-path amplifier that includes a low frequency path and a high frequency path between an input and an output of the operational amplifier. Further, each multi-path amplifier includes a differential input transconductance stage within the low frequency path and a differential input transconductance stage within the high frequency path. Within each multi-path amplifier, the differential input transconductance stage of the high frequency path is noisier than, but consumes less power than, the differential input transconductance stage of the low frequency path.

Abstract: A differential chopper comparator compares an input signal voltage and a first voltage, and includes a first capacitor, a second capacitor, and a differential amplification unit including a differential amplification circuit. Either the input signal voltage or the first voltage is applied to one end of the first capacitor via a first switch unit. A fixed voltage is applied to one end of the second capacitor via a second switch unit. Either a non-inverting input terminal or an inverting input terminal of the differential amplification circuit is connected to the other end of the first capacitor, and the other terminal is connected to the other end of the second capacitor. An impedance of the first switch unit side viewed from one end of the first capacitor and an impedance of the second switch unit side viewed from one end of the second capacitor are substantially same.

Abstract: This invention relates to a fully differential non-inverting parallel amplifier for detecting biology electrical signal, including input buffer circuits, differential filter circuits, data selector, non-inverting parallel amplifying circuits and analog-digital circuits. The biology electrical signal, first impeded and converted by the input buffer circuits, and then low-pass filtered by the differential filter circuits, shall be amplified with its common mode signal rejected by passing through the data selector and non-inverting parallel amplifier circuits. At last, the amplified biology electrical signal is output by analog to digital conversion in the analog-digital circuits after its noises beyond signal high frequency band are filtered by anti-aliasing filter net. This invention, with low noise and high common mode rejection ratio, stable baseline, large signal input dynamic range, is reliable and not easy to be saturated. Furthermore, it can support mature PACE Detecting with a low cost.

Abstract: An integrated sensor includes: i) a voltage regulator coupled with a mechanical ground and delivering a regulated voltage based on a primary power supply voltage referencing an electrical ground; ii) a high-impedance sensitive element powered by the primary power supply, electrically coupled to the mechanical ground and delivering an electrical quantity representative of a physical quantity; iii) an amplification module powered by the regulated voltage and including a first input receiving an analog reference dependent on the regulated voltage and a second input receiving the electrical quantity, and designed to deliver a first output voltage representing the amplified measurement voltage; and iv) a differential amplifier powered by the primary power supply voltage, referencing the electrical ground and including first and a second inputs receiving the analog reference and the first output voltage, respectively, and delivering a second output voltage representing the first amplified output voltage referenced

Abstract: An apparatus includes a first amplifier having a first input coupled to a first optical detector. The first amplifier includes a first output corresponding to a logarithm of the first input. The apparatus includes a second amplifier having a second input coupled to a second optical detector and having a second output corresponding to a logarithm of the second input. The apparatus includes a differential amplifier configured to amplify a difference between the first output and the second output.

Abstract: A non-inverting amplifier includes an operational amplifier, an input resistor, and a feedback resistor. The operational amplifier amplifies and outputs a difference between an input voltage and a voltage of a control node. The input resistor is connected between a reference voltage port and the control node. The feedback resistor is connected to an output port of the operational amplifier and the control node. The non-inverting amplifier supplies a control current to the control node for controlling an offset voltage of the output port.

Abstract: The invention provides a level shift circuit that prevents an offset when the supply voltage changes. A level shift circuit has a differential amplification circuit, a current generation circuit, a capacitor and a holding circuit. An input signal from the optical pickup is inputted to the non-inversion input terminal of the differential amplification circuit. First, by turning on a first switch, a feedback loop is formed by the differential amplification circuit, the current generation circuit and the capacitor to perform a level shift, and the voltage charged in the capacitor is held by the holding circuit. Then by turning off the first switch and turning on a second switch, the voltage held by the holding circuit is applied to the non-inversion input terminal of the differential amplification circuit to perform a level shift.

Abstract: An angular velocity sensor includes a sensor device and an amplification circuit. The sensor device generates a detection signal corresponding to an angular velocity. The amplification circuit generates both a first output signal by non-inverting amplifying the detection signal with a first gain and a second output signal by inverting-amplifying the detection signal with the first gain, and outputs the first output signal and the second output signal in order to obtain an angular velocity signal by calculating a difference between the first output signal and the second output signal.

Abstract: A two stage fully differential amplifier has been designed which works, in tandem with a TX-FIR, as a linear equalizer at low frequencies, not covered by the TX-FIR, and also acts as a linear amplifier at higher frequencies which are equalized by the TX-FIR. The amplifier as a frequency response which does not attenuate signals frequencies less than one twentieth of baud rate, creates gain peaking ion the region between one twentieth and one tenth of baud rate and maintains flat peak gain up to half of baud rate. Different aspects of the frequency response curve (such as dc gain, max gain and zero frequency) are completely programmable. Also, the differential amplifier has been designed from low power and process, voltage and temperature insensitive frequency response.

Abstract: A differential amplifier circuit comprising a differential amplifier capacitor and a mismatch error cancellation circuitry, a first pair of capacitors, a second pair of capacitors consisting of switching network. The switching network is arranged to operate in a first configuration wherein the first pair of capacitors is operably coupled to differential inputs of the differential amplifier circuit. The switching network is further arranged to operate in second configuration wherein each capacitor of the first pair of capacitors is operably coupled within a feedback loop between an output and an input of the differential amplifier such that the differential amplifier outputs signals representative of the sampled input voltage signals, and the second pair of capacitors are operably coupled in parallel between the outputs of the differential amplifier such that the second pair of capacitors sample the voltage difference between the outputs.

Abstract: An amplifier system providing improved Cartesian feedback is provided. A complex band pass error amplifier is provided. A quadrature up converter is connected to the complex band pass error amplifier so as to receive as input, output from the complex band pass error amplifier. An amplifier is connected to the quadrature up converter so as to receive as input, output from the quadrature up converter. A quadrature down converter is connected at or beyond the amplifier output so as to receive as input a signal proportional to that delivered by the amplifier as output to a load, wherein the complex band pass error amplifier is connected to the quadrature down converter so as to receive as a first input, output from the quadrature down converter and as a second input, a quadrature reference signal.

Abstract: A two-channel amplifier with common signal including a splitter for establishing three intermediate signals on the basis of two input signals, wherein the three intermediate signals represent two channels, one of the three intermediate signals being a common signal common to both of the two channels and having a representation based on a sum of the two input signals.

Abstract: A current-mode differential signal transmitting circuit is disclosed, including a transmitter having a first transmitting module and a second transmitting module. The first transmitting module includes a plurality of first outputting units to output first data and a clock outputting signal. The second transmitting module includes a plurality of second outputting units for outputting second data, and the first and second transmitting modules share this clock outputting unit.

Abstract: This invention is an amplification circuit which limits increased power consumption and circuit surface area use and an imaging device including this amplification circuit. After initially discharging a capacitor, a signal charge corresponding to the difference between pixel signals is transferred repeatedly to the capacitor during an integration phase storing a signal charge proportional to the number of repetitions. The output of amplification is the signal charge accumulated in the capacitor. The gain is independent of the capacitor capacitance ratio. Thus the capacitor size can be smaller than conventional amplification circuits.

Abstract: Techniques for providing an instrumentation amplifier having a plurality of selectable gain settings. In an exemplary embodiment, a gain adjustment block for accepting a differential input voltage is coupled to a differential-to-single-ended conversion block for generating a single-ended output voltage. The gain adjustment block may have a plurality of gain settings selectable by one or more switches. The instrumentation amplifier advantageously offers precise gain control without the need for external calibration, while being robust and simple to design.

Abstract: A broad-band active delay line comprises a plurality of broad-band active delay cells configured in a cascade topology. Each broad-band active delay cell comprises a feedback loop and a feedforward path to achieve a high bandwidth.

Abstract: A multi-input operational amplifier comprises two transconductors, two current mirrors, and a current source. Each transconductor generates a current according to a corresponding voltage difference. When the voltage difference is less than or equal to zero, the current is a constant. When the voltage difference exceeds zero, the current is proportional to the voltage difference.

Abstract: Methods and apparatus according to various aspects of the present invention may operate in conjunction with a resistor formed of a lightly-doped P-type region formed in a portion of a lightly-doped N-type semiconductor well extending on a lightly-doped P-type semiconductor substrate, the well being laterally delimited by a P-type wall extending down to the substrate, the portion of the well being delimited, vertically, by a heavily-doped N-type area at the limit between the well and the substrate and, horizontally, by a heavily-doped N-type wall. A diode may be placed between a terminal of the resistor and the heavily-doped N-type wall, the cathode of the diode being connected to said terminal.

Abstract: Signal processing circuit for voltage signals from electrodes of a magneto-inductive, flow measuring device, wherein two measuring electrodes are connected with a fully differentially working amplifier having two inputs and two outputs.

Abstract: A digitally variable gain amplifier comprising a front-end stage, a level shifter stage, and an output amplifier stage. The front-end stage comprises a high gain pre-amplifier and a low gain pre-amplifier driven in parallel by a differential input signal. A coarse gain control is realized by enabling only one pre-amplifiers at a time, while the differential input signal remains connected to the inputs of the disabled pre-amplifier. An attenuator following each pre-amplifier provides fine gain control. The enabled pre-amplifier amplifies the differential input signal and outputs a first dc voltage level. The disabled pre-amplifier is placed into a standby ready mode and outputs a second dc voltage level that is greater in magnitude than the first dc voltage level. The level shifter stage performs a minimum voltage selection operation to automatically select and level shift the amplified differential input signal, and further pass the signal to the output amplifier stage.

Abstract: A balanced amplifier (1) is provided with: a first operational amplifier (11) whose reverse-phase input terminal is connected to an input voltage source (30) and whose reverse-phase input terminal is connected to an output terminal of the first operational amplifier; a second operational amplifier (12) whose positive-phase input terminal is connected to the input voltage source and whose reverse-phase input terminal is connected to an output terminal of the second operational amplifier; and a voltage division circuit (20i, 20j, 20k, 20l) for dividing a reference voltage supplied from a reference voltage source (40), the reference voltage source being connected to a positive-phase input terminal of each of the first operational amplifier and the operational amplifier through the voltage division circuit.

Abstract: A phase mismatch compensation device comprises a first low pass filter unit, a second low pass filter unit and a phase compensation unit. The first low pass filter unit comprises a first input unit transferring the I-channel analog input signal to an input terminal of a first OP-amp, and the first self-feedback unit transferring the I-channel output signal to the input terminal of the first OP-amp. The second low pass filter unit comprises the second input unit transferring the Q-channel analog input signal to an input terminal of a second OP-amp, and a second self-feedback unit transferring the Q-channel output signal to the input terminal of the second OP-amp. The phase compensation unit comprises a first compensation unit transferring the Q-channel analog input signal to the input terminal of the first OP-amp, and a second compensation unit transferring the I-channel analog input signal to the input terminal of the second OP-amp.

Abstract: A differential amplification circuit and a method corrects an offset voltage derived from a variance in resistances. With first and second input terminals brought to the same potential and set to a potential different from a reference potential, the resistance value of resistors is adjusted so that an output potential and the reference potential will be substantially equal to each other.

Abstract: A microphone preamplifier, comprising a differential input (102) stage with a first and a second input terminal and an output stage with an output terminal; where the microphone preamplifier is integrated on a semiconductor substrate. A feedback circuit, with a low-pass frequency transfer function (103), is coupled between the output terminal and the first input terminal and integrated on the semiconductor substrate. The second input terminal provides an input for a microphone signal (105). Thereby a very compact (with respect to consumed area of the semiconductor substrate), low noise preamplifier is provided.

Abstract: A first to a fourth sampling switch (1a to 1d), a first to a fourth sampling capacitance (4 to 7), and a first and a second charge redistribution switch (2a, 2b) are provided on the input side of a differential amplifier (8). A first and a second reset switch (3a, 3b) are provided between inputs and outputs of the differential amplifier (8). A positive-polarity input signal voltage (Vinp), a negative-polarity comparison reference voltage (Vrefn), a positive-polarity comparison reference voltage (Vrefp), and a negative-polarity input signal voltage (Vinn) are applied via the first to fourth sampling switches (1a to 1d) to one ends of the first to fourth sampling capacitances (4 to 7), respectively. During a reset period, the reset of the differential amplifier (8) is released after sampling of the voltages. During a comparison period, the first and second charge redistribution switches (2a, 2b) are caused to be in a conduction state.

Abstract: A single stage differential amplifier is disclosed as comprising a pair of vacuum tube triodes for amplifying two input signals and generating two output signals. The differential amplifier has DC self-biasing ability and grid-to-cathode over-voltage protection for directly coupling from the outputs of another differential amplifier. By possessing these unique features, this differential amplifier becomes an important building block in forming a balanced amplifier by cascading multi differential amplifiers in a directly coupled fashion.

Abstract: An audio power amplifier includes a differential amplifier circuit that serves as an input circuit. The differential amplifier circuit includes a signal GND (SG) terminal that receives a SG voltage, and an audio signal input terminal that receives an audio signal. A SG voltage generation circuit is provided to output the SG voltage. The SG voltage generation circuit includes a voltage follower amplifier that outputs a current, a reference voltage source that is input to the voltage follower amplifier, and a current control circuit that controls the current output from the voltage follower amplifier. The SG voltage rises in a prescribed manner while suppressing a pop sound during its transition.

Abstract: Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. For an unbalanced input signal, a first input terminal of the LNA may be communicatively coupled to ground via an inductance and a bias point of the LNA may be communicatively coupled to a first bias voltage. For a balanced input signal, the first input terminal of the LNA may be communicatively coupled to the balanced signal and the bias point may be communicatively coupled to a second bias voltage. The LNA may comprise a center-tapped differential inductor which may be coupled to an output terminal of the LNA and may enable the LNA to output differential signals regardless of the input signaling mode. In various embodiments of the invention, the LNA may be utilized to amplify GNSS signals such as GPS signals.

Abstract: A line driver includes: a differential amplifier for amplifying an input signal to generate an output signal; first and second series resistors coupled respectively to output terminals of the differential amplifier and through which the output signal is output; first and second negative-feedback resistors each coupled between a respective input terminal and a respective output terminal of the differential amplifier; first and second positive-feedback variable resistors each coupled between a respective input terminal of the differential amplifier and a respective one of the first and second series resistors; and an adjusting unit coupled to the first and second positive-feedback variable resistors to adjust a resistance thereof with reference to the output signal.

Abstract: A nested transimpedance amplifier circuit includes a first-order nested transimpedance amplifier having an input and an output. The first-order nested transimpedance amplifier is configured to be powered by a first voltage. A charge pump module is configured to receive the first voltage and a second voltage. The second voltage is different from the first voltage. The charge pump module generates a third voltage based on the first voltage and the second voltage. A first operational amplifier has an input and an output. The input of the first operational amplifier communicates with the output of the zero-order transimpedance amplifier, and the first operational amplifier is configured to be powered by the third voltage.

Abstract: The present invention relates to an amplifier circuit and system, and to a method of compensating a gain imbalance generated in a complementary amplifier stage with first and second amplifier means (22, 24) in a bridge configuration. A compensation offset current is generated in response to the values of input signals supplied to respective inputs of said first and second amplifier means, and the compensation offset current is injected to a junction node between the inputs of the first and second amplifier means (22, 24). Thereby, it can be ensured that the gain of the first and second amplifier means does not depend on the kind of input signals, i.e. balanced or unbalanced input signals. An automatic gain correction can thus be achieved and the requirement of additional control signals or control terminals for selection of gain control circuits depending on the kind of input source or input configuration of the amplifier circuit can be dropped.

Abstract: A low-voltage operational amplifier includes a differential amplifying stage, an output amplifying stage and a compensation stage. The differential amplifying stage amplifies a difference between a first signal and a second signal that constitute a differential pair using an input pair of NMOS transistors, and outputs an amplified first signal and an amplified second signal. The output amplifying stage amplifies a difference between the amplified first signal and the amplified second signal using an input pair of PMOS transistors, and outputs a first output signal and a second output signal that constitute a differential pair. The compensation stage receives the amplified first signal, the amplified second signal, the first output signal, and the second output signal, and reduces a settling time of the first output signal and the second output signal.

Abstract: A switch-capacitor (“SC”) amplifier includes a two-stage operational amplifier (“OP-AMP”), an input SC network, and a feedback SC network. The two-stage OP-AMP includes a first OP-AMP stage having an output coupled to an input of a second OP-AMP stage. The input SC network is coupled to an input of the first OP-AMP stage. The feedback SC network is configured to selectively couple the output of the first OP-AMP stage to the input of the first OP-AMP stage during a first phase of operation of the SC amplifier and to couple an output of the second OP-AMP stage to the input of the first OP-AMP stage during a second phase of operation of the SC amplifier.

Abstract: Operational transconductance amplifiers have a natural signal capacity format in which signal performance can be expressed in terms of fixed percentages. Input signal can be applied to Operational transconductance amplifiers in this natural signal capacity format in order to optimize performance. A signal which drives a given Operational transconductance amplifier architecture to produce an output current which is at 50% of it's maximum available output current can be thought of as applying an input voltage which is at 50% of an Operational transconductance amplifier's maximum input voltage capacity. In this input/output channel capacity format, dc offset, distortion, and noise all are temperature independent.

Abstract: An operational amplifier includes, between an input and an output of an operational amplifier (an operational amplification stage) 10, a feedback capacitor 34 connected in negative feedback, a phase control circuit 100 having a resistor element (a resistor unit) 30 connected in series to the feedback capacitor 34. Load capacitors (load units) 32 are connected on the output side of the operational amplifier 10 and driven by an output signal from the operational amplifier 10. In a case that the capacitance values of the load capacitor 32 and 33 are increased and the phase margin of the operational amplifier becomes excessive in comparison with the optimum value, a resistance value RO of the resistor element 30 is increased to control the phase margin of the operational amplifier so as to fall within the optimum range, and thus accelerated settling properties are realized.

Abstract: A receiver has a first input port and a second input port both coupled to a differential amplifier through first and second input capacitors. A bias circuit coupled to the core side of the first input capacitor and to the core side of the second input capacitor is configured to provide a selected voltage to at least one of the first input and the second input of the differential amplifier. In one embodiment, a common mode bias circuit provides a common mode voltage to both inputs of a differential amplifier. In a particular embodiment, a run length detector monitors the output of the differential amplifier and provides a run length feedback signal or an average bit density feedback signal to the set the selected voltage between periods of data reception.

Abstract: Provided is an operational transconductance amplifier (OTA). An existing Nauta transconductor used to implement a high frequency Gm-C filter integrated circuit (IC) is analyzed by a new method and from a new perspective to remove extra components and divide roles of remaining inverters for more simple and efficient circuit structure. In an existing Nauta transconductor, a common mode signal from an input terminal is amplified and appears at an output terminal, while in the inventive Nauta transconductor the common mode signal from an input terminal does not appear at the output terminal and is effectively eliminated. These enhanced characteristics can be achieved with a smaller number of inverters than an existing Nauta transconductor. Frequency characteristics of the filter can be effectively enhanced by independently controlling the quality factor without affecting the transconductance value required for frequency characteristics of the filter.

Abstract: In one embodiment, the present invention includes multiple gain stages and an output network coupled to the gain stages. Each of the gain stages can be independently controlled to amplify a radio frequency (RF) signal to an output power level for transmission from a mobile wireless device. When controlled to be inactive, at least one of the gain stages can be placed into a low impedance state.

Abstract: Disclosed herein is a subtractor circuit for outputting an output voltage as a difference between a first input voltage and a second input voltage. The subtractor circuit may include a first semiconductor element, a second semiconductor element, a third semiconductor element, a fourth semiconductor element, a fifth semiconductor element, and a sixth semiconductor element configured to each invert a voltage input to an input terminal and output the inverted voltage from an output terminal; an input terminal of the first semiconductor element; an input terminal of the second semiconductor element; an output terminal of the first semiconductor element; and an output terminal of the third semiconductor element.

Abstract: A differential current amplifier circuit includes a first circuit generating a first pair of output currents based on a first input current to the differential current amplifier circuit. A second circuit generates a second pair of output currents based on a second input current to the differential current amplifier circuit. A first subtraction circuit generates a first output voltage based on a difference between one of the first pair of output currents and one of the second pair of output currents. A second subtraction circuit generates a second output voltage based on a difference between the other one of the second pair of output currents and the other one of the first pair of output currents.

Abstract: A single stage differential amplifier is disclosed as comprising a pair of vacuum tube triodes for amplifying two input signals and generating two output signals. The differential amplifier has DC self-biasing ability and grid-to-cathode over-voltage protection for directly coupling from the outputs of another differential amplifier. By possessing these unique features, this differential amplifier becomes an important building block in forming a balanced amplifier by cascading multi differential amplifiers in a directly coupled fashion.

Abstract: A structure and related design structure for providing a common mode feedback to a differential amplifier are disclosed. A common mode feedback amplifier is connected to a differential amplifier to provide common mode feedback voltage thereto. An input of the common mode feedback amplifier is shorted to an output terminal of the differential amplifier during a sampling phase, and is coupled to the differential output voltage through two matched capacitors during a holding phase.

Abstract: The invention concerns an audio power amplifier apparatus capable of providing at low manufacturing cost extremely low non-linear distortion, even lower than ?120 dB, comprising a main power amplifying section the output of which is series connected to a secondary of a coupling transformer T1, in turn connected to the apparatus output, the apparatus being characterized in that the amplifying section provides an output signal Vma having a negative feed-back loop non-inverting gain, and in that it further comprises a cascade of one or more sections, the inputs of which are connected to the output of the input section and to the output of the amplifying section, and the output of which is constituted of a secondary winding of the transformer T1, the cascade being capable to very accurately extract the error signal Ve with respect to the amplified signal Vi from the signal at the output of the amplifying section and to to provide to its output an exact, but anti-phase, copy thereof in a predetermined very wide fr

Abstract: Various systems and methods for signal amplification are disclosed. For example, some embodiments of the present invention provide differential amplifiers that include dual transconductance characteristics. Such amplifiers include two dual input operational amplifiers that each include two input sets. A first of the input sets exhibits a first transconductance and a second of the input sets exhibits a second transconductance. The two dual input operational amplifiers are configured such that to a common mode signal, the amplifier exhibits an overall transconductance that is the difference between the first transconductance and the second transconductance. In contrast, to a differential signal, the overall transconductance is the sum of the first transconductance and the second transconductance.

Abstract: A variable gain amplifier including: a differential amplification unit amplifying and outputting a difference between a first input signal and a second input signal inputted via a first input terminal and a second input terminal, respectively, according to a first bias current of the first input terminal and second input terminal, to a first output terminal and a second output terminal; a diode-connected load unit comprising loads diode-connected to the first output terminal and second output terminal, respectively, the load receiving a second bias current; and a gain control unit controlling a gain between the input terminals and the output terminals of the differential amplification unit by controlling the size of the first bias current and second bias current.

Abstract: In a DC offset cancellation circuit, an operational amplifier is provided with an inverse terminal, a non-inverse terminal and an output terminal. A first resistor is connected to the non-inverse terminal. A second resistor connected between the inverse terminal and the output terminal. A DC offset cancellation resistor is connected between the inverse terminal and the non-inverse terminal. Also, in each of first and second DC offset cancellation circuits of the programmable gain amplifier, an operational amplifier is provided with an inverse terminal, a non-inverse terminal and an output terminal. A first resistor is connected to the non-inverse terminal. A second resistor is connected between the inverse terminal and the output terminal. A DC offset cancellation circuit is connected between the inverse terminal and the non-inverse terminal. Here, the first and second DC offset cancellation circuits are connected with each other in series.