Abstract: An emitter-coupled logic (ECL) gate configuration is provided that allows variations in the bias current for controlling propagation delay. The emitter coupled logic circuitry includes a plurality of input transistors having commonly-coupled emitters. The collector of each input transistor is connected to receive a control voltage. A current source is connected between the commonly-coupled emitters and ground. Circuitry, preferably a variable resistance, is connected between the collectors of the input transistors and a supply voltage. A bias voltage controls the charging current provided to the collectors of the ECL input transistors.

Abstract: A wide band tunable microwave oscillator for monolithic microwave integrated circuits. The oscillator does not use varactors or inductors for oscillation, but uses a voltage variable resistor coupled to a first MESFET supplying a capacitance, and to an amplifying element to create an RC oscillator. The voltage variable resistor is a second MESFET coupled to a variable voltage source. The oscillator takes advantage of the gate capacitance of the first MESFET, as well as the gain available from using an active element within the feedback loop.

Abstract: A voltage controlled oscillator with temperature compensation and reduced trigger jitter. The temperature compensation is improved by applying an on-chip generated temperature-dependent control voltage to first and second parallel oscillator stages through which the oscillation signal passes. The second stage has a greater signal propagation delay than the first stage. The control voltage determines the signal delay contributed by each stage to the oscillating signal, decreasing the delay in response to a temperature-induced decrease in oscillator frequency and increasing the delay in response to a temperature-induced increase in frequency. The oscillator also includes means for generating oscillations from a predetermined signal phase that is independent of the oscillator phase before triggering.

Abstract: When an oscillator is required to operate at high frequencies, there may be more than one frequency that can provide the required 360.degree. phase shift in the feedback signal, and thus more than one oscillating frequency. The present invention eliminates prior art inductors in assuring (for oscillators having an odd number of stages) that there is only a single range of frequencies having the desired phase shift in the feedback loop. In a three-stage oscillator, this is accomplished by designing the circuit to have 120.degree. of phase shift in each stage at the desired oscillatory RF frequency, but 180.degree. of phase shift at near DC frequency.

Abstract: A control pulse generator according to the present invention includes a voltage generator for generating an output voltage proportional to a power supply voltage, an inverter for generating an inversion signal whose signal level is inverted when the output voltage from the voltage generator reaches a predetermined value, and a pulse signal generator for delaying a level inversion timing of the inversion signal by a predetermined delay time, and generating a control pulse having a width corresponding to the delay time. According to the control pulse generator with the above arrangement, the width of the control pulse can be determined on the basis of the delay time of the pulse signal generator, regardless of rise states of the power supply voltage. In addition, the height of the control pulse can be set at a desired value according to a supply voltage to the pulse signal generator, regardless of rise states of the supply voltage.

Abstract: An oscillator with a surface acoustic wave filter connected in its feedback path. The oscillator includes an attenuator in the feedback path for attenuating to a predetermined level an oscillating signal fed back to the surface acoustic wave filter from an amplifier used to excite the oscillation. The attenuation is sufficient to prevent damage to the acoustic wave filter.

Abstract: A microwave oscillator in a loop configuration comprises three substantially identical amplifier stages each having its own phase shift at a selected oscillating frequency. A transmission delay element having a phase shift at the selected oscillating frequency, is also in the loop configuration, so that the oscillator has zero phase shift around the loop at the oscillating frequency. Each amplifier stage has at least one active component with resistive feedback, which is connected to DC blocking and filtering capacitors. Capacitor values between 2.2 and 5.1 pf are used making the oscillator design amenable to cost effective conventional hybrid and semiconductor processes.

Abstract: An oscillator comprising a delay circuit having an input terminal and an output terminal, and a tristate inverter having an input connected to the output terminal of the delay circuit and an output connected to the input terminal of the delay circuit. This tristate inverter is adapted to be switched by a control signal between an operable condition and an inoperable condition. A wave shaping inverter is connected to the output of the tristate inverter to generate a shaped pulse signal. Further, there is provided at least one tristate inverter having an input directly connected to an output of the tristate inverter itself so that it can generate a predetermined potential corresponding to the threshold of the tristate inverter itself. This voltage generating tristate inverter is connected at its output terminal to a selected one of the input and output terminals of the delay circuit.

Abstract: A voltage controlled oscillator circuit having an amplifier coupled in series with a feedback circuit and having adjustable voltage means coupled to the phase shifting element means for varying the phase shift of the phase shifting element output signal thereby varying the frequency of oscillation of the oscillator circuit.

Abstract: A phase shift oscillator formed with a surface acoustic wave coupled resonator in series with an amplifier and wherein the coupled resonator has a substantially 180.degree. phase shift occurring between the 3dB points of the frequency response curve of the coupled resonator.

Abstract: The fall-time of an ECL gate is precisely controlled using a fixed capacitor, which is connected between the positive supply voltage and the ECL gate output terminal, and a variable current source connected between ground and the ECL gate output terminal. A time-delay circuit is obtained by controlling the variable current source with an error voltage of a phase-locked loop such that the time-delay precisely tracks the frequency of the reference signal for the phase-locked loop. A signal detector circuit is obtained by combining time-delay circuits. A voltage-controlled oscillator is assembled by connecting 3 ECL gates with controlled fall-times in a ring oscillator configuration. Addition of a non-inverting input to one ECL gate makes the voltage-controlled oscillator interruptible. Combining a voltage-controlled oscillator of the type described with a phase detector fed by a reference signal provides a phase-locked loop with the control voltage thereof providing a frequency-to-voltage conversion function.

Abstract: A voltage-controlled oscillator includes an amplifier having two emitter-coupled differential amplifier stages, and in whose feedback network, connected in series, are a 3dB-90.degree. coupler and a surface-wave transmission line. Two variable capacitance diodes are connected to the two terminals of the coupler that are not used as input or output terminals, and a frequency control voltage is applied to both diodes. The oscillator is particularly well-suited for the transmission of digital signals with transmission speeds of over 100 Mbit/s.

Abstract: A low power oscillator circuit including a latch connected to two loops. Each loop includes dynamic inverters and static inverters connected in cascade. The loops are connected to the latch such that the output of the final stage is an input to the latch. An initialization circuit is included on one loop to initiate oscillation. Storage capacitors are included in the loops to provide an oscillator output voltage that is greater than the oscillator power supply voltage.

Abstract: A network operates in the log domain so as to filter logarithmic signals and has a signal-controlled variable system frequency response. A method is also described for constructing such networks so that they function substantially identical to equivalent RC networks.

Abstract: An I.C. integrator circuit is provided with an active tuneable element by which a precise integrator time constant can be established, despite variations in the values of individual circuit components. A plurality of integrator circuits are connected in an overall frequency responsive circuit, each integrator circuit having a input transconductance stage, an output integrating stage, and an adjustable intermediate conditioning stage, the latter stage preferably comprising a Gilbert multiplier circuit. The time constant of each integrator circuit is controlled by the conditioning stage, which in turn is under the control of a bias circuit common to all of the integrator circuits. A desired net frequency response characteristic can be achieved by simple adjustments to the common bias circuit, despite normal tolerances and variations among individual integrator circuits.

Abstract: A clock recovery network uses a voltage proportional to the incoming symbol rate as a coarse tuning signal to control the tuned center frequency of a voltage controlled oscillator. The incoming data is used to positively synchronize the oscillator to the incoming data stream.

Abstract: An oscillator for generating oscillation signals. The oscillation signals are initiated in response to an applied start signal and begin at a fixed predetermined phase. Hence, the oscillator is suitable for use in phase dependent timing systems to inhibit phase jitter which could otherwise occur. The oscillator includes an inverting amplifier and phase shifting feedback network for establishing and maintaining oscillations. The phase shifting feedback network includes a series coupled coil between the output and input of the inverting amplifier. A bias circuit is included for injecting direct current through the coil when oscillation is inhibited to generate a direct current magnetic field in the coil. The magnetic field ensures that, in response to the start signal, the oscillation signals begin at said fixed phase.

Abstract: The subject gyrator circuit is realized by a single amplifier and six resistors, which resistors are selected to satisfy a single equation. This permits great flexibility in setting the Z.sub.12 and Z.sub.21 impedance values without affecting the stability of the basic circuit.

Abstract: A variable sinusoidal oscillator comprised of an operational amplifier connected in a unity-gain configuration, with a positive-feedback capacitor connected between the output and the noninverting input of the amplifier, and a resistor between the noninverting input and circuit ground, either in the form of an external resistor or simply in the form of the input resistance of the amplifier. A linear attenuator may be connected in the negative-feedback circuit, and a nonlinear attenuator may be connected in tandem with the capacitor, or vice versa.

Abstract: A phase shifter circuit in electronic musical instruments, in which sound effects are generated by varying the amount of phase shift through voltage control. The amount of a shift may be linearly varied by an external voltage, and the operating point of the phase modulation can be freely set over a substantially wide range. The amount of phase shift, furthermore, may be made large so that a circuit stage having a pair of transistors is designated as a unit, and several such units are cascode-connected. Adjustment of this unit is not required.

Abstract: An active circuit is disclosed including an integrated circuit having at least one amplification stage comprising an FET. At least one negative feedback transistor is provided of the same conduction type as the amplifying transistor, with the drain-to-source path of the negative feedback transistor coupled in series between the drain and gate of the amplifying transistor. At least one biasing transistor of the same conduction type as the amplifying transistor are provided to bias the gate of the negative feedback transistor. The drain of the at least one biasing transistor is connected to a current source furnishing a current having a given ratio to the power supply current of the amplifying transistor. This circuit permits precise control of the small-signal resistance of the feedback transistor.

Abstract: A novel I.sup.2 L ring oscillator circuit includes means by which the repetition rate is adjustable. A plurality of cascaded logic gate stages are coupled in a ring configuration to achieve a plurality of astable states. Frequency adjustments are made by varying the amount of injection current applied to the logic gates which comprise the ring oscillator. Lowering injection current increases delay time from one astable state to the next resulting in a lower frequency repetition rate. The ring oscillator may be fabricated on a single substrate along with other I.sup.2 L circuitry and be utilized as the clock source therefore. In one embodiment of the circuit, a plurality of discrete frequency adjustments are provided; by selection of a particular lead pattern during fabrication of the oscillator, the appropriate injection current to the oscillator logic gates is provided.

Abstract: The VCO circuit includes means for varying the potential across an inverting stage of a ring oscillator for changing its frequency of oscillation, while maintaining the quiescent point of the stage output centered between the two operating voltages powering the circuit. A current source is connected between the more positive of the two operating voltages and the positive voltage terminal of the stage and a current sink is connected between the more negative of the two operating voltages and the negative voltage terminal of the stage. The current supplied by the current source and the current drawn by the current sink are proportional to an input control voltage and are equal in magnitude. The oscillator stage is biased in the linear portion of its transfer characteristic and provides a conduction path between the current source and the current sink.

Abstract: A fiber optic delay line-controlled oscillator or tuned amplifier. Two embodiments are shown and described, one employing a single solid state active element and the other employing two such elements. The fiber optic delay line or lines employed are combined electronic-to-light transducer(s) supplying the delay line or lines and optical-to-electronic transducer(s) responsive to the optical delay line or lines output(s). That combination provides the tuned or oscillatory feedback path. In one embodiment, a plurality of delay lines are effectively switched into the circuit discretely and selectively in response to a staircase control function.

Abstract: Disclosed is a ground isolating circuit adapted for construction on a single integrated circuit surface. The circuit comprises a microwave oscillator responsive to an applied data signal, a planar transformer for coupling the microwave signals generated by the oscillator, and a detector for rectifying the coupled, ground isolated microwave signal.

Abstract: CMOS oscillator in which the oscillator circuit comprises a first MOS transistor connected by its source to a first terminal of a voltage supply and biased by the current provided by a second MOS transistor of opposed type which is a part of the same integrated circuit. At least a third MOS transistor (T.sub.6, T.sub.8, T.sub.12) of the same type as the second and which is a part of the same integrated circuit is provided, the sources and gates of the second and third transistors being respectively connected together and respectively to the second terminal of the voltage supply and to a point (P) at a potential such that the mean drain current of the first transistor will be maintained at a value just higher than the value at which oscillation starts.

Abstract: This invention relates to a device for detecting a fall of level of flowable material in a closed container by emitting an oscillation. It is electronic in nature and the circuit has an amplifier with a feed-back terminal that is connected to a feed-back network. The feed-back network in turn includes two vertically spaced apart identical probe condensers each having an open dielectric space and each being in different feed-back paths of the feed-back network. The feed-back network is activated as the level of the flowable material drops, whereby the difference in the dielectric material of the condensers provides a change in input current to the amplifier. The circuit is responsive to a positive change in input current to cause the amplifier to commence oscillation on dropping of the level past the condensers to signal the drop of the level of the flowable material. The device is stable in design, low in cost and easy and reliable to use.

Abstract: A resonant circuit is provided with a number of phase shift circuits connected in series. A control circuit is connected in series with the phase shift circuits for controlling the direct current flowing through the circuits. One of the phase shift circuits is constructed of a pair of transistors interconnected by a capacitor. The emitter resistance of the transistors is determined by the direct currents flowing therethrough from the control circuit, whereupon the frequency of oscillation or resonance of the resonant circuit is dependant upon the emitter resistance.

Abstract: An odd number of cascaded inverter stages are connected in a ring configuration. Each stage has a control terminal associated therewith. The signal propagation delay time through a particular stage is controlled by the application of control signals to the control terminal. The frequency of the output signal is determined by the delay per stage and the number of stages in the ring configuration. The output signal can be taken from a point between any two cascaded stages in the ring.