Abstract: The low-power relaxation oscillator comprises a first module (21) having a ramp generator formed by a reference current source (31) and a storage capacitor (32) defining a ramp voltage (Vramp1), and a voltage comparator (m1, m2) for comparing the ramp voltage with a reference voltage, a second module (22, 41, 42, Vramp2, m3, m4) similar to the first module and an asynchronous flip-flop (23) receiving the output signal of the comparator of the first module at a first input (s) and the output signal of the comparator of the second module at a second input (r). For each module a generator of said reference voltage is configured by adding a reference resistance (33, 43) between the reference current source and the storage capacitor. Thus, the generation of the reference voltage and the ramp voltage is conducted on the very same current branch. This enables the electrical power consumption of the oscillator to be reduced.

Abstract: A periodic signal generating circuit which is dependent upon temperature for establishing a temperature independent refresh frequency is presented. The periodic signal generating circuit includes a reference voltage generating unit and a periodic signal generating unit. The reference voltage generating unit produces a reference voltage which exhibits a variable voltage level in response to temperature. The periodic signal generating unit produces a periodic signal in response to a set voltage to determine the reference voltage and an oscillation period, wherein a transition timing of the set voltage is controlled by the reference voltage. As a result the periodic signal has a relatively constant period which can be produced regardless of the temperature variation.

Abstract: An oscillator that increases the accuracy of an output frequency, without using a charge pump, has an oscillation circuit, first and second voltage supply circuits, and a calibration value generation circuit. The first voltage supply circuit includes a resistor and a capacitor, the resistance and capacitance of which are determined so that a first voltage reaches a reference voltage within a reference time. The second voltage supply circuit includes first and second switching means, which perform switching when receiving pulse signals corresponding to the frequency of the oscillation circuit to raise the second voltage. A calibration value generation circuit provides the oscillation circuit with a calibration value that lowers the frequency when the second voltage reaches the reference voltage before the first voltage and raises the frequency when the second voltage reaches the reference voltage after the first voltage.

Abstract: Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

Abstract: A self-calibrating oscillator that increases the output frequency accuracy without using a charge pump includes an oscillation circuit, a pulse counter, a charging circuit, a reset circuit, a calibration circuit, and a timing control unit. The pulse counter counts a pulse signal having frequency f0 from the oscillation circuit based on a count start signal provided from the timing control unit, while providing an output signal to the charging circuit. The charging circuit connects a constant current source and capacitor when provided with the output signal to raise the voltage at the connection node. The calibration circuit provides the oscillation circuit with a calibration value for increasing the frequency if the voltage when the output of the output signal ends is higher than a high potential reference voltage and provides a calibration value for lowering the frequency if this voltage is lower than a low potential reference voltage.

Abstract: A relaxation oscillator includes a capacitor connected to a comparator input, current sources switched to supply power to the capacitor based on an output of the comparator, and a duplicate integrator shifting a voltage on the capacitor to offset a propagation delay through the comparator. The duplicate integrator includes current sources and a capacitor matching and switched in tandem with those within the relaxation oscillator, plus an additional current source, and is selectively switched into connection with the comparator input. By canceling the comparator propagation delay, the oscillator output frequency can be stably controlled through selection of resistive and capacitive values, using cheaper technology and tolerating large temperature, voltage and process variations.

Abstract: A frequency-jittering apparatuses includes an oscillator and a frequency control circuit. The oscillator generates a signal. When the magnitude of the signal exceeds a magnitude of a reference signal, the oscillator operates substantially in a first state; and when the magnitude of the signal is lower than the magnitude of the reference signal, the oscillator operates substantially in a second state different from the first one. The frequency control circuit varies the reference signal to change the frequency of the signal output from the oscillator.

Abstract: A temperature compensated CMOS RC oscillator circuit changes the source-bulk voltage to stabilize the MOSFET's threshold voltage variation over temperature using a resistor and temperature-correlated bias current. The MOSFET's source is connected to ground through a resistor. This temperature-correlated bias current also runs through this resistor. When temperature increases, the bias current also increases, which increases the MOSFET's source-bulk voltage. The increased source-bulk voltage helps to stabilize the threshold voltage of MOSFET at high temperature. A power saving logic is also embedded in this oscillator to achieve higher frequency at lower power consumption. In the present invention, there is no high gain op amp or high speed comparator, which makes the resultant oscillator to be low power design and which can be integrated into a single chip with other system.

Abstract: An oscillator circuit according to the invention comprises an oscillator with a toggle circuit having an output and an inverting input, whereby the output is connected to the inverting input via a feedback resistor, the inverting input is connected, for example, to the ground, via a first oscillator capacitor, and also connected, for example, to the ground, via a second oscillator capacitor and via a control resistor whose value can be adjusted or electrically controlled, so that the frequency of the oscillator can be varied by increasing or decreasing the value of the control resistor. In order to control the value of the control resistor, preferably a modulated 1-bit signal is used that is integrated by an integrator. Preferably, the oscillator is an integral part of a closed-loop control circuit in which the frequency of the oscillator forms the actual value and a predefined target frequency forms the target value.

Abstract: Systems and methods are provided for determining the value of a capacitance. A system for sensing capacitance comprises an oscillator arrangement comprising a plurality of oscillators and a mismatch compensation arrangement coupled between the oscillator arrangement and a first capacitive element having a first capacitance. The mismatch compensation arrangement is configured to selectively couple the first capacitive element to a respective oscillator of the plurality of oscillators, wherein an oscillation frequency of the respective oscillator is influenced by the first capacitance.

Abstract: A failsafe oscillator monitor and alarm circuit receives clock pulses from an external oscillator that if a failure thereto occurs, the failsafe oscillator monitor and alarm circuit will notify a digital processor of the external oscillator failure. The failsafe oscillator monitor and alarm circuit is a very low current usage circuit that charges a storage capacitor with clock pulses from the external oscillator when functioning normally and discharges the storage capacitor with a constant current sink if the external oscillator stops functioning. When the voltage charge on the storage capacitor becomes less than a reference voltage an alarm signal is sent to the digital processor for exception or error handling of the failed external oscillator.

Abstract: The relaxation oscillator includes a comparator and a latch. The comparator includes a comparator output and a comparator input that is configured to receive a first input signal in response to a first signal and configured to receive a second input signal in response to a second signal. The latch includes a latch-set input that is configured to be coupled to the comparator output in response to a third signal, a latch-reset input that is configured to be coupled to the comparator output in response to a fourth signal and a latch output that is configured to output the second signal. The relaxation oscillator is configured to achieve an approximately fifty percent duty cycle without requiring the use of a second comparator.

Abstract: An oscillator circuit generates a constant delay time by use of a current source and a load element to determine a frequency of a clock. The oscillator circuit includes an integrator which integrates the clock, a first comparator which compares an output voltage of the integrator with a reference voltage, and a variable current source which changes a current in accordance with the comparison result of the first comparator. The frequency is corrected in accordance with the current of the variable current source.

Abstract: The disclosed current-controlled hysteretic oscillator operates by controlled currents opposing each other in differential pairs to set a controlled hysteresis for improved relaxation oscillations with immunity to phase or frequency error.

Abstract: A system may include a first circuit configured to generate a first clock having a first period of oscillation, and a second circuit configured to generate a second clock having a second period of oscillation, where the difference (?T) between the first period of oscillation and the second period of oscillation remains within a specified limit even during variations in temperature and/or during variations in the supply voltage. The system may further include a control circuit, which may receive the first clock and the second clock, and adjust, according to ?T, a first target parameter corresponding to a first number of cycles of the first clock, when a current cycle count of the second clock reaches a second target parameter corresponding to a second number of cycles of the second clock.

Abstract: A constant determination unit (90) determines various constants, that are the magnitude of a charge current outputted from a charge pump circuit (30), the time constant of a loop filter (40), and the gain of a voltage controlled oscillator (50), so as to make the proportionality constant of a natural frequency of a phase locked loop circuit for the input frequency of the phase locked loop circuit and the damping factor to be predetermined values, and outputs various control signals based on the determined constants. The charge pump circuit (30), the loop filter (40), and the voltage controlled oscillator (50) modify the magnitude of the charge current, the time constant, and the gain, respectively, in accordance with control signals outputted from the constant determination unit (90).

Abstract: A signal generating circuit and method are disclosed that do not require a phase-locked-loop and a low frequency temperature-stable oscillator. The method may include generating an oscillating output signal responsive to a feedback signal, where the feedback signal controls a frequency of the oscillating output signal, generating a current output signal having a magnitude corresponding to the frequency of the oscillating output signal, and then comparing the current output signal to a reference signal to generate the feedback signal. The signal generating circuit may include an oscillator circuit responsive to a feedback signal and a frequency-to-current conversion circuit configured to generate a frequency dependent current signal that is compared to a reference current to generate an output signal corresponding to the frequency of the oscillating output signal. A feedback conversion circuit compares the output signal with a reference signal to generate the feedback signal to the oscillator circuit.

Abstract: A disclosed current source circuit includes a current mirror circuit having two enhancement-type MOS transistors, a depletion-type MOS transistor configured to be connected to a drain of one of the two enhancement-type MOS transistors and to function as a constant current source, and a resistor configured to have a negative temperature property and be connected to a source of the one of the two enhancement-type MOS transistors.

Abstract: An embodiment for low power-consumption RC oscillator is disclosed. A voltage transforming unit transforms a power supply voltage to an internal voltage. A current mirroring unit is coupled to the voltage transforming unit and receives the internal voltage to provide constant two current outputs with different phases. A current charging/discharging unit includes first and second nodes to receive the two constant current outputs of the current mirroring unit, wherein first and second capacitors are coupled to the first and second nodes, respectively. The first and second capacitors are charged by the two constant current outputs. A voltage sensing and outputting unit is coupled to the first and second nodes, senses voltage levels of the first and second nodes and outputs clock signals when one of the sensed voltage levels is greater than a logic threshold. A pulse generating unit generates pulse signals in response to the clock signals.

Abstract: Disclosed is an oscillator including a reference voltage generator generating a reference voltage, and a logic combination circuit generating complementary first and second internal clock signals in response to the reference voltage and complementary first and second output voltages. One of the first and second output voltages—the one going high—is provided to the logic combination circuit before the other one of the first and second output voltages—the one going low.

Abstract: A first comparator compares an output voltage Vout appearing at a capacitor with a maximum threshold voltage Vmax. A second comparator compares the output voltage Vout with a minimum threshold voltage Vmin. An edge detection circuit detects an edge of a synchronization signal SYNC having approximately ½ of frequency of the output voltage Vout and outputs an edge detection signal SE. A charge-discharge control unit refers to the first and the second comparison signal, and sets the charge-discharge circuit to a discharging state when the output voltage Vout becomes higher than the maximum threshold voltage Vmax and sets the charge-discharge circuit to a charging state when the output voltage Vout becomes lower than the minimum threshold voltage Vmin. When the edge signal SE becomes the predetermined level, the charge-discharge control unit switches the charging state and the discharging state of the charge-discharge circuit.

Abstract: The invention discloses a programmable voltage-controlled oscillator. The programmable voltage-controlled oscillator has an output frequency. The programmable voltage-controlled oscillator includes a control unit, a current selector, a current mirror unit, an oscillator module, and a one-time-programming component. The one-time-programming component is used for providing a programmable code. The current selector is used for generating a selected current according to the programmable code. The current mirror unit is used for generating a first mirroring current and a second mirroring current according to the selected current. The oscillator module is used for oscillating according to the first mirroring current and the second mirroring current. After the programmable code is tuned to drive the output frequency to approach a predetermined frequency, the control unit will burn the tuned programmable code into one-time-programming component.

Abstract: This oscillation circuit includes a triangular wave generation circuit that generates a triangular wave signal corresponding to an outputted clock signal, a comparison circuit that generates a clock signal corresponding to a comparison of the triangular wave signal with a first reference voltage and a second reference voltage, a current adjusting circuit that adjusts the value of adjusted current according to the power supply voltage for the comparison circuit, and a reference voltage generation circuit that generates the first reference voltage and the second reference voltage having a voltage differential that corresponds to the value of the adjusted current. The current adjusting circuit increases the adjusted current when the power supply voltage for the comparison circuit rises, and reduces the adjusted current when the power supply voltage drops.

Abstract: There is provided a frequency-variable oscillator that varies, even when a frequency of an input signal is varied, a frequency of an oscillation signal according to the varied frequency of the input signal. The frequency-variable oscillator includes: a voltage-to-current converter circuit for converting a voltage level of an input signal into a current level within a predetermined range; and an oscillator circuit for varying a frequency according to the current level from the voltage-to-current converter circuit and oscillating the varied frequency.

Abstract: A charging and discharging circuit of a triangular wave oscillation circuit includes an inverter circuit; a discharging reference potential generating circuit; a first NMOS transistor having a drain connected with a connection point between a first current source circuit and the capacitor, and a gate connected with the discharging reference potential generated by the discharging reference potential generating circuit; a second NMOS transistor having a gate inputted with the switching signal through the inverter circuit, a drain connected with the gate of the first NMOS transistor, and a source connected with a source of the first NMOS transistor; and a third NMOS transistor having a gate inputted with the switching signal, a drain connected with a connection point between the source of the first NMOS transistor and the source of the second NMOS transistor, and a source grounded.

Abstract: An integrated oscillator (10), for an integrated circuit, comprises i) first (CI1) and second (CI2) compensated inverters mounted in series and each comprising first (PI11;PI21) and second (PI12;PI22) plain inverters mounted in parallel and comprising transistors having channel lengths respectively shorter and longer than an optimal channel length, the first compensated inverter (CI1) having input and output terminals respectively connected to first (N1) and second (N2) nodes and the second compensated inverter (CI2) having input and output terminals respectively connected to the second node (N2) and to a third node (N3), ii) a resistor (R) having a chosen resistance value and comprising first and second terminals connected respectively to the first (N1) and second (N2) nodes, and iii) a capacitor (C) comprising first and second terminals connected respectively to the first (N1) and third (N3) nodes, and having a chosen capacitance value to charge and discharge oneself in order to periodically deliver a clock

Abstract: An oscillator utilizes two current sources that have the same temperature and VDD dependency so they generate the same current in changing conditions. Therefore, there is very low VT dependency. The resistor and fringe capacitor temperature coefficient are very low and opposite so they compensate for each other. A comparator with a short period of operation also minimizes VT dependency.

Abstract: Apparatus includes a single-pin input interface, which is operative to sense a voltage across a capacitor of a Resistor-Capacitor (RC) network in which the capacitor is repetitively charging and discharging so that the voltage oscillates as a function of time. A measurement circuit is coupled to measure time durations in which the capacitor is charging and in which the sensed voltage lies between first and second predefined thresholds. A clock generation circuit is coupled to generate an output clock signal having a frequency, and to adjust the frequency responsively to the measured time durations.

Abstract: A voltage reference connects to a voltage-to-current converter to generate a reference current dependent on the reference voltage. Outputs of a toggle-type flip flop connect to switching transistors controlling the reference current charging capacitors. The toggling of the flip-flop is controlled by comparing the capacitor voltages to the reference voltage, such that the toggle frequency is proportional to the time charging the capacitors. Optionally, temperature compensation data, representing a magnitude and direction rotation of the frequency versus temperature characteristic is stored and, based on a sensed temperature, retrieved to modify the reference current.

Abstract: An oscillator includes a first comparator circuit, a second comparator circuit, an oscillation signal generator circuit, and a frequency voltage generator circuit. The first comparator circuit generates a first pulse when a frequency voltage reaches a first reference voltage, and the second comparator circuit generates a second pulse when the frequency voltage reaches a second reference voltage. The oscillation signal generator circuit generates an oscillation signal by latching a first voltage in response to the first pulse and latching a second voltage in response to the second pulse. The frequency voltage generator circuit raises or lowers the frequency voltage in response to the oscillation signal. The driving capability of the first comparator circuit is reduced at the latching of the first voltage and is restored at the latching of the second voltage.

Abstract: A relaxation oscillator compensates for system delay. The relaxation oscillator includes first and second input signal units that generates first and second capacitor voltages, a delay compensation unit that receives a reference voltage and the first and second capacitor voltages and that generates a compensation voltage. In certain embodiments, a voltage generating unit applies the reference voltage to the delay compensation unit, and a latch unit stores first and second comparison signals compared by the first and second input signal units and transmits a clock signal and a inverted clock signal to the first and second input signal units. The first and second input signal units compare the first and second capacitor voltages with a compensation voltage transmitted from the delay compensation unit.

Abstract: In the many microelectronics applications, delays present in circuitry can affect both the design and the function of the circuitry. One example of delays impacting the function of a circuit is a relaxation oscillator, where delays present in comparator circuits and latches can cause its frequency to vary beyond desired ranges. Here, a relaxation circuit with delay compensation is described.

Abstract: Disclosed herein is a relaxation oscillator using a spintronic device. The relaxation oscillator includes a power source unit, a spintronic device, and a capacitor. The power source unit applies power. The spintronic device is driven by the power applied by the power source unit, and has a variable voltage value depending on the intensity of a magnetic field. The capacitor is connected in parallel with the spintronic device, and is discharged when it assumes a minimum-voltage value in the threshold voltage range of the spintronic device and charged when it assumes a maximum voltage value in the threshold voltage range.

Abstract: A low temperature coefficient oscillator including a current generator, a first and a second voltage generator, an amplifier, a resistor, a switch, a capacitor and an oscillating unit is provided. The current generator generates a first through a fourth current according to a control signal. The first voltage generator generates a first voltage according to the first current. The second voltage generator generates a second voltage according to the second current and a frequency signal. The amplifier generates the control signal according the first and second voltages. The resistor is coupled between a first terminal of the switch and ground, and a first terminal thereof receives the third current. The switch is conducted or not according the frequency signal. The capacitor is coupled between a second terminal of the switch and ground. The oscillating unit generates the frequency signal according to the fourth current and a voltage of the capacitor.

Abstract: There is provided a frequency-variable oscillator that varies, even when a frequency of an input signal is varied, a frequency of an oscillation signal according to the varied frequency of the input signal. The frequency-variable oscillator includes: a voltage-to-current converter circuit for converting a voltage level of an input signal into a current level within a predetermined range; and an oscillator circuit for varying a frequency according to the current level from the voltage-to-current converter circuit and oscillating the varied frequency.

Abstract: An oscillator is disclosed. The oscillator includes a first capacitor. The oscillator also includes a second capacitor. The oscillator further includes a first current source. The oscillator also includes a second current source. The oscillator further includes a comparator that has a first input and a second input. The oscillator also includes a reference node. The oscillator further includes a controller that is configured to selectively couple the first current source to the first capacitor and the second current source to the reference node during a first time period.

Abstract: Widening the frequency range without increasing the power consumption. Current circuits output charge current based on control current. Capacitors are provided in association with the current circuits and store the charge current. Discharge transistors are provided in association with the capacitors and cause the capacitors to discharge electric charge. On-off transistors are connected between the current circuits and the capacitors and open or close the paths between the current circuits and the capacitors in accordance with the voltages across the capacitors. Signal output transistors have their gates connected between the current circuits and the on-off transistors and output signals to a flip-flop in accordance with the charge current. The flip-flop drives the discharge transistors alternately in accordance with the signals.

Abstract: In one embodiment, an oscillator circuit is configured to oscillate at a base frequency. The oscillator is configured to receive a synchronization signal and restart a period of the oscillator signal responsively to the synchronization signal.

Abstract: A digital controlled oscillator including a programmable current source, a first variable capacitor and a second variable capacitor. A comparator compares the voltage across the variable capacitors with a reference voltage level and generates a DCO output clock signal. A switching means alternately switches the variable capacitors to either charge from a programmable current source or discharge in response to an output signal of the comparator. A clock divider divides the DCO output clock signal by a factor N substantially greater than 1. A frequency monitor receives the divided clock signal, determines the time difference of successive clock periods of the divided clock signal and generates a feedback signal to adapt the frequency of the DCO output clock signal.

Abstract: A power amplifier including a loop filter, a frequency generator, a quantizer, and an output stage module is provided. The frequency generator outputs a signal with a reference frequency to the loop filter, and includes a logic circuit, a current array, and a dummy load. The dummy load representing a load circuit in the loop filter is coupled to the current array. An equivalent impedance of the dummy load is proportioned to an equivalent impedance of the load circuit. The current array outputs the signal and a dummy signal to the loop filter and the dummy load, respectively, according to a logic signal. By using the frequency generator to modulate the frequency automatically, an impact on the power amplifier caused by passive devices therein due to process variationscan be reduced.

Abstract: According to some embodiments, a process, voltage, and temperature compensated clock generator is disclosed. The clock generator may be a charge-charge clock generator including a first load capacitive element and a second load capacitive element. A process, voltage, and temperature compensated current source is coupled to the charge-charge clock generator, and is used to charge the first load capacitive element and the second load capacitive element.

Abstract: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. The input signal is fed to a synthesizer timed to a rational multiplier of the RF frequency L/N fRF. The clock signal generated is divided by a factor Q to form 2Q phases of the clock at a frequency of L(N*Q)fRF, wherein each phase undergoes division by L. The phase signals are input to a pulse generator which outputs a plurality of pulses. The pulses are input to a selector which selects which signal to output at any point in time. By controlling the selector, the output clock is generated as a TDM based signal. Any spurs are removed by an optional filter.

Abstract: Oscillator devices and methods of operating such oscillator devices are disclosed. The oscillator devices include a current source, and an oscillation module to provide a clock signal. The frequency of the clock signal depends on the relationship between a threshold voltage of a transistor at the oscillation module and the current level provided by the current source. The transistor at the oscillation module is matched to a transistor at the current source so that the frequency of the clock signal is relatively insensitive to changes in device temperature.

Abstract: Techniques for voltage controlled oscillator (VCO) circuits that are independent of temperature and process variations are described herein.

Abstract: An oscillator structure has a sync signal processor with an input interface for an external clock based sync signal and an output interface for a duty cycle indication signal depending on a signal property of the sync signal and an oscillator with an input interface for the duty cycle indication signal and the sync signal and an output interface for an oscillation signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal.

Abstract: The present invention relates to a control method for the operation modes of an oscillator and the apparatus thereof, for which the method and the apparatus can be applied to the electronic circuits with multi-operation modes of the oscillator so as to correctly choose the desirable oscillator operation mode. Furthermore, an oscillator checking circuit sets up the oscillation mode automatically and judges if the oscillator operates properly. Hence, there is no need for the user to set up the oscillator operation mode manually.

Abstract: A method and apparatus for detecting capacitive devices are disclosed. A circuit including two circuit paths is connected to an oscillator voltage source. Connecting a test capacitive device to a path of the circuit modifies the electric potential waveform at a point along the path. Passing the first circuit path through a reference comparator and the second circuit path through a phase-shifting comparator produces two output signals that are phase-shifted with respect to each other when the test capacitive device is functional. Analysis of the output signals allows detection or measurement of the test capacitive device.

Abstract: An oscillator operates at a very low voltage yet has a duty cycle that is set by a ratio of capacitors that are charged and discharged. Sub-threshold p-channel transistors conduct sub-threshold currents below the normal threshold voltage, and drive set and reset inputs of a set-reset S-R latch. The S-R latch drives the oscillator outputs. The oscillator outputs feed back to charging p-channel transistors that charge one plate of the capacitors. During half of the cycle, the charging p-channel transistor is off, allowing one plate of the capacitors to discharge through an n-channel discharge transistor. After a period of discharge determined by the capacitance of the capacitor, the gate of a sub-threshold p-channel transistor falls enough for sub-threshold current to flow, triggering the set or reset input of the S-R latch. Since sub-threshold currents are needed to toggle the S-R latch, the oscillator begins to oscillate below the threshold voltage.

Abstract: A frequency jittering circuit modulates a hysteretic band of an oscillator such that the clock generated by the oscillator has a jitter frequency, and thus a switching mode power supply operative on the clock will have a jittering switching frequency.

Abstract: In the many microelectronics applications, delays present in circuitry can affect both the design and the function of the circuitry. One example of delays impacting the function of a circuit is a relaxation oscillator, where delays present in comparator circuits and latches can cause its frequency to vary beyond desired ranges. Here, a relaxation circuit with delay compensation is described.