Frequency Stabilization Patents (Class 331/175)
  • Patent number: 7602255
    Abstract: A feedback loop, such as a phase-locked loop, on an integrated circuit has a detector, a charge pump, and a loop filter. The charge pump adjusts its output current in response to variations in a process of the integrated circuit to reduce variations in the loop bandwidth. The charge pump also adjusts its output current in response to variations in a resistance of a resistor in the loop filter to reduce variations in the loop bandwidth. The charge pump can also adjust its output current in response to variations in a temperature of the integrated circuit to reduce variations in the loop bandwidth. A delay-locked loop on an integrated circuit has a phase detector and a charge pump. The charge pump adjusts its output current in response to variations in the temperature and the process of the integrated circuit to reduce changes in the loop bandwidth.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: October 13, 2009
    Assignee: Altera Corporation
    Inventors: Kang-Wei Lai, Ninh D. Ngo, Kazi Asaduzzaman, Mian Z. Smith, Wanli Chang, Tim Tri Hoang
  • Patent number: 7570125
    Abstract: An ocscillator circuit having: a) a piezoelectric crystal connected to a surface; b) a variable frequency generator for generating a driving signal which is supplied to the crystal to cause the crystal to oscillate, thereby causing the surface to oscillate; and, c) an analyser for monitoring the phase shift between the voltage across the crystal and the current flowing through it and, in response generating an adjustment signal which relates to the difference between the oscillation frequency and a resonant frequency of the crystal, the variable frequency generator being responsive to the adjustment signal to vary the frequency of the driving signal to cause the crystal to oscillate at the resonant frequency.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: August 4, 2009
    Assignee: Akubio Limited
    Inventors: Victor Petrovich Ostanin, Alexander Sleptsov
  • Patent number: 7561001
    Abstract: An electronic circuit device includes a negative resistance generating circuit, a second transistor and a path. The negative resistance generating circuit has a first transistor having a control terminal coupled to a resonator. The second transistor has a control terminal coupled to an output terminal of the first transistor and has an output terminal coupled to a DC bias terminal. The path is coupled to between the DC bias terminal and an output terminal of the first transistor through the second transistor and provides a bias to the first transistor.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: July 14, 2009
    Assignee: Eudyna Devices Inc.
    Inventors: Tsuneo Tokumitsu, Osamu Baba
  • Patent number: 7557669
    Abstract: An object of the present invention is to provide a voltage controlled oscillator in a microwave band without narrowing the variable frequency range and having improved phase noise characteristics. This invention is a voltage controlled oscillator in the microwave band which controls an oscillation frequency by a varactor diode, a varactor diode circuit in which a plurality of series-connected circuits having the varactor diode and a capacitance connected in series are connected in parallel and the varactor diodes include at least one or more GaAs varactor diodes of the HyperAbrupt type and at least one or more Si varactor diodes of the Abrupt type.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: July 7, 2009
    Assignee: NEC Corporation
    Inventor: Seiichi Ito
  • Patent number: 7548122
    Abstract: A system and method of operating a phase-locked loop frequency synthesizer is disclosed herein. The disclosed method includes defining a first set of operating parameters applicable to operation of a phase-locked loop of the synthesizer in a first mode and defining a second set of operating parameters applicable to operation of the phase-locked loop in a second mode. A first detection signal is generated so as to initiate transition of the phase-locked loop into the second mode. The method further includes configuring, at least in part in response to the first detection signal, the phase-locked loop to operate in accordance with the second set of operating parameters.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: June 16, 2009
    Assignee: Sequoia Communications
    Inventors: John B. Groe, Paul Lawrence Viani
  • Patent number: 7545228
    Abstract: A method for generating a temperature-compensated timing signal that includes counting, within an update interval, a first number of oscillations of a first micro-electromechanical (MEMS) resonator, a second number of oscillations of a second MEMS resonator and a third number of oscillations of a digitally controlled oscillator (DCO), computing a target DCO count based on the first number and second number of oscillations, computing a loop error signal based on the target DCO count and the third number of oscillations, and modifying an output frequency of a temperature-dependent (DCO) timing signal based on the loop error signal. The duration of the update interval may also be modified based on temperature conditions, and the update interval may also be interrupted and the output frequency immediately adjusted, if a significant temperature change is detected. Thus, dynamic and precise temperature compensation is achieved that accommodates constant, slowly changing, and rapidly changing temperature conditions.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: June 9, 2009
    Assignee: SiTime Inc.
    Inventors: Crist Lu, Erno Klaassen, Sathi Perumal
  • Patent number: 7532079
    Abstract: Embodiments feature techniques and systems for digitally tuning a crystal oscillator circuit. In one aspect, embodiments feature a method for making a digitally tuned crystal oscillator circuit. The method involves receiving a multi-bit input signal into a digital modulator, modulating the multi-bit input signal with the digital modulator by oversampling or by noiseshaping and oversampling to produce a digitally-modulated output signal having a lower number of bits than the multi-bit input signal. The method also involves coupling a tuning capacitor with the crystal oscillator circuit, and coupling the digitally-modulated output signal from the digital modulator to the crystal oscillator circuit and the tuning capacitor. In some embodiments, the digital modulator can a delta-sigma modulator, a noiseshaping modulator, a delta modulator, a pulse width modulator, a differential modulator, or a continuous-slope delta modulator.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: May 12, 2009
    Assignee: NanoAmp Solutions, Inc. (Cayman)
    Inventors: David H. Shen, Ann P. Shen
  • Patent number: 7528670
    Abstract: Disclosed herein is a sine wave oscillator having a self-startup circuit. The sine wave oscillator can start up and output sine waves having a constant frequency without receiving any signals other than supply voltage. The sine wave oscillator includes an operational amplification unit, a first resistor, a first capacitor, a second capacitor, a second resistor, a third resistor, a fourth resistor, and a startup circuit.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: May 5, 2009
    Assignee: Luxen Technologies, Inc.
    Inventor: Myung Jin Soh
  • Patent number: 7522009
    Abstract: An oscillation stabilization detecting circuit comprises a T flip flop receiving a pulse-type oscillation signal generated by oscillating a crystal oscillator and then dividing the oscillation signal to output; a pulse control unit including inverters and transistors, the pulse control unit converting the signal output from the T flip flop into a pulse-type signal starting from a high level and then outputting the converted signal; and an oscillation stabilization detecting unit including a capacitor charged with the signal output from the pulse control unit; and a plurality of transistors. The oscillation stabilization detecting unit controls charging time of the capacitor by adjusting a bias current and, after the charging time passes, outputs a stabilization signal to a CPU, the stabilization signal representing that the oscillation signal is stabilized.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: April 21, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yong Il Kwon, Myeung Su Kim, Tah Joon Park
  • Publication number: 20090096542
    Abstract: A frequency stabilizing device of an oscillator is disclosed. The frequency stabilizing device of an oscillator is used for stabilizing the frequency of an oscillator to keep the frequency in constant when input voltage is changed. The frequency stabilizing device comprises a plurality of transmission gates for receiving an input voltage and generating a current and a plurality of resistors for control the value of the current, wherein the current is positive in relation to the input voltage and the frequency of the oscillator is determined by the current.
    Type: Application
    Filed: June 26, 2008
    Publication date: April 16, 2009
    Inventor: Shiun-Dian JAN
  • Publication number: 20090081984
    Abstract: A frequency synthesizer includes: a frequency source generating a reference signal that includes a plurality of pulses having periodicity based on a reference frequency; a feedback loop that includes, a phase detector circuit, a loop filter, a controlled oscillator that generates an output signal at an output, and a loop divide circuit; a non-linear circuit element at an input of the phase detector circuit, which generates intermodulation distortion that causes at least one spurious signal at the output; and a controller controlling the loop divide circuit and the non-linear circuit element. The frequency synthesizer further includes a dither circuit that adjusts the timing of some of the pulses of the reference signal based on a parameter provided by the controller to the non-linear circuit element, thereby, providing a jittered reference signal to the non-linear circuit element for attenuating the at least one spurious signal at the output.
    Type: Application
    Filed: September 25, 2007
    Publication date: March 26, 2009
    Applicant: MOTOROLA, INC.
    Inventors: PAUL H. GAILUS, JOHN J. BOZEKI, JOSEPH A. CHARASKA, VADIM DUBOV, MANUEL P. GABATO, JR., ARMANDO J. GONZALEZ
  • Publication number: 20090072915
    Abstract: A small light-weight battery operated calibrator device provides a precise sine wave output for use in calibration of test equipment, such as a RF Power Meter or a Spectrum Analyzer. The calibration device includes two power levels, one ?40 dBm and one 0 dBm. The purpose of the two power levels is to obtain a slope and offset for correction of the RF power measuring device being calibrated. Operation indication LED lights are provided to indicate which of the two powers are in use, and if battery power is below acceptable levels. Miniature low power components including a crystal oscillator and a divide by 2 integrated circuit that generates a precise square wave and a low pass filter for converting the square wave into a precise sine wave allows the calibrator to be battery operated and stored as a calibration component.
    Type: Application
    Filed: September 17, 2007
    Publication date: March 19, 2009
    Applicant: ANRITSU COMPANY
    Inventor: Donald Anthony Bradley
  • Publication number: 20090066432
    Abstract: A PLL circuit includes a phase detector, a loop filter (LF), a voltage-controlled oscillator (VCO), and a frequency divider. The phase detector compares a phase of a signal Fs which is input from outside with a phase of a signal Fo/N which is input from the frequency divider. The loop filter generates a signal Vin by removing alternating current components from a signal input from the phase detector. The voltage-controlled oscillator outputs a signal Fo based on the signal Vin input from the loop filter. The frequency divider converts the signal Fo output from the voltage-controlled oscillator into Fo/N (frequency division by N), and outputs it to the phase detector.
    Type: Application
    Filed: April 24, 2006
    Publication date: March 12, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Takeshi Osada
  • Patent number: 7502602
    Abstract: Briefly, according to embodiments of the invention, there is provided a method and an apparatus to compensate for a closed loop response error of a transfer function of a phase locked loop unit.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: March 10, 2009
    Assignee: Intel Corporation
    Inventor: Guy Wolf
  • Publication number: 20090058548
    Abstract: In one embodiment, a signal control system has a signal output and includes: 1) a phase-locked loop (PLL) having a voltage-controlled oscillator (VCO), a phase error detector, an oscillating output coupled to the signal output of the signal control system, and a programmable frequency divider coupled in a feedback path between the oscillating output and the phase error detector; 2) at least one automatic level controller (ALC), coupled to the oscillating output; and 3) a plurality of switchable integrators, including first and second switchable integrators that are respectively coupled between the phase error detector and the VCO, and in the at least one ALC. Each of the switchable integrators is switchable between a narrow bandwidth mode that provides for stable operation of the signal control system, and a wide bandwidth mode that enables fast signal transitions at the signal output.
    Type: Application
    Filed: August 31, 2007
    Publication date: March 5, 2009
    Inventors: Paul A. Lameiro, Michal B. Krombholz, Michael S. Foster, Jeffrey E. Nelson, Stephen T. Sparks
  • Patent number: 7498885
    Abstract: A voltage controlled oscillator includes at least one input port for receiving a control voltage and at least one voltage-to-current coupled to the input port for generating a control current in response to the control voltage. At least one current controlled oscillator generates an oscillating frequency output in response to the control current. At least one compensation branch is coupled to the voltage-to-current converter for generating a compensation current that increases the control current when the control voltage exceeds a predetermined value.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: March 3, 2009
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Mu-Jen Huang
  • Patent number: 7498893
    Abstract: An oscillator circuit for generating a high-frequency electromagnetic oscillation, comprises:—an amplifier configuration with at least one input and at least one output,—an oscillator crystal connected to at least one of the outputs of the amplifier configuration,—a bandpass filter configuration, which is connected, with at least one input, to the oscillator crystal and the at least one output of the amplifier configuration connected to the oscillator crystal, and back coupled, with at least one output, to the input, or at least one of the inputs, of the amplifier configuration.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: March 3, 2009
    Assignee: NXP B.V.
    Inventor: Andreas Koellmann
  • Patent number: 7498891
    Abstract: To calibrate an oscillator for microcontroller chip operation, an RC circuit is coupled to the microcontroller circuitry and a voltage signal is applied to the capacitor for changing the voltage across the capacitor. The voltage value across the capacitor is measured and compared to an expected voltage value. Adjustments to the frequency of the clock signal generated by the oscillator are made in response to the comparison.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: March 3, 2009
    Assignee: STMicroelectronics Pvt. Ltd.
    Inventor: Vikas Manocha
  • Publication number: 20090051444
    Abstract: An integrated circuit device including: an oscillation circuit that generates a first clock signal; a frequency comparison section that compares a frequency of the first clock signal with a frequency of a second clock signal; and a clock signal generation section that generates a third clock signal based on the first clock signal. The clock signal generation section corrects a frequency of the third clock signal to be a value within a predetermined range based on the comparison result. For example, the frequency comparison section counts a predetermined period based on the first clock signal, the predetermined period being defined based on the second clock signal, and the clock signal generation section generates the third clock signal by dividing the frequency of the first clock signal based on the count result.
    Type: Application
    Filed: August 20, 2008
    Publication date: February 26, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Katsumi INOUE
  • Patent number: 7492228
    Abstract: An apparatus for compensating for variations in loop gain of a phase locked loop as a function of frequency, comprising a correction calculator for introducing a loop gain correction as a function of target frequency of a oscillator controlled by the phase locked loop.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: February 17, 2009
    Assignee: MediaTek Inc.
    Inventor: Jonathan Richard Strange
  • Patent number: 7489206
    Abstract: A high-frequency power device including: an oscillator; a high-frequency power supplier; a reflection coefficient calculator; a discharge signal output unit; and a frequency controller, wherein the frequency controller: instructs the oscillator to oscillate the oscillation signal at a first oscillation frequency for the period of time while a discharge signal is not in a state showing that the discharge has been commenced or in a state where the discharge is regarded as having been commenced; then instructs the oscillator to change the first oscillation frequency to a second oscillation frequency immediately after the discharge signal changes into the states; and then controls the oscillation frequency so that the absolute value is made small.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: February 10, 2009
    Assignee: Daihen Corporation
    Inventors: Hiroyuki Kotani, Hirotaka Takei, Ryohei Tanaka, Hiroshi Matoba
  • Patent number: 7486151
    Abstract: In a timer circuit of a semiconductor circuit including a current source driven by a power supply voltage, the current source outputs a current dependent on the power supply voltage, and outputs a reference voltage obtained when the power supply voltage is dropped by a predetermined drop voltage. A capacitor is charged with electric charges by the current outputted from the current source. The comparator compares a voltage across the capacitor with the reference voltage from the current source, and outputs an output signal when a voltage across the capacitor is equal to or higher than the reference voltage. The timer circuit outputs an output signal after a delay time, from a timing when supply of the power supply voltage is started, to a timing when the voltage across the capacitor rises substantially in proportion to an elapsed time by charging the capacitor and reaches the reference voltage.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: February 3, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Shinsuke Goudo
  • Patent number: 7474163
    Abstract: The invention relates to an electronic circuit comprising a first comparator having a first input offset voltage, wherein the first comparator is operatively coupled to a first sampling capacitor, a second comparator having a second input offset voltage, wherein the second comparator is operatively coupled to a second sampling capacitor, and a control circuit operatively coupled to the first comparator and the second comparator for generating alternate cycles having a first phase and a second phase, wherein a first sampled offset voltage is stored in the first sampling capacitor during the first phase of the alternate cycles, wherein the first sampled offset voltage is subtracted from the first input offset voltage during the second phase of the alternate cycles, wherein a second sampled offset voltage is stored in the second sampling capacitor during the second phase of the alternate cycles, and wherein the second sampled offset voltage is subtracted from the second input offset voltage during the first phas
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: January 6, 2009
    Assignee: Sensor Platforms, Inc.
    Inventors: Don Wile, Dave Huffman
  • Patent number: 7474162
    Abstract: An RC oscillator circuit is disclosed. The RC oscillator circuit includes a current generator configured to generate a charge current. The RC oscillator circuit also includes an integrator having an input and an output, the input being connected to the current generator. The RC oscillator circuit also includes a comparator having a first input, a second input, and an output, the first input being connected to the output of the integrator and the second input being configured to supply a reference threshold. The RC oscillator circuit also includes a clock pulse generator connected to the output of the comparator and a reference generator configured to generate the reference threshold based on a supply voltage of the RC oscillator circuit.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: January 6, 2009
    Assignee: Austriamicrosystems AG
    Inventors: Paolo D'Abramo, Riccardo Serventi
  • Patent number: 7456700
    Abstract: A system for comparing, measuring, or providing a reference signal based on a oscillator having variable loop gain is described. Only when the oscillator loop gain is at least the value of one does the oscillator produce an AC output signal. The oscillator's ability to oscillate is controlled by the one or more sensor/transducer input signal levels. In some cases, negative feedback of the AC output signal is also used to control the loop gain of the oscillator circuit keeping the loop gain at or close to the value of one. The system's output signal indicates whether the oscillator is oscillating or not, or the AC signal level required to just maintain oscillation.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: November 25, 2008
    Inventor: Fred Mirow
  • Patent number: 7449968
    Abstract: Disclosed herein is a signal generation technique based on a reference frequency provided by a MEMS resonator. The signal generation technique compensates for temperature- and fabrication process-induced frequency variations collectively. In some embodiments, a device implementing the disclosed signal generation technique includes a fractional-N synthesizer, a temperature sensor, calibration data, and a sigma-delta modulator to adjust the reference frequency of the MEMS resonator to a desired frequency value while compensating for the temperature variation of the MEMS resonator.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: November 11, 2008
    Assignee: Discera, Inc.
    Inventors: Kenneth R. Cioffi, Didier Lacroix
  • Patent number: 7449969
    Abstract: A printed circuit board (PCB) includes a signal layer and a power layer. The signal layer includes a crystal oscillator pad, a clock generator pad, and two capacitor pads. The crystal oscillator pad is connected to the clock generator pad and the capacitor pads via two signal lines. The power layer is divided into two areas by a cut-off line, the two areas respectively having different voltages. The cut-off line is located at one side of the crystal oscillator pad and the clock generator pad.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: November 11, 2008
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Hai-Yun Zhang
  • Publication number: 20080266011
    Abstract: An oscillator signal stabilization method is provided for a radio transceiver, for example. In the present stabilization method, amplitude variation of a radio frequency oscillator signal generated by a frequency-adjustable oscillator signal generator is stabilized in an adaptive compensation circuit having adjustable compensation parameters. The stabilized oscillator signal is fed from the compensation circuit to one or more frequency dividers for frequency division. The compensation circuit is configured to stabilize signal variations caused by component non-idealities and, thereby, prevent undesired frequency division errors in the frequency dividers.
    Type: Application
    Filed: June 25, 2007
    Publication date: October 30, 2008
    Inventor: Vili P. Kuosmanen
  • Patent number: 7408416
    Abstract: A phase locked loop for outputting a high frequency signal by executing synchronization and frequency conversion based on an input signal includes a control-type oscillator, and a phase comparator circuit for comparing a phase of the input signal and a phase of an output signal from the control-type oscillator, and outputting and supplying a phase error signal to the control-type oscillator via a loop filter. The phase locked loop further includes a correction signal generating circuit for adding a high frequency component of the phase error signal outputted from the phase comparator circuit to the phase error signal as a correction signal. In accordance with this phase locked loop, the high frequency component of the phase error signal outputted from the phase comparator circuit is added to an output signal of a loop filter as the correction signal so that a flat frequency characteristic can be acquired over a broad band.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: August 5, 2008
    Assignee: Yokogawa Electric Corporation
    Inventor: Ryuta Tanaka
  • Patent number: 7405632
    Abstract: A voltage-controlled oscillator includes (i) a first variable-capacity element, (ii) a resonance circuit whose resonance frequency changes in accordance with a control voltage applied to the first variable-capacity element, (iii) a second variable-capacity element connected in parallel with the first variable-capacity element, (iv) resonance frequency range switching means which switches the variation range of the resonance frequency of the resonance circuit by switching the capacity of the second variable-capacity element, and (v) a resonance frequency correction circuit which corrects the resonance frequency in such a manner as to prevent the ratio between resonance frequencies before and after the switching of the variation range from depending on the control voltage.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: July 29, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yusuke Kishino
  • Patent number: 7398163
    Abstract: An object of the present invention is to provide a sensing instrument capable to detect a substance existing in a very small quantity, such as environmental pollutants, instantly with a high degree of precision. As a specific means for solving the problem, a frequency signal from a crystal oscillator is sampled using a frequency signal from a reference clock generating part, the sampling value is outputted in a digital signal, quadrature detection is conducted with the digital signal for a frequency signal corresponding to the output signal, the rotational vector rotating at a frequency corresponding to the difference between the frequency of the frequency signal and the frequency of a sinusoidal wave used for the quadrature detection is taken out, and the variation of the frequency is detected by detecting the velocity of the rotational vector based on the respective sampling values.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: July 8, 2008
    Assignees: Nihon Dempa Kogyo Co., Ltd., DSP Technology Associates, Inc.
    Inventors: Nobuo Tsukamoto, Kazuo Akaike, Tsukasa Kobata
  • Patent number: 7394324
    Abstract: In accordance with one aspect of the present invention, there is provided a method of calibrating an oscillator within a radio-frequency identification (RFID) circuit for use in an RFID tag. The oscillator has an oscillation frequency. A calibration value is stored within a non-volatile memory associated with the RFID circuit. The oscillator is calibrated in accordance with the calibration value. The storing of the calibration value includes recovering a reference frequency from a test signal supplied to the RFID circuit, calculating the calibration value to correspond to a difference between the recovered reference frequency and the oscillator frequency, and writing the calibration value to the non-volatile memory.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: July 1, 2008
    Assignee: Impinj, Inc.
    Inventors: Christopher J. Diorio, Vadim Gutnik, Todd E. Humes
  • Patent number: 7391273
    Abstract: The clock signal output device has a crystal oscillator for generating a reference clock signal and generating and outputting an output clock signal having a prescribed frequency on the basis of the reference clock signal. The device also has an atomic oscillator for generating a clock signal having higher precision than a crystal oscillator, an intermittent time management unit for intermittently driving the atomic oscillator, and a correction unit for receiving correction data for correcting the offset amount of the output clock signal on the basis of a clock signal each time the atomic oscillator is driven, and correcting the output clock signal on the basis of the correction data.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: June 24, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Shigeaki Seki, Katsutoyo Inoue
  • Patent number: 7391276
    Abstract: In an oscillation apparatus formed by a ring oscillator including an odd number of inverters (more than two inverters) connected in a ring, each of the inverters having one drive MOS transistor and one load MOS transistor, a constant voltage generating circuit is adapted to generate a constant voltage corresponding to a threshold voltage of the drive MOS transistor, and a voltage-to-current converting circuit is adapted to convert the constant voltage into load currents. Each of the load currents flows through the load MOS transistor of one of the inverters.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: June 24, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Makoto Sakaguchi
  • Publication number: 20080122548
    Abstract: Provided is an oscillator using a Schmitt trigger circuit, the oscillator including a constant current generating section that generates a current with a constant magnitude; a current mirroring section that is connected to the constant current generating section and mirrors the current generated by the constant current generating section; a control section that is connected to the current mirroring section and supplies or blocks the current applied through the current mirroring section; a capacitor of which one end is connected to the control section and the other end is grounded, the capacitor being charged with a current supplied by the control section; a Schmitt trigger circuit that receives the voltage charged in the capacitor so as to output a high- or low-level voltage; and a voltage delay section that is connected to the Schmitt trigger circuit and delays the voltage output by the Schmitt trigger circuit to output.
    Type: Application
    Filed: November 19, 2007
    Publication date: May 29, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ha Woong JEONG, Kyoung Soo Kwon
  • Patent number: 7372341
    Abstract: A clock circuit. The clock circuit includes a phase detector and an output unit. The phase detector is coupled to receive a reference clock signal and an output clock signal, and is configured to provide a phase signal indicative of a phase difference between the reference and output clock signals. The output unit is configured to provide the output clock signal, and is coupled to a first supply voltage node and a second supply voltage node. The output unit includes a biasing circuit and a voltage-controlled element. The biasing circuit is coupled to receive a control voltage based on the phase signal and is configured to generate a bias voltage based on the received control voltage. The voltage-controlled element is configured to adjust a parameter of the output clock signal based on the bias voltage. A supply-independent output clock is attained using this configuration.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: May 13, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Kailashnath Nagarakanti, Kiritkumar Panchal, Sung-Hun Oh
  • Patent number: 7369000
    Abstract: An adaptive frequency detector used in a phase locked loop for detecting a frequency difference between an input signal and an output clock generated from an oscillator of the phase locked loop includes: a frequency comparator for generating an up signal or a down signal according to the frequency difference between the input signal and the output clock; and a pulse controller coupled to the frequency comparator for generating a charge signal based on the up signal or generating a discharge signal based on the down signal. The pulse controller dynamically adjusts the pulse width of the charge signal or the pulse width of the discharge signal.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: May 6, 2008
    Assignee: Mediatek Incorporation
    Inventors: Wen-Yi Wu, Chao-Lung Tsai, Chi-Kwong Ho
  • Publication number: 20080079509
    Abstract: Methods and apparatus for calibrating a transitional loop, such as a phase locked loop, are disclosed. An example method includes performing an open loop calibration of a voltage controlled oscillator (VCO). The open loop calibration includes tuning the output oscillation frequency of the VCO to within a predetermined range of frequencies. The example method further includes determining a voltage offset and a gain error of an analog to digital converter (ADC) coupled with the phase locked loop. The example method also includes determining a gain offset of the open loop calibrated VCO using the voltage offset and the gain error of the ADC. In the example method, a signal provided by a charge pump of the PLL is adjusted based on the determined gain offset.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Louie Serrano, Alireza Zolfaghari, Paul Lettieri, Hea Joung Kim, Hooman Darabi, Henrik Jensen, Behnam Mohammadi
  • Patent number: 7352256
    Abstract: A crystal oscillation circuit can correctly suppress the resonance of a B mode, thereby correctly excite the resonance of a C mode. Since the crystal oscillation circuit uses a quartz oscillator of an SC cut or an IC cut, the B mode (unnecessary mode) frequency is close to the C mode (main mode) frequency. Therefore, a C mode resonance circuit (main mode resonance circuit) for passing a C mode frequency and a trap circuit for suppressing the oscillation at an unnecessary mode frequency are provided in the feedback loop of the crystal oscillation circuit.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: April 1, 2008
    Assignee: Nihon Dempa Kogya Co., Ltd.
    Inventor: Takeo Oita
  • Patent number: 7342461
    Abstract: System and method for adjusting supply voltage to VCO to minimize affects of circuit noise on VCO. Method includes obtaining a number of data points each by incrementing a counter by the number of VCO periods during a phase of a local oscillator, changing the supply voltage, decrementing the counter by the number of VCO periods during another phase of the local oscillator, and then storing the net count. Then among the saved data points a data point is selected that is the point at or near where the VCO is least sensitive to supply changes and the VCO is set to operate at the supply voltage corresponding to this data point. A system includes a controller, up/down counter, local oscillator, and VCO. The counter counts the oscillations of the VCO and a stored net counts provide information as to where the VCO is least sensitive to the supply voltage.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: March 11, 2008
    Assignee: Multigig, Inc.
    Inventor: John Wood
  • Patent number: 7342460
    Abstract: A technique provides a clock source that meets accuracy requirements, allows the use of a low cost resonator, provides a wide range of output frequencies, and provides suitable phase noise performance. The technique generates a clock signal having a target output frequency using a controllable oscillator having at least one continuous frequency range of operation. The technique dynamically adjusts a reference control value based on a voltage for adjusting a frequency of the clock signal around a frequency determined by the reference control value. The reference control value is adjusted to be approximately within the center of an actual pull range corresponding to the controllable oscillator and a voltage control input of the controllable oscillator. The effective pull range of the controllable oscillator is continuous across the at least one continuous frequency range of operation.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: March 11, 2008
    Assignee: Silicon Laboratories Inc.
    Inventors: Jeffrey S. Batchelor, Axel Thomsen
  • Patent number: 7327201
    Abstract: A semiconductor integrated circuit device having a voltage controlled oscillation circuit that is capable of sufficient oscillation performance and a wireless communication device having the semiconductor integrated circuit device are disclosed. A difference between the maximum value and the minimum value of the oscillation output signal is automatically controlled to be substantially equal to the first predetermined voltage which is the threshold voltage of the oscillation MOSFET for sufficient phase noise performance. It is further disclosed that the difference between the maximum value and the minimum value of the oscillation output signal may be varied by the change of the threshold voltage of the MOSFET caused by substrate bias effect, while maintaining the sufficient phase noise performance.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: February 5, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Daisuke Miyashita, Hiroki Ishikuro
  • Patent number: 7327197
    Abstract: A method and apparatus for providing a radiation hardened Phase Locked Loop (PLL) are presented. The radiation hardened PLL includes an adjustable bandwidth loop filter. The adjustable filter modifies an unfiltered voltage control signal and provides a stable voltage control signal to a Voltage Controlled Oscillator (VCO) during detected radiation induced transient events. The adjustable filter filters out radiation effects by decreasing its bandwidth when a radiation event is detected.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: February 5, 2008
    Assignee: Honeywell International, Inc.
    Inventor: Jeffrey J. Kriz
  • Patent number: 7323942
    Abstract: To provide dual loop PLLs capable of reducing the lock-up time in the initial start-up, and multiplication clock generators contributing to reduction of the power dissipation. The dual loop PLL comprises a dual loop PLL having a phase comparison loop having a phase comparator 1 for comparing phases, and a frequency comparison loop having a frequency comparator 7 for comparing frequencies, wherein the frequency comparator 7 carries out frequency comparison using an input signal inputted from a calibration clock line CLcal 18, the input signal being different from a reference clock signal inputted from an external reference clock line CLex 11, the reference clock signal being used for a phase comparator 1. Moreover, multiplication clock generators are configured using the dual loop PLL.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: January 29, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Ishizaka, Kazuaki Sogawa
  • Patent number: 7321270
    Abstract: A ring oscillator having an odd number of active elements connected in series, where the signal output of one active element is connected to the signal input of the next active element to form a closed ring of active elements. Each active element has a power supply input and a ground connection, a signal input and a signal output, an inverter sub-element having a pair of current mirrors, and a capacitor controlled bias sub-element.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: January 22, 2008
    Assignee: ESS Technology, Inc.
    Inventor: Khalid Ouici
  • Publication number: 20070290763
    Abstract: There are many inventions described and illustrated herein.
    Type: Application
    Filed: July 26, 2006
    Publication date: December 20, 2007
    Inventors: Aaron Partridge, Bernhard E. Boser, Crist Y. Lu, Markus Lutz
  • Patent number: 7298226
    Abstract: A noise tolerant voltage controlled oscillator is described. The voltage controlled oscillator include a varactor element as part of an LC tank circuit. The varactor element is biased by a bias signal and a bias-dependent control signal. The bias-dependent control signal tunes the LC tank circuit. Because the control signal is bias-dependent, noise and other deleterious influences do not cause the varactor element to deviate in capacitance. Instead, the bias-dependent control signal is a tuning signal that is centered around the bias signal, which allows the varactor element to provide a constant capacitance in the event of a varying bias signal.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: November 20, 2007
    Assignee: Finisar Corporation
    Inventors: Naresh Shanbhag, Hyeon Min Bae, Jinki Park, Paul Suppiah
  • Patent number: 7292114
    Abstract: Circuits, methods, and apparatus that provide low-noise, high-stability crystal oscillators having controlled-amplitude differential output signals and DC level control. A crystal oscillator circuit has two feedback loops, one for setting the DC level of its signals, the other for adjusting the amplitude of those signals. The DC level feedback loop can set the DC component of the oscillator signals to a voltage midway between two supply voltages. The amplitude control loop sets the amplitude of the output of the crystal oscillator signal to be within a range. The amplitude can be set to provide a maximum swing without clipping the supply voltages in order to provide high-stability and minimal jitter. The amplitude control circuit can also be digital for improved noise performance. The time constants of these two loops can be separated such that instabilities are avoided.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: November 6, 2007
    Assignee: Marvell World Trade Ltd.
    Inventor: Jody Greenberg
  • Patent number: 7292117
    Abstract: A temperature compensated piezoelectric oscillator includes: an oscillation circuit that drives a piezoelectric element with a current; a direct-current-stopping fixed capacitor; a frequency-temperature compensated circuit that compensates the deviation of an oscillation frequency caused by a change of temperature; and a piezoelectric transducer which includes a piezoelectric element driven in a prescribed frequency; where the above elements are connected serially.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: November 6, 2007
    Assignee: Epson Toyocom Corporation
    Inventors: Masayuki Ishikawa, Atsushi Kiyohara
  • Publication number: 20070252656
    Abstract: A system for comparing, measuring, or providing a reference signal based on a oscillator having variable loop gain is described. Only when the oscillator loop gain is at least the value of one does the oscillator produce an AC output signal. The oscillator's ability to oscillate is controlled by the one or more sensor/transducer input signal levels. In some cases, negative feedback of the AC output signal is also used to control the loop gain of the oscillator circuit keeping the loop gain at or close to the value of one. The system's output signal indicates whether the oscillator is oscillating or not, or the AC signal level required to just maintain oscillation.
    Type: Application
    Filed: April 12, 2007
    Publication date: November 1, 2007
    Inventor: Fred Mirow