Abstract: An oscillator circuit and system are provided having a peak detector that can determine a peak voltage value from the oscillator. The peak voltage value can then be compared against a predetermined voltage value by a controller coupled to the peak detector. The comparison value is then used to change a bias signal if the peak voltage value is dissimilar from the predetermined voltage value. A variable capacitor or varactor can be formed from a transistor and is coupled to the oscillator for receiving the bias signal upon a varactor bias node. The bias signal is used to regulate the capacitance within the varactor as applied to the oscillator nodes. Another controller can also be coupled to the peak detector to produce a second bias signal if the peak voltage is dissimilar from a second predetermined voltage value. The second bias signal can then be forwarded into an amplifier having a variable gain to regulate the gain applied to the oscillator.

Abstract: A self refresh period signal generator includes: a voltage detection unit for detecting a voltage level of a power supply voltage in order to generate a plurality of period control signals according to the detected voltage level; and an oscillation unit for generating a ring oscillation signal having a constant period determined by a resistance of a period control resistor when a self refresh signal is activated, wherein the resistance of the period control resistor is controlled according to logic levels of the plurality of period control signals.

Abstract: An oscillation control apparatus is provided with: an oscillating unit for oscillating an oscillating element; an output amplifying circuit having two pieces of same types of transistors series-connected to each other, for outputting a signal from a junction point between the two transistors in response to an oscillation signal outputted from the oscillating unit; a bias unit for generating two DC bias voltages having different levels from each other, which are applied to either respective gates or respective bases of the two transistors; a constant voltage power supply unit for applying a constant voltage to the oscillating unit; and an inverter unit provided between the oscillating unit and any one of either the gates or the bases of the two transistors, for inverting a phase of the oscillation signal outputted from the oscillating unit.

Abstract: Frequency synthesizer circuitry employs a delay line. A reference clock signal propagates through successive stages of the delay line, and the currents drawn by output buffers of all of the stages are added at a common node. The common node current is converted to a voltage, which is AC-coupled to an output buffer ring oscillator of the frequency synthesizer. The output buffer ring oscillator includes a plurality of inverters connected in a series. A feedback connection including a resistor is provided from an output node of the last inverter to an input node of the first inverter.

Abstract: There is provided a frequency-variable oscillator that varies, even when a frequency of an input signal is varied, a frequency of an oscillation signal according to the varied frequency of the input signal. The frequency-variable oscillator includes: a voltage-to-current converter circuit for converting a voltage level of an input signal into a current level within a predetermined range; and an oscillator circuit for varying a frequency according to the current level from the voltage-to-current converter circuit and oscillating the varied frequency.

Abstract: An interleaved voltage-controlled oscillator (VCO) is disclosed. The VCO includes a ring circuit comprising a series connection of main logic inverter gates, a plurality of delay elements connected in parallel with a selected sequence of the main logic inverter gates, at least one temperature compensation circuit comprising a logic inverter gate in series connection with one or more field effect transistors, the field effect transistor responsive to a compensating voltage input that is proportional to temperature, and an electronic circuit in signal communication with the at least one temperature compensation circuit and configured to provide a voltage signal responsive to temperature. Each delay element includes a feedforward section, comprising controls for regulating signal transmission through feedforward elements responsive to one or more control voltages, and a proportional section, comprising controls for regulating signal transmission through at least one logic inverter gate.

Abstract: An interleaved voltage-controlled oscillator (VCO) is disclosed. The VCO includes a ring circuit comprising a series connection of main logic inverter gates, a plurality of delay elements connected in parallel with a selected sequence of the main logic inverter gates, at least one temperature compensation circuit comprising a logic inverter gate in series connection with one or more field effect transistors, the field effect transistor responsive to a compensating voltage input that is proportional to temperature, and an electronic circuit in signal communication with the at least one temperature compensation circuit and configured to provide a voltage signal responsive to temperature. Each delay element includes a feedforward section, comprising controls for regulating signal transmission through feedforward elements responsive to one or more control voltages, and a proportional section, comprising controls for regulating signal transmission through at least one logic inverter gate.

Abstract: A timing adjusting method detects a phase error between a main signal path from which a transmitting signal is obtained and a control signal path from which a voltage control signal is obtained, based on a to-be-amplified signal that is to be amplified and represents an amplitude or a power of the transmitting signal prior to amplification and a feedback signal that represents an amplitude or a power of the transmitting signal after the amplification, adjusts an amount of delay of at least one of the main signal path and the control signal path so as to mutually cancel the phase error, and amplifies the transmitting signal from the main signal path depending on the voltage control signal from the control signal path. The detecting the phase error may include detecting polarity transition points of a slope of a waveform of the to-be-amplified signal or the feedback signal, and measuring the phase error using the detected polarity transition points.

Abstract: A wide tuning range and constant swing VCO is described that is based on a multipass Ring Oscillator enhanced with feed-backward connections. This VCO is designed to overcome tuning range limitations of prior-art “feed-forward” ring oscillators. The Feedback multipass Ring Oscillator of the invention provides decreasing frequency when tuned by increasing the feedback, thus covering a much wider tuning range irrespective of the speed limit of the technology while at the same time providing almost constant amplitude.

Abstract: A power source circuit for an oscillator is provided comprising a multiplexer, a plurality of transmission gates, a plurality of resistors, a current source circuit, and an output circuit. The multiplexer inputs a digital signal and outputs one or more control signals. The transmission gates is individually coupled to the multiplexer and receives the one or more control signals, wherein each of the plurality of transmission gates are turned on or off according to the one or more control signals. The plurality of resistors is coupled in series and individually coupled to the plurality of transmission gates. The current source circuit is coupled to the plurality of resistors and provides a current source. The output circuit is coupled to the current source and provides output power for the oscillator according to the current source and the operation of the transmission gates.

Abstract: A controllable oscillating system for generating a differential oscillating signal is disclosed. The controllable oscillating system includes an oscillating circuit and a current adjusting device. The oscillating circuit includes a controllable resonator, a cross-coupling driving device, and a current source. The cross-coupling driving device is coupled to the controllable resonator and utilized for driving the controllable resonator to generate the differential oscillating signal. The current source is coupled to the cross-coupling driving device and utilized for providing a first current. The current adjusting device is coupled to the cross-coupling driving device and utilized for adjusting currents passing through the cross-coupling driving device.

Abstract: An oscillation circuit includes a cross-coupled circuit having a first active element and a second active element which are differentially connected to each other. The oscillation circuit oscillates in a resonance frequency of a resonator connected between the first active element and the second active element.

Abstract: An oscillator creates a reference voltage based on a pulse signal corresponding to an oscillation output of a crystal oscillation circuit and controls a supply voltage to the crystal oscillation circuit according to the reference voltage. A control signal creating circuit creates a control signal based on the pulse signal and reference voltage generating circuits that control the reference voltage based on the control signal. The control signal creating circuit creates a low-level control signal when the pulse signal is in a low level, creates a high-level control signal when the pulse signal is in a high level, and prevents transition of the control signal from the high level to the low level.

Abstract: A processing device includes a Phase Locked Loop (PLL) system with an adjustable power supply designed to track the power supply provided to one or more of the cores in the processor device. The PLL no longer operates at a fixed voltage level that is held constant and independent from the requested core frequency or the core digital voltage, but rather the power supply to the phase locked loop is adjusted along with the main power supply to the processor core.

Abstract: Constant and accurate signal gain systems based on controlling oscillator loop gain. A constant gain positive feedback network and an amplifier form an oscillator. Only when the oscillator loop gain is at least one does the oscillator produces an AC signal. Negative feedback of the oscillator's AC signal level is used to keep the loop gain close to or at the value of one by controlling the loop gain of the oscillator circuit. By maintaining the loop gain of the oscillator circuit substantially constant the signal gain is also maintained substantially constant.

Abstract: A voltage controlled oscillator (VCO) with improved frequency characteristics is provided. The VCO includes a converting circuit supplied between a bias voltage and a ground voltage for converting the control voltage into a control current, a replica bias circuit coupled to the converting circuit for providing a swing voltage, and a ring oscillating circuit coupled to the replica bias circuit having at least two delay units coupled in series for successively delaying an input signal as the oscillating signal after a period of delay time.

Abstract: A crystal oscillator with variable gain and variable output impedance inverter system includes an inverter, a variable impedance feedback circuit, connected between the output and input of the inverter, a crystal oscillator system, having a crystal with first and second electrodes connected across the input and output of the inverter; a serial variable impedance circuit connected between the inverter output and an electrode of the crystal and a control circuit for temporarily, during start up mode, increasing the impedance of the feedback circuit and decreasing the impedance of the serial circuit relative to the stationary mode impedances and then returning the feedback impedance to the lower impedance level and the serial circuit to the higher impedance level that promotes high frequency stability of the oscillator in the normal, stationary mode, of operation.

Abstract: Systems and methods for implementing a temperature compensated two-stage ring oscillator are described. At least one embodiment includes a system for generating a clock signal comprising a self-starting oscillator comprising two delay stages in a ring configuration. The two-stage ring oscillator is configured to generate the clock signal, wherein the delay stages are configured such that the two-stage ring oscillator has a single right-half plane (RHP) pole in each of the two delay stages where feedback is always positive. For some embodiments, the system further comprises a compensation module configured to sense temperature and process variations and adjust a supply voltage for the two-stage ring oscillator to compensate for temperature and process variations in order to maintain a constant frequency clock signal. For such embodiments, the compensation module comprises a replica circuit configured to mirror operation of the n-channel devices within the two-stage ring oscillator.

Abstract: A voltage-controlled oscillator includes: a bias voltage generator operating to generate first and second bias voltages in response to a control signal; a voltage-controlled oscillation circuit connected to a control node and configured to generate oscillation signals in response to an input voltage; a selection signal generator operating to generate a selection signal in response each to the oscillation signals; and a selection circuit operating to select one of the first and second bias voltages in response to the selection signal and outputting the selected bias voltage to the control node.

Abstract: A voltage controlled oscillator and a load cell circuit usable in VCO are provided. The VCO features an internal compensation for process, voltage and temperature using a replica of half of the oscillating stage. The load cell circuit comprises a bias transistor to drain a predetermined current from the oscillating stage, a control transistor to vary resistance offered by it responsive to a control voltage applied and a resistor adapted to provide a clamp resistance.

Abstract: To maintain the amplitude of an oscillating signal within a defined range, the detected peak level of the oscillating signal is compared to a reference voltage. If the detected peak level is determined as being greater than the reference voltage, the common source/drain voltage of a differential amplifier driving the crystal oscillator across its input terminals is reduced so as to lower the amplitude of the oscillation signal. If the detected peak level is determined as being smaller than the reference voltage, the common source/drain voltage of the differential amplifier driving the crystal oscillator is increase so as to raise the amplitude of the oscillation signal.

Abstract: Embodiments disclosed herein may provide circuits having two or more different supplies to separately power analog and digital components in a circuit. In some embodiments, circuits such as PLLs may be provided with adjustable analog supplies. Other embodiments may be disclosed and/or claimed herein.

Abstract: A clock circuit has a crystal. A differential amplifier has a first input coupled to a first node of the crystal and a second input of the differential amplifier coupled to a bias signal and an output of the differential amplifier coupled to a second node of the crystal.

Abstract: A stable frequency is outputted by an oscillator circuit including a constant current circuit which is electrically connected between a first terminal and a second terminal, a voltage controlled oscillator circuit in which an oscillation frequency fluctuates in accordance with a potential difference between power supply voltage terminals, an n-channel transistor, a p-channel transistor in which a gate-source voltage is set to be constant by the constant current circuit, and a capacitor, in which a source electrode of the p-channel transistor is electrically connected to the first terminal, a drain electrode of the p-channel transistor is electrically connected a drain electrode and a gate electrode of the n-channel transistor, a source electrode of the n-channel transistor is electrically connected to the second terminal, and a gate electrode of the n-channel transistor is electrically connected to the second terminal through the capacitor.

Abstract: In one embodiment, a method of programming an oscillator circuit includes providing a resonator, a first programmable capacitor, a second programmable capacitor, and an amplifier. The first programmable capacitor and the second programmable capacitor may be programmed at a first capacitance value during a first time period, wherein the first programmable capacitor provides a first voltage to bias the resonator and the amplifier alters the second voltage to provide a third voltage to the resonator. During a second time period the first capacitance value is increased.

Abstract: An apparatus for characterizing an operating parameter in an integrated circuit, in accordance with one embodiment of the present invention, includes a voltage potential module, a plurality of distribution systems and a plurality of ring oscillator modules. Each ring oscillator module is coupled to the voltage potential module by a respective distribution system. Each ring oscillator module generates an oscillator signal as a function of the voltage potential and a voltage drop caused by the respective distribution system. The characterization of the operating parameter may be extrapolated from the difference in the operating frequencies of the ring oscillator modules.

Abstract: Embodiments of present invention provide a circuit including a voltage regulator, a phase frequency detector, a charge pump, a low pass filter a control-voltage generating circuit and a voltage controlled oscillator. In a first mode of operation the voltage controlled oscillator produces an output clock in accordance with a control voltage produced from the control-voltage generating circuit and the output voltage of the voltage regulator. In a second mode of operation, the voltage controlled oscillator produces an output clock in accordance with a control voltage from the low pass filter and the output voltage of the voltage regulator.

Abstract: Transistors M11 and M12 are cross-coupled to each other so as to form a negative resistance circuit. First and second variable capacitor sections 10 and 20 are connected in parallel with an inductor circuit so as to form a parallel resonant circuit. A first reference voltage Vref1 and a control voltage VT1 corresponding to a carrier wave component are fed to both terminals, respectively, of each of variable capacitors VC11 and VC12 included in the first variable capacitor section 10. A second reference voltage Vref2 and a control voltage VT2 corresponding to a modulated wave component are fed to both terminals, respectively, of each of variable capacitors VC21 and VC22 included in the second variable capacitor section 20.

Abstract: A circuit comprises a programmable voltage regulator and an oscillator. The programmable regulator generates a regulated supply voltage using an input voltage and changes the regulated supply voltage from a first voltage to a second voltage in response to a first control signal. The first and the second voltages are generated using charge from the input voltage. The regulated supply voltage drives the oscillator. The oscillator varies a frequency of a periodic output signal within a frequency range in response to changes in a control voltage. The frequency range of the periodic output signal varies when the first control signal causes the regulated supply voltage to change from the first voltage to the second voltage.

Abstract: An apparatus for generating an oscillating signal that includes a circuit to accelerate the time in which an oscillating signal reaches a defined steady-state condition from a cold start. The apparatus includes an oscillating circuit to generate an oscillating signal; a first circuit to supply a first current to the oscillating circuit; and a second circuit to supply a second current to the oscillating circuit, wherein the first and second currents are adapted to reduce the time duration for the oscillating signal to reach a defined steady-state condition. The apparatus may be useful in communication systems that use low duty cycle pulse modulation to establish one or more communications channels, whereby the apparatus begins generating an oscillating signal at approximately the beginning of the pulse and terminates the oscillating signal at approximately the end of the pulse.

Abstract: Bias circuits to stabilize oscillation in ring oscillators, oscillators, and methods to stabilize oscillation in ring oscillators are provided. The ring oscillator includes a plurality of differential delay cells, each including a pair of input transistors, a pair of voltage-controlled resistors, and a common current source. The bias circuit includes a replica arm that includes a replica of one of the voltage-controlled resistors, and a resistor arm that includes a fixed resistor. The bias circuit supplies bias voltages to the differential delay cells such that ratio of voltage swing to bias current of the delay cell is kept constant by referring the ratio to the fixed resistor.

Abstract: An oscillation circuit includes a constant current source, a current mirror circuit configured to receive a constant input current from the constant current source and to output a current proportional to the constant input current, a first inverter configured to be driven with a quartz resonator to oscillate, an operational amplifier configured to supply a power to the first inverter with a voltage equal to an input voltage thereof and a second inverter having a power supply terminal connected to the current mirror circuit and to the operational amplifier and configure to generate the input voltage for the operational amplifier.

Abstract: An apparatus for generating an oscillating signal that includes a circuit to accelerate the time in which an oscillating signal reaches a defined steady-state condition from a cold start. The apparatus includes an oscillating circuit to generate an oscillating signal; a first circuit to supply a first current to the oscillating circuit; and a second circuit to supply a second current to the oscillating circuit, wherein the first and second currents are adapted to reduce the time duration for the oscillating signal to reach a defined steady-state condition. The apparatus may be useful in communication systems that use low duty cycle pulse modulation to establish one or more communications channels, whereby the apparatus begins generating an oscillating signal at approximately the beginning of the pulse and terminates the oscillating signal at approximately the end of the pulse.

Abstract: A voltage-controlled oscillator (VCO) includes: an oscillation unit, for generating an oscillation signal according to a biasing current; a current mirror, for providing the biasing current, the current mirror comprising: at least one first transistor, coupled between a first voltage level and a current source; at least one second transistor, coupled to the first voltage level, a gate of the second transistor is coupled to a gate of the first transistor and the current source; a switch module, coupled to the current mirror; and a control module, coupled to the switch module, for controlling the switch module to adjust the biasing current.

Abstract: 1st to nth pairs of transistors (n=an odd number) are connected in parallel, and each pair of transistors has an upper transistor and a lower transistor connected in series. A point between the upper transistor and the lower transistor of a preceding pair of transistors is connected to a gate of the lower transistor of a subsequent transistor, and the point between the upper transistor and the lower transistor of nth pair of transistors is connected to the gate of the first lower transistor. A capacitor is inserted between the lower transistor and a direct power source. A current regulating circuit connected to gates of the upper transistors, wherein the current regulating circuit supplies a gate voltage to each gate of the each upper transistor.

Abstract: Provided is an LC resonance voltage-controlled oscillator (VCO) used for a multi-band multi-mode wireless transceiver. In order to generate a multi-band frequency, a capacitor bank and a switchable inductor are included in the LC resonance voltage-controlled oscillator. The LC resonance voltage-controlled oscillator employs an adjustable emitter-degeneration negative resistance cell in place of tail current sources in order to compensate for non-uniform oscillation amplitude caused by the capacitor bank and prevent the degradation of a phase noise due to the tail current sources.

Abstract: An oscillator voltage source circuit is provided comprising a multiplexer, a plurality of transmission gates, a plurality of resistors, a voltage source circuit, and an output circuit. The multiplexer inputs a digital signal. The transmission gates is individually coupled to the multiplexer and receives the digital signal, wherein the plurality of transmission gate are turned on or off according to the digital signal. The plurality of resistors is coupled in series and individually coupled to the plurality of transmission gates. The voltage source circuit is coupled to the plurality of resistors and provides a first voltage source. The output circuit is coupled to the voltage source and outputs an oscillator voltage source according to the first voltage source and the turned-on or turned-off transmission gates.

Abstract: A self refresh period signal generator includes: a voltage detection unit for detecting a voltage level of a power supply voltage in order to generate a plurality of period control signals according to the detected voltage level; and an oscillation unit for generating a ring oscillation signal having a constant period determined by a resistance of a period control resistor when a self refresh signal is activated, wherein the resistance of the period control resistor is controlled according to logic levels of the plurality of period control signals.

Abstract: An electric circuit includes a circuit path from a first reference voltage to a second reference voltage lower than the first reference voltage. The path includes a current generator, a capacitor, a first switching element suitable for connecting or disconnecting the capacitor with respect to the current generator. The first switching element has a triggering value and the electric circuit includes a second switching element placed in parallel to the capacitor and control elements suitable for acting on the first and second switching elements for controlling the charging and discharging of the capacitor. The control elements comprise a comparator operable during the charging of the capacitor and suitable for acting on the first switching element for blocking the charging of the capacitor when the voltage value at its terminals reaches a threshold voltage value. The threshold voltage value is lower than the triggering voltage of the first switching element and higher than the second reference voltage.

Abstract: An oscillating circuit having improved noise degeneration includes an oscillator and a noise degeneration circuit. The oscillator is adapted to provide a differential oscillating signal between first and second output terminals, and includes first and second transistors in communication with the first and second output terminals. The noise degeneration circuit includes cross-coupled capacitors and cross-coupled third and fourth transistors operated in a linear region. The noise degeneration circuit reduces the low frequency gm of the first and second transistors to lower the effect of flicker noise. At relatively high frequencies, the capacitors provide a virtual AC ground to the source terminals of the first and second transistors. The noise degeneration circuit receives a voltage signal from a biasing circuit adapted to track variations in electrical characteristics of the third and fourth transistors.

Abstract: Embodiments of the present invention provide a system for controlling a startup time of an oscillator circuit. The system includes a variable current source coupled to the oscillator circuit, wherein a startup time of the oscillator circuit is proportional to a bias current input into the oscillator circuit from the variable current source. The system also includes a control mechanism coupled to the variable current source and to the output of the oscillator circuit. Upon startup, the control mechanism is configured to adjust the variable current source to input a large startup bias current into the oscillator circuit. After the oscillator circuit outputs a predetermined number of oscillations during startup, the control mechanism is configured to adjust the variable current source to decrease its current to a smaller steady-state bias current into the oscillator circuit.

Abstract: A VCO circuit includes: a control portion to which a first voltage is inputted and from which a second voltage corresponding to the first voltage is outputted; a current source portion to which the second voltage is inputted and from which a current corresponding to the second voltage is outputted; and an oscillator circuit to which the current is inputted and from which a signal with a frequency in accordance with the current is outputted. The control portion includes an adjusting circuit which changes the second voltage in conjunction with fluctuation of a power supply voltage. Accordingly, fluctuation of the frequency Fo of an output signal of the VCO circuit can be suppressed even when the power supply voltage of the VCO circuit fluctuates.

Abstract: A semiconductor integrated circuit device includes a voltage controlled oscillator which controls a bias current or an oscillation frequency to supply an output signal, a phase-locked loop circuit which supplies a frequency control signal based on the output signal supplied from the voltage controlled oscillator, a peak detection circuit which detects a peak of the frequency control signal supplied from the phase-locked loop circuit, and a bias control circuit which produces a bias current based on the peak detected by the peak detection circuit to supply the bias current. The voltage controlled oscillator controls the bias current supplied from the bias control circuit or the oscillation frequency to supply the output signal based on the frequency control signal supplied from the phase-locked loop circuit.

Abstract: A calibration circuit (20, 50) and method (60) for calibrating the bias current of a VCO (10, 40) to minimize phase noise. The calibration circuit (20, 50) monitors the average voltage at the common-mode node of the VCO (10, 40) while varying the bias current over a predetermined range. The calibration circuit (20, 50) identifies the bias current associated with the minimum average common-mode voltage and utilizes this bias current for calibrating the biasing transistor of the VCO (10, 40).

Abstract: A self refresh period signal generator includes: a voltage detection unit for detecting a voltage level of a power supply voltage in order to generate a plurality of period control signals according to the detected voltage level; and an oscillation unit for generating a ring oscillation signal having a constant period determined by a resistance of a period control resistor when a self refresh signal is activated, wherein the resistance of the period control resistor is controlled according to logic levels of the plurality of period control signals.

Abstract: An apparatus for generating an oscillating signal that includes a circuit to accelerate the time in which an oscillating signal reaches a defined steady-state condition from a cold start. The apparatus includes an oscillating circuit to generate an oscillating signal; a first circuit to supply a first current to the oscillating circuit; and a second circuit to supply a second current to the oscillating circuit, wherein the first and second currents are adapted to reduce the time duration for the oscillating signal to reach a defined steady-state condition. The apparatus may be useful in communication systems that use low duty cycle pulse modulation to establish one or more communications channels, whereby the apparatus begins generating an oscillating signal at approximately the beginning of the pulse and terminates the oscillating signal at approximately the end of the pulse.

Abstract: Disclosed is a dual-band voltage-controlled oscillator using bias switching and output-buffer multiplexing. The dual-band voltage-controlled oscillator includes a power supply unit for supplying a source voltage; plural voltage-controlled oscillation units for outputting different oscillation frequencies according to controls of a certain tuning voltage; plural bias units for generating driving voltages for driving the voltage-controlled oscillation units and supplying the driving voltages to the voltage-controlled oscillation units; and plural buffers for selectively outputting oscillation frequencies of the plural voltage-controlled oscillation units. The present invention implements the dual-band voltage-controlled oscillator through bias switching and output-buffer multiplexing, which brings an advantage of elimination of interference between output frequencies to enhance phase noise characteristics.

Abstract: An oscillator circuit can generate a periodic signal, and a frequency adjustment circuit can adjust the frequency of the periodic signal. The periodic signal may include phase jitter. In one aspect of the invention, the phase jitter may be mitigated by connecting other circuitry to the oscillator circuit and allowing the other circuitry to draw current. In one embodiment, the other circuitry is connected in parallel with the oscillator circuit. In one embodiment, the other circuitry is configured to draw greater current to mitigate more phase jitter and to draw less current to mitigate less phase jitter. In one embodiment, a greater portion of the other circuitry is connected to the oscillator circuit for higher frequencies and a lesser portion of the other circuitry is connected to the oscillator circuit for lower frequencies.

Abstract: An interleaved voltage-controlled oscillator (VCO) is disclosed. The VCO includes a ring circuit comprising a series connection of main logic inverter gates, a plurality of delay elements connected in parallel with a selected sequence of the main logic inverter gates, at least one temperature compensation circuit comprising a logic inverter gate in series connection with one or more field effect transistors, the field effect transistor responsive to a compensating voltage input that is proportional to temperature, and an electronic circuit in signal communication with the at least one temperature compensation circuit and configured to provide a voltage signal responsive to temperature. Each delay element includes a feedforward section, comprising controls for regulating signal transmission through feedforward elements responsive to one or more control voltages, and a proportional section, comprising controls for regulating signal transmission through at least one logic inverter gate.

Abstract: A method and circuit for stabilizing a frequency of a clock generator comprising a ring oscillator with respect to manufacturing process variations and a circuit temperature. A bias circuit comprising a current mirror and cascade circuits provides a compensated bias current based on a gate source voltage and drain source voltage of an output transistor, where the two voltages are independent of transistor parameters and circuit temperature. As a result, the ring oscillator frequency is stabilized with respect to those parameters.