Regulated Patents (Class 331/186)
  • Patent number: 6486745
    Abstract: An adjustable voltage controlled oscillator has an input for receiving a voltage signal and an integrator coupled to the input for generating a ramp signal. The circuit also includes an adjustable current supply coupled to an output of the integrator for supplying an adjustable amount of current. A comparator compares the ramp signal with a predetermined voltage. The circuit further includes an output for generating a frequency output as a function of the comparison, wherein the circuit is calibratible by adjusting current generated by the adjustable current supply.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: November 26, 2002
    Assignee: Delphi Technologies, Inc.
    Inventors: Gregory J. Manlove, Lawrence D. Hazelton, Mark B. Kearney
  • Publication number: 20020167367
    Abstract: A PLL may include a voltage regulator for providing a regulated voltage to one or more PLL components (e.g. a charge pump, a voltage controlled oscillator, etc.). The PLL components may be noise sensitive components, and the regulated voltage may reduce noise received from the power supply. Additionally, a level shifter may be coupled between the PLL components and a phase/frequency detector. The level shifter may be supplied by the regulated voltage from the voltage detector. In another implementation, a PLL may include a programmable charge pump and a programmable loop filter. For example, the reference current to the charge pump may be changed, thus changing the rate at which the charge pump can change an output voltage (the control voltage to a voltage controlled oscillator in the PLL). The loop filter components may be changed to change the frequency ranges filtered by the loop filter.
    Type: Application
    Filed: July 9, 2002
    Publication date: November 14, 2002
    Applicant: Broadcom Corporation
    Inventor: Joseph M. Ingino
  • Patent number: 6456166
    Abstract: Object of the present invention is to provide a semiconductor integrated circuit and a voltage control oscillator capable of performing stable oscillating operation and generating an oscillating signal with little jitter. The present invention has a VCO cell, a replica cell constituted in the same way as the VCO cell, an operational amplifier, and a current generator bias circuit. A NMOS transistor is connected between a node in the VCO cell and a ground terminal. The operational amplifier controls the voltages of a node in the replica cell and the node in the VCO so that they are equal to the reference voltage. Because of this, the PMOS transistor composing of a current generator always operates at pentode region, thereby stabilizing the oscillating operation. Furthermore, according to the present embodiment, a CC jitter at low frequency side can be reduced more efficiently than that of the conventional circuit.
    Type: Grant
    Filed: April 18, 2001
    Date of Patent: September 24, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomoaki Yabe
  • Patent number: 6445258
    Abstract: A crystal oscillator circuit includes a crystal driven by a variable current source having a transconductance device with transconductance dependent on current, and a CMOS buffer circuit for receiving a sinusoidal signal from the crystal and providing a square wave output signal. The buffer circuit includes first and second bi-level buffers capacitively coupled to receive sinusoidal signals and operating in a push-pull mode for providing square wave output signals from each of said first and second buffers, and a third buffer driven by output signals from the first and second buffers, whereby duty cycle of the first and second buffers is controlled by bias voltages applied to CMOS transistors in the buffers.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: September 3, 2002
    Assignee: Zeevo, Inc.
    Inventor: Tom C. Truong
  • Patent number: 6377130
    Abstract: A temperature stabilized CMOS oscillator circuit modifies the gain of a CMOS oscillator transistor to cancel the gain variation over temperature using a bias circuit. The bias circuit utilizes a combination of two current mirrors to establish a temperature compensating supply current to a CMOS oscillator transistor. A primary current mirror and a temperature variable resistor establish a current in the current mirror output to the CMOS oscillator transistor. A secondary current mirror and a temperature variable resistor divert current from the primary current mirror over temperature to vary the current mirror output to the CMOS oscillator transistor to compensate for its gain variation.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: April 23, 2002
    Assignee: Rockwell Collins, Inc.
    Inventor: Leo J. Haman
  • Publication number: 20020000886
    Abstract: In a voltage controlled oscillator (VCO) having a voltage-current conversion circuit, a ring oscillator, and a main power supply for feeding a power supply voltage to these components, it is constructed so that a voltage which is fed to the voltage-current conversion circuit and ring oscillator may be applied with an internal voltage via a regulator circuit, thus effecting an oscillation output having only slight variations to the variations of the power supply voltage. Therefore, a phase synchronous circuit such as PLL circuits may be maintained at a locked status. In some instances, such a VCO may be modified not only to stabilize the dynamic range to the VCO control voltage, but also to switch the dynamic range. Thus, the oscillation frequency oscillated and outputted by the ring oscillator may be stabilized even upon the occurrences of the variations of the power supply voltage Vcc which is fed at a locked status.
    Type: Application
    Filed: January 8, 2001
    Publication date: January 3, 2002
    Inventor: Yukio Ichihara
  • Patent number: 6294963
    Abstract: A voltage-controlled oscillator comprising a voltage compensation transistor is disclosed. The voltage compensation transistor is able to provide an equivalent resistance to the bias voltage supplied to the oscillator. When a sudden raise in the voltage of the power supply takes place, the equivalent resistance of the compensation transistor will drop, such that the bias voltage supplied to the oscillator may be pulled down, whereby the oscillation frequency of the ring oscillator may be adjusted.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: September 25, 2001
    Assignee: Topic Semiconductor Corp.
    Inventors: Her-Y Shih, Jean-Ming Lee, Chu-Chiao Yu
  • Patent number: 6278338
    Abstract: A crystal oscillator apparatus is described that has a wide dynamic frequency range and that is capable of supporting a broad range of crystal types. The present invention reduces the unwanted side effects that are associated with the prior art crystal oscillator designs, such as the clipping of signals, the introduction of signal distortion and unwanted signal harmonics. The present invention reduces the total wasted loop gain of the oscillator while also reducing the amount of integrated circuit real estate required to implement the crystal oscillator. The crystal oscillator apparatus of the present invention preferably comprises a crystal resonator circuit, an inverting amplifier, a bias circuit, a reference circuit, and a peak detector circuit. The present invention takes advantage of Automatic Gain Control (AGC) design techniques. The gain of the present crystal oscillator is automatically regulated using a closed loop circuit design.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: August 21, 2001
    Assignee: Silicon Wave Inc.
    Inventor: Lars Gustaf Jansson
  • Patent number: 6271737
    Abstract: A communications device, such as a one-way pager, comprises a receiver having a frequency down-conversion means for frequency converting an input signal using a local oscillator signal generated by a signal generating means, which may comprise a frequency synthesizer. The signal generating means (20) comprises a voltage controlled oscillator (VCO) (50) including an oscillator transistor (68) coupled to dc voltage source (54), frequency determining reactive elements coupled to the oscillator transistor (68) for determining the frequency to be generated, at least one of the reactive elements (80) being adjustable in response to an applied voltage and means (82,84) for phase modulating the oscillator transistor (68) in an opposite sense to that caused by voltage perturbations due to noise in the dc voltage supplied by the dc voltage source (54).
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: August 7, 2001
    Assignee: U.S. Philips Corporation
    Inventor: Stephen W. Watkinson
  • Patent number: 6271734
    Abstract: A piezoelectric oscillator which is excellent in noise characteristic and aging characteristic is implemented by a piezoelectric oscillator comprising: a Colpitts oscillator including a piezoelectric resonator and an oscillation transistor; amplification means for amplifying an output of the Colpitts oscillator; and rectification means for rectifying an output of the amplification means, an output of the rectification means being fed back to base of the oscillation transistor to keep an oscillation output level constant, in which a base bias is set so as to provide the oscillation transistor with an operation point located in the vicinity of a saturation region, and in which a feedback current from the rectification means is supplied to the base of the oscillation resistor so as to make the operation point approach to the saturation region when the saturation output level has become high and so as to make the operation point go away from the saturation region when the oscillation output level has become low.
    Type: Grant
    Filed: February 17, 2000
    Date of Patent: August 7, 2001
    Assignee: Toyo Communication Equipment Co., Ltd.
    Inventor: Tomio Satoh
  • Patent number: 6271732
    Abstract: A ring oscillator consisting of a plurality of series connected amplifier stages alternatingly energized by first and second voltages negatively correlated to each other. The output of the final amplifier stage is inverted and connected to the input of the first stage. The second voltage is derived from the first voltage by way of an inverting amplifier which is dimensioned to render the total sensitivity K=df/dVDD zero.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: August 7, 2001
    Inventor: Frank Herzel
  • Patent number: 6188293
    Abstract: An low-power consumption integrated ring oscillator capable of stable operation throughout a wide voltage range without undergoing a large frequency change includes a first constant voltage generating circuit having an enhancement mode P-MOS transistor and a depletion mode N-MOS transistor and a second constant voltage generating circuit having a depletion mode N-MOS transistor and an enhancement mode N-MOS transistor. A first constant voltage generated by the first constant voltage circuit is applied to a gate electrode of a P-MOS transistor of transmission gates connected between respective cascaded inverters of the ring oscillator. A second constant voltage generated by the second constant voltage generating circuit is connected to the gate electrode of an N-MOS transistor of the transmission gates. By this construction, current consumption is reduced and battery lifetime can be increased. The boosting circuit for writing and erasing an EEPROM circuit may be formed with the low power ring oscillator.
    Type: Grant
    Filed: September 16, 1996
    Date of Patent: February 13, 2001
    Assignee: Seiko Instruments Inc.
    Inventors: Masanori Miyagi, Yoshikazu Kojima
  • Patent number: 6166609
    Abstract: A crystal oscillation circuit that is capable of operating stably with a low power consumption includes a signal inversion amplifier and a power control circuit that controls the power voltage of this signal inversion amplifier in accordance with an oscillation output. The power control circuit includes a power voltage generation circuit that outputs a plurality of power voltages of different values; a determination control portion that determines the optimal value of the power voltage to be applied to the signal inversion amplifier, based on the oscillation output; and a multiplexer that controls the switching of the power voltage applied to the signal inversion amplifier from the power voltage generation circuit, based on the result of that determination.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: December 26, 2000
    Assignee: Seiko Epson Corporation
    Inventors: Shinji Nakamiya, Tadao Kadowaki, Yoshiki Makiuchi
  • Patent number: 6160459
    Abstract: In a temperature-compensated crystal oscillator wherein a temperature-compensated crystal oscillation circuit is driven by a constant voltage generation circuit, the constant voltage generation circuit comprises a differential circuit, a dc load for supplying feedback signals to the differential circuit, a first driver for driving the dc load under control of the differential circuit, a phase-compensation capacitor coupled between a control terminal of the first driver and an output terminal thereof and a second driver for driving the temperature-compensated crystal oscillation circuit. The second driver is the same kind of device as is used for the first driver, and is under control by the same control signal as a control signal for the first driver, sent out by the differential circuit.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: December 12, 2000
    Assignee: Citizen Watch Co., Ltd.
    Inventors: Yasuhiro Sakurai, Hiroyuki Fukayama
  • Patent number: 6147564
    Abstract: An oscillation circuit including an electrostatic protective circuit connected between a signal path and this constant voltage V.sub.reg. It comprises a first electrostatic protective circuit portion that causes any electrostatic voltage of a first polarity that invades the signal path to be selectively diverted through a diode to the constant voltage V.sub.reg side of the circuit, and any electrostatic voltage of a second polarity that invades the signal path to be selectively diverted through another diode to the ground side. This ensures that the oscillation circuit is not affected by fluctuations in the power voltage from the main power source, enabling it to oscillate at a stable frequency.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: November 14, 2000
    Assignee: Seiko Epson Corporation
    Inventors: Shinji Nakamiya, Hiroshi Yabe, Tadao Kadowaki, Yoshiki Makiuchi
  • Patent number: 6100768
    Abstract: A ring oscillator has first inverters and second inverters connected in such a manner as to form a loop; the first inverters are powered through a current controller controlling the first inverters in such a manner as to decelerate the logical operation when the power voltage is increased in magnitude; the second inverters are directly powered with the power voltages so that each second inverter accelerates the logical operation when the power voltage is increased in magnitude; and the second inverters cancel the increment of the pulse period introduced by the first inverters due to increase of the power voltage for keeping the pulse period constant.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: August 8, 2000
    Assignee: NEC Corporation
    Inventor: Takao Hirayama
  • Patent number: 6087903
    Abstract: A voltage-controlled oscillator has a feedback circuit connected to the gate of a transistor which controls a current flowing through an oscillation unit. The feedback circuit applies a voltage depending on the DC voltage of an oscillated signal to the gate of the transistor. When the oscillated signal is reduced in level to lower the DC voltage, the feedback circuit lowers the voltage applied to the gate of the transistor. The current flowing through the oscillation unit is reduced to increase the level of the oscillated signal. When the oscillated signal is increased to increase the DC voltage, the feedback circuit increases the voltage applied to the gate of the transistor. The current flowing through the oscillation unit is increased to reduce the level of the oscillated signal. The feedback process prevents the voltage-controlled oscillator from operating unstably regardless of manufacturing variations of transistors from design values.
    Type: Grant
    Filed: May 18, 1998
    Date of Patent: July 11, 2000
    Assignee: NEC Corporation
    Inventor: Hiroshi Kanno
  • Patent number: 6084483
    Abstract: An oscillator circuit residing internally to a semiconductor device for generating a clock signal for use by digital circuits. The oscillator circuit includes a voltage regulator circuit responsive to frequency selection signals for selecting a predetermined frequency and a supply voltage. The voltage regulator circuit is operative to generate a voltage reference signal having a voltage level being adjusted to compensate for variations due to temperature, process and supply voltage variations. The oscillator circuit further includes a ring oscillator circuit responsive to the voltage reference signal for generating a clock out signal having a particular frequency based upon the voltage level of the voltage reference signal. Wherein the frequency of the clock out signal remains substantially constant despite temperature, process and supply voltage variations in the semiconductor circuit.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: July 4, 2000
    Assignee: Lexar Media, Inc.
    Inventor: Parviz Keshtbod
  • Patent number: 6066991
    Abstract: A stabilized oscillator circuit is provided with a differential amplifier type oscillator circuit for generating an oscillation signal, and a differential amplifier type buffer output circuit for amplifying and outputting the oscillation signal. The stabilized oscillator is also provided with a frequency variation stabilizing circuit. This circuit controls the amount of current of the constant current source I2 of the buffer output circuit, in accordance with fluctuations of the power supply voltage applied to the oscillator circuit. Accordingly, the collector-base capacitance of the transistors of the buffer output circuit is controlled, and the oscillation frequency variations are suppressed in spite of fluctuations of the power supply voltage.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: May 23, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akio Naito, Atsushi Ogawa
  • Patent number: 6064277
    Abstract: A drive circuit for an oscillator having an LC tank reduces phase noise by maximizing the oscillation amplitude and minimizing the drive to the tank. The drive circuit utilizes a capacitive attenuator network for level shifting the oscillation signal before feeding it back to the drive transistors in the drive circuit, thereby allowing a large peak voltage swing across the tank without saturating the transistors. An adaptive control circuit controls the biasing of the drive transistors and reduces the drive to the tank when the maximum oscillation amplitude is reached so that the drive circuit replenishes just the minimum amount of energy lost in the tank during each cycle, thereby minimizing the coupling of active circuit noise into the tank.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: May 16, 2000
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Patent number: 6043718
    Abstract: Signal-controlled oscillator structures are provided that are substantially insensitive to temperature, supply voltages and fabrication processes. They include a plurality of time-delay stages that are serially connected in a closed feedback ring and each of the stages includes an amplifier, at least one capacitor and at least one signal-controlled impedance element that couples the capacitor to the amplifier. Accordingly, the frequency of the oscillator is a function of a control signal applied to the impedance elements of the stages. In an oscillator embodiment, each of the amplifiers is a differential pair of transistors, the capacitor comprises first and second capacitors and the signal-controlled impedance element comprises first and second coupling transistors that each couples a respective one of the capacitors to a different side of the differential output.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: March 28, 2000
    Assignee: Analog Devices, Inc.
    Inventors: George F. Diniz, Ronald B. Gray, III
  • Patent number: 6016081
    Abstract: A tunable oscillator includes an input for receiving an input signal from a source of precision frequency such as a CMOS quartz crystal oscillator. The tunable oscillator converts the frequency of the input signal to a first current using a frequency to current converter. The current produced is proportional to a first capacitor, C1. The first current is replicated to produce a subsequent current using a current mirror structure. The subsequent current is then used to generate a periodic signal using a current to frequency converter. The output frequency of the current to frequency converter is inversely proportional to a second capacitor, C2. As such the output frequency of the tunable oscillator is tunable by changing the value of the capacitance ratio C1/C2. The invention is suitable for applications that require a precision tunable source of frequency such as automated test equipment (ATE) and electrical instrumentation.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: January 18, 2000
    Inventor: Timothy G. O'Shaughnessy
  • Patent number: 6011444
    Abstract: An object is to keep the oscillation gain nearly constant and attain an oscillation frequency with high stability and low jitter. A voltage controlled oscillator circuit (VCO) is constructed by a VCO control circuit and a ring oscillator. The VCO control circuit has two input terminals (n input, w input). The VC control circuit multiplies the n input by the w input, and outputs a control signal (PMOS n input, NMOS n input) obtained by adding the result of multiplication to the n input. The ring oscillator is constructed by delay circuits of an odd number of stages serially connected.
    Type: Grant
    Filed: August 11, 1998
    Date of Patent: January 4, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shuichi Takada, Akihiko Yoshizawa
  • Patent number: 5973573
    Abstract: A voltage controlled oscillator (VCO) circuit having low sensitivity to fabrication process variation, operating temperature variation, and power supply noise. The circuit of the present invention includes a current source controller, a bias circuit, and a first and second VCO cell. The first and second VCO cells are coupled to each other and are coupled to the bias circuit. The VCO circuit of the present invention also includes a VCO output for transmitting a VCO output signal to external electronics. A bias circuit current source is coupled to the bias circuit to transmit a bias circuit current from a power supply to the bias circuit. A first current source is coupled to the first VCO cell to transmit a first current from the power supply to the first VCO cell. A second current source coupled to the second VCO cell to transmit a second current from the power supply to the second VCO cell.
    Type: Grant
    Filed: November 18, 1997
    Date of Patent: October 26, 1999
    Assignee: VLSI Technology, Inc.
    Inventors: Kamran Iravani, Gary Miller
  • Patent number: 5969577
    Abstract: A voltage controlled oscillator is implemented by odd inverters forming a loop, and a depletion type load transistor, a depletion type frequency control transistor and a depletion type compensating transistor supply driving current to an enhancement type driving transistor in each inverter; the compensating transistor is controlled by a reference voltage generator implemented by a series of resistor and a depletion type load transistor, and fluctuation in a fabrication process equally affects the depletion type transistors; when the depletion transistors increases the driving current, the resistor decreases the reference voltage supplied to the gate electrode of the depletion type compensating transistor, and the depletion type compensating transistor cancels the increment of the driving current so as to make the voltage controlled oscillator less sensitive to the fluctuation of the threshold.
    Type: Grant
    Filed: May 4, 1998
    Date of Patent: October 19, 1999
    Assignee: NEC Corporation
    Inventor: Makoto Kaneko
  • Patent number: 5963105
    Abstract: In an integrated crystal-less device that generates an output signal with the frequency of the output signal dependent at least in part on a resistive element, there is provided circuitry for providing compensation for the temperature coefficient the of resistive element, the circuitry includes a bandgap reference and a resistive network. The bandgap reference utilizes components having stable temperature coefficient to generate a first voltage, a reference voltage, and also to generate second voltage, a voltage proportional to absolute temperature. The resistive network includes two trimmable resistors, which are trimmed such that the resistive network in combination with the bandgap reference compensates for the absolute value of the resistive element in a selected temperature range.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: October 5, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventor: Cong Dinh Nguyen
  • Patent number: 5936478
    Abstract: A voltage controlled oscillator (VCO) is provided which can minimize the frequency shift and phase disturbance caused by noise in the input voltage to the VCO. The VCO includes a voltage-to-current converting unit, receiving the input voltage, for generating a bias voltage. A ring-oscillating unit including an odd number of cascaded ring oscillator stages (ROSC) is coupled to the voltage-to-current converting unit for generating an oscillating signal. A bias unit is coupled to the ring-oscillating unit for generating a stable DC bias voltage for the ring-oscillating unit. A current adjustment unit is coupled to the voltage-to-current converting unit and the ring-oscillating unit, which can generate a working current in response to the bias voltage for the ring-oscillating unit.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: August 10, 1999
    Assignee: Davicom Semiconductor, Inc.
    Inventors: Chien-Hsiung Lee, Yuh-Min Lin
  • Patent number: 5929715
    Abstract: An oscillation circuit is driven at reduced power by a constant voltage V.sub.reg having an absolute value that is lower than that of a power voltage V.sub.ss of a main power source. An electrostatic protective circuit provided in this oscillation circuit is connected between a signal path and this constant voltage V.sub.reg. It comprises a first electrostatic protective circuit portion that causes any electrostatic voltage of a first polarity that invades the signal path to be selectively diverted through a diode to the constant voltage V.sub.reg side of the circuit, and any electrostatic voltage of a second polarity that invades the signal path to be selectively diverted through another diode to the ground side. This ensures that the oscillation circuit is not affected by fluctuations in the power voltage from the main power source, enabling it to oscillate at a stable frequency.
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: July 27, 1999
    Inventors: Shinji Nakamiya, Hiroshi Yabe, Tadao Kadowaki, Yoshiki Makiuchi
  • Patent number: 5909150
    Abstract: A system and method for regulating the voltage at an input node of a varying current demand circuit is provided. The input node may be a power supply node and the varying current demand circuit may be a controllable oscillator. In addition, a frequency synthesizer may be formed from a phase locked loop which includes the controllable oscillator and a voltage control circuit. The voltage control circuit may receive an input control signal that varies as the current demand of the controllable oscillator varies. In response to the input control signal, the voltage control circuit may provide a more stable voltage supply to the controllable oscillator even as the current demands of the oscillator vary widely. The input control signal may be generated by generating a signal from the loop path of the phase locked loop. The frequency synthesizer may be utilized in a data storage system data detection circuit, such as for example, a data detection circuit used for recovering data from an optical disk.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: June 1, 1999
    Assignee: Cirrus Logic, Inc.
    Inventors: Matthew M. Kostelnik, David M. Pietruszynski
  • Patent number: 5889437
    Abstract: An improved apparatus for combining frequencies which is capable of generating a constant frequency when an external variation is applied thereto by implementing each block using a differential circuit, whereby it is adaptable to a mobile communication system, includes a phase frequency detector for comparing an input signal with a reference signal and for detecting a frequency or a phase error; a filter for differentially amplifying an output of the phase frequency detector for generating a lower frequency voltage corresponding to the error; a voltage control oscillator for generating a frequency corresponding to an output of the filter; a signal distribution unit for dividing the output of the voltage control oscillator into a predetermined times and for outputting a reference signal to the phase frequency detector; and a reference voltage generator for inputting reference voltages to the voltage control oscillator, respectively.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: March 30, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Seog-Jun Lee
  • Patent number: 5844446
    Abstract: An oscillator that has a substantially-constant voltage source configured such that it does not require the voltage source to be tuned to a particular voltage to oscillate a particular frequency. The oscillator has greater precision and reliability since the inputs of the comparator are periodically switched to reduce the effects of comparator bias and to equalize the voltage stresses on the inputs of the comparator. Greater precision is also achieved through the use of a discrete resistor and a discrete capacitor to define the frequency of the oscillator. The present invention provides an oscillator and method to generate a periodic signal that is tamperproof because the circuitry that defines the period is either integrated onto the integrated circuit or contained within the package containing the integrated circuit.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: December 1, 1998
    Assignee: Intel Corporation
    Inventors: Paul McAllister, Timothy Beatty
  • Patent number: 5834982
    Abstract: Supplied with a power source, an output level of an oscillating circuit gradually increases until the oscillator circuit reaches its steady oscillation. A level monitor monitors the output level, and produces a control signal if the output level is less than a predetermined level. A current producing circuit receives the control signal and produces a boost current to increase a collector current at an oscillating transistor. The output level of the oscillating circuit suddenly increases as the collector current increases. After the output level of the oscillator reaches the predetermined level, the level monitor stops production of the control signal. Therefore, the boost current stops. As a result, the collector current of the oscillating transistor has a predetermined value dependent on the circuit structure of the oscillating circuit.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: November 10, 1998
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Shigemitsu Watanabe, Hiromi Katoh
  • Patent number: 5834983
    Abstract: A bipolar negative resistance UHF oscillator having a voltage tunable resonator in its emitter circuit is operated at a fixed collector bias current and an RF detector is used as a convenient way to determine the RF current at which the oscillator is operating, by sensing the amplitude of the oscillator's output RF voltage across a constant load. An integrating error amplifier referenced to a desired detector output level responds to the actual detector output level to control the collector bias voltage for the oscillator and maintain the output of the oscillator at a fixed amplitude. Since the collector bias current is fixed, this keeps the operating point at fixed relation with respect to emitter cutoff. That relationship is chosen to be "just below" by initial selection of the constant collector bias current and the reference voltage used by the integrating error amplifier.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: November 10, 1998
    Assignee: Hewlett-Packard Company
    Inventor: Thomas M. Higgins, Jr.
  • Patent number: 5825255
    Abstract: An oscillator in which the transconductance of an amplification transistor (T0) is limited through a measurement of the potential at the input electrode (G0) of the amplification transistor (T0) by means of a differential pair (T1, T2) for safeguarding the starting of the oscillator.
    Type: Grant
    Filed: July 29, 1997
    Date of Patent: October 20, 1998
    Assignee: U.S. Philips Corporation
    Inventor: Eise C. Dijkmans
  • Patent number: 5821829
    Abstract: The system includes various circuit units each having a capacitor and a charging circuit for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop which uses one of the circuit units as an adjustable oscillator, and current transducer means which regulates the charging currents of the capacitors of the circuit units in dependence on the regulated charging current of the capacitor of the oscillator, or the error current of the PLL loop.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: October 13, 1998
    Assignees: SGS-Thomson Miroelectronics S.r.l., CO.RI.M.ME. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno
    Inventors: Melchiorre Bruccoleri, Gaetano Cosentino, Marco Demicheli, Valerio Pisati
  • Patent number: 5719534
    Abstract: A semiconductor integrated circuit has a constant voltage generation circuit and an oscillation circuit for generating a clock signal. The constant voltage generation circuit supplies a first voltage to the oscillation circuit until the clock signal is stabilized and the constant voltage generation circuit supplies a second voltage lower than the first voltage to the oscillation circuit after the clock signal has been stabilized.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: February 17, 1998
    Assignee: NEC Corporation
    Inventor: Satoru Imura
  • Patent number: 5714912
    Abstract: A voltage-controlled oscillator includes at least one voltage-controlled delay element and a reference voltage generator. The voltage-controlled delay element has first and second voltage supply inputs, a control voltage input, a signal input and a signal output. The reference voltage generator has a voltage input coupled to the control voltage input and a voltage output coupled to the first voltage supply input.
    Type: Grant
    Filed: August 22, 1996
    Date of Patent: February 3, 1998
    Assignee: LSI Logic Corporation
    Inventors: Alan Fiedler, Iain Ross Mactaggart
  • Patent number: 5686867
    Abstract: A monolithic CMOS phase-lock loop (PLL) circuit provides a high frequency of operation suitable for RF applications. The PLL produces an output clock with high spectral purity and very low jitter. The output clock has a low static phase error relative to a reference input, making the PLL useful for clock synchronizing applications, such as clock recovery elements in transmission/recording channels. The PLL provides in-phase and quadrature signals from a voltage controlled oscillator (VCO) which has two differential transconductors. The second differential transconductor has a positive input coupled to a positive output of the first differential transconductor, a negative input coupled to a negative output of the first differential transconductor, a positive output coupled to a negative input of the first differential transconductor, and a negative output coupled to a positive input of the first differential transconductor. Each differential transconductor has a negative output impedance.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: November 11, 1997
    Assignee: Marvell Semiconductor, Inc.
    Inventors: Pantas Sutardja, Sehat Sutardja
  • Patent number: 5650754
    Abstract: Voltage controlled oscillator (VCO) circuits include a VCO and voltage regulator provided on an integrated VCO module, balanced control input for the VCO, buffering of the VCO and frequency multiplication of the VCO output signal. Such improved VCO circuits are especially useful in phase-locked loop (PLL) circuits. Improved PLL circuits are also provided, including a PLL circuit with separate analog and digital grounds.
    Type: Grant
    Filed: February 15, 1995
    Date of Patent: July 22, 1997
    Assignee: Synergy Microwave Corporation
    Inventors: Shankar R. Joshi, Ulrich L. Rohde, Klaus Eichel
  • Patent number: 5638030
    Abstract: A VCO includes a ring oscillator formed by connecting a plurality of voltage controlled inverting delay cells together, a biasing circuit for providing a bias voltage to each of the voltage controlled inverting delay cells, and a source-follower transistor for providing a control voltage to the biasing circuit and voltage controlled inverting delay cells. Each of the voltage controlled inverting delay cells includes a first and a second plurality of transistors which define two outputs of the voltage controlled inverting delay cell, and a clipper transistor connected between the two outputs to short them together whenever a difference between a bias voltage provided to a gate of the clipper transistor by the biasing circuit and a voltage on either one of the two outputs exceeds a threshold voltage of the clipper transistor.
    Type: Grant
    Filed: May 31, 1996
    Date of Patent: June 10, 1997
    Assignee: Cirrus Logic, Inc.
    Inventor: He Du
  • Patent number: 5606294
    Abstract: An automatic gain control circuit and method ensure feedback for oscillator circuitry fabricated on a single semiconductor chip to adapt to the Q value established by a resonator circuit connected to the oscillator circuitry, and to ensure that gain is maximized and linearity of operation preserved within the voltage rails of the power supply.
    Type: Grant
    Filed: January 29, 1996
    Date of Patent: February 25, 1997
    Assignee: IC Works, Inc.
    Inventor: Roy Richards
  • Patent number: 5604466
    Abstract: An on-chip voltage controlled oscillator for use in an analog phase locked loop receives power from a voltage regulator which greatly reduces the noise seen by the voltage controlled oscillator. The voltage controlled oscillator has a DC bias section which supplies a relatively constant current to the multivibrator to assure a minimum operating frequency. A control signal is used to provide additional current which increases the speed of oscillation. The bias current reduces the transfer characteristics (MHz/volt) of the voltage controlled oscillator making it more immune to noise in the control signal.
    Type: Grant
    Filed: November 28, 1994
    Date of Patent: February 18, 1997
    Assignee: International Business Machines Corporation
    Inventors: Daniel M. Dreps, Raymond P. Rizzo
  • Patent number: 5596302
    Abstract: A ring oscillator having an even number of differential amplifier stages is disclosed wherein each stage includes a differential amplifier using two N-channel MOSFETs whose gates serve as the inputs and whose drains serve as the outputs of the stage. The sources of the two MOSFETs are connected together and to a current sink consisting of a cascoded structure of N-channel MOSFETs. The drains of each of the two N-channel MOSFETs serving as the differential amplifier are each connected to a respective current source provided by a P-channel MOSFET. All of the current sinks in the stages are connected as secondary legs of a first current mirror which establishes a current of I in the sinks. All of the current sources are connected as secondary legs of a second current mirror which attempts to establish a current of (1+.varies.)I/2 in each of the sources, where .varies. is a number greater than zero.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: January 21, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Angelo R. Mastrocola, Jeffrey L. Sonntag
  • Patent number: 5585765
    Abstract: A low power RC oscillator includes a low power bias circuit and an RC network. The RC network is used to form a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 17, 1996
    Assignee: American Microsystems, Inc.
    Inventor: Timothy G. O'Shaughnessy
  • Patent number: 5581216
    Abstract: A voltage controlled oscillator circuit includes a predetermined number of interconnected differential comparator cells having source connected p-channel and n-channel transistors, a biasing transistor connected to the sources of the p-channel or n-channel transistors, and clamping circuits connected to said first and second n-channel transistors. The voltage controlled oscillator circuit further includes filter circuitry for filtering the input currents to the biasing transistor.
    Type: Grant
    Filed: January 24, 1995
    Date of Patent: December 3, 1996
    Assignee: IC Works, Inc.
    Inventor: John E. Ruetz
  • Patent number: 5574405
    Abstract: A low noise amplifier (LNA)/mixer/frequency synthesizer circuit for the front end of a RF system. The LNA/mixer/frequency synthesizer circuit is fabricated as an integrated circuit utilizing 0.6 .mu.M CMOS technologies. The LNA within the circuit is provided a bias current from a power supply. Due to the CMOS construction of the LNA, a significant amount of unused power is available within the LNA. The frequency synthesizer requires the same bias current as does the LNA. The frequency synthesizer is directly coupled to the LNA, wherein the unused bias current of the LNA is used to supply the required bias current to the oscillators within the frequency synthesizer. Since the bias current used by the frequency synthesizer is drawn from the surplus of the LNA, a RF system front end is provided that has greatly reduced power requirements. The LNA is coupled to the frequency synthesizer, via an inductor.
    Type: Grant
    Filed: August 22, 1995
    Date of Patent: November 12, 1996
    Assignee: Lucent Technologies Inc.
    Inventor: Behzad Razavi
  • Patent number: 5568099
    Abstract: A VCO includes a ring oscillator formed by connecting a plurality of voltage controlled inverting delay cells together, a biasing circuit for providing a bias voltage to each of the voltage controlled inverting delay cells, and a source-follower transistor for providing a control voltage to the biasing circuit and voltage controlled inverting delay cells. Each of the voltage controlled inverting delay cells includes a first and a second plurality of transistors which define two outputs of the voltage controlled inverting delay cell, and a clipper transistor connected between the two outputs to short them together whenever a difference between a bias voltage provided to a gate of the clipper transistor by the biasing circuit and a voltage on either one of the two outputs exceeds a threshold voltage of the clipper transistor.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: October 22, 1996
    Assignee: Cirrus Logic, Inc.
    Inventor: He Du
  • Patent number: 5544120
    Abstract: A semiconductor integrated circuit includes a bias voltage regulation circuit having variable resistors which are provided between voltage output circuits of higher and lower potential sides and changes corresponding to a specified condition such as V.sub.CC and a temperature. The variable resistors and bias voltage output circuits form a V.sub.CC divider, and the variable resistors properly regulate a bias voltage supplied to an oscillation circuit corresponding to each of the specified conditions. Accordingly, if the oscillation circuit is used in an automatic refresh circuit of a PSRAM, an increase of a refresh operation frequency is suppressed regardless of an increase in V.sub.CC. Since a temperature depending variable resistor causes a resistance value to be reduced by the predetermined characteristics against the temperature increase, it is possible to set an oscillation frequency to provide a desired pause for guarantee of circuit operation.
    Type: Grant
    Filed: April 7, 1994
    Date of Patent: August 6, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Kuwagata, Ryosuke Matsuo, Keiji Maruyama, Naokazu Miyawaki, Hisashi Ueno
  • Patent number: 5491441
    Abstract: A method and apparatus are provided for translating small voltage continuous signals into large full supply signals to generate a clock signal. At least one oscillator input signal is applied to a first amplifier stage for generating an amplified voltage output signal. A first inverter is coupled to the first amplifier stage. A second inverter is coupled to the first inverter. An AC coupling capacitor couples the amplified voltage output signal to the first inverter input, and a feedback resistor is connected between the output and input of the first inverter.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: February 13, 1996
    Assignee: International Business Machines Corporation
    Inventors: Christian J. Goetschel, Robert A. Greene, Robert A. Kertis, Rick A. Philpott, Raymond A. Richetta, Timothy J. Schmerbeck, Donald J. Schulte, David P. Swart
  • Patent number: 5485126
    Abstract: A ring oscillator circuit which provides an output signal having a substantially constant, fifty (50%) percent duty cycle. The circuit includes a plurality of cascaded inverting stages, each of which has an input circuit for detecting an output voltage of a preceding inverting stage. One inverting stage provides a voltage to an output node. A clamping circuit, coupled to the output node, provides current to the output node whenever the instantaneous voltage output at the output node departs from a threshold voltage of a subsequent logic circuit. The current is such as to clamp the average voltage output to the threshold voltage. The plurality of cascaded inverting stages is coupled to power supply voltage across capacitor configured transistors. The ring oscillator circuit can be employed within a voltage controlled oscillator.
    Type: Grant
    Filed: January 25, 1994
    Date of Patent: January 16, 1996
    Assignee: International Business Machines Corporation
    Inventors: John E. Gersbach, Masayuki Hayashi