Abstract: A digital clock signal tracks a pulse stream data signal by developing two phase-lock restorative voltages through a phase-locked loop circuit which control the loop VCO that generates the clock signal, one voltage, designated as fine, being developed through a digital up/down counter and a digital/analog converter whenever the phase difference between the two signals exceeds a first threshold, and the second voltage, designated as coarse being generated by combining with the fine voltage a voltage to reduce or increase its value before application to the VCO so that the altered control voltage rapidly restores phase-lock whenever the phase difference exceeds a second threshold greater than that of the first.

Abstract: A phase detector circuit for use in a phase-lock loop is illustrated wherein a voltage pump is incorporated in the phase detector circuit so as to eliminate the utilization of a comparatively high voltage power supply which is normally required to sufficiently frequency modulate the variable frequency oscillator incorporated in most phase-lock loops.

Abstract: A new and improved apparatus and method for phase detection in binary signal tracking loops wherein two bandpass detectors are alternately interchanged between electrical connection with two local code reference tracking signals in order to cancel any adverse effect of gain imbalance in the bandpass detectors and direct current offset or drift. The incoming signal is multiplied with the two local reference signals in a mixer circuit to form first and second product signals which are each separately provided to two bandpass detectors to form error signals. A dither generator controls a first switching circuit to alternately interconnect the two local reference signals to the mixer circuit during the step of multiplying and also controls a second switching circuit to alternately interconnect the error signals to a summing circuit to form a composite error signal representing a difference in levels of the two error signals from the detectors.

Abstract: Apparatus utilizing single sideband techniques for generating a local oscator signal of high spectral purity which is offset from a relatively wide-band signal generator frequency f.sub.g = 0.8 - 220MHz by a constant IF frequency difference f.sub.o = 46KHz. The output signal is coupled from one of a plurality of phase locked oscillators having overlapping frequency ranges which act as active filters to obtain improved spectral purity.

Abstract: An FM demodulator and detector suitable for integration including a phase locked loop for locking to an FM signal and recovering the modulating signal and squelch circuitry coupled to the phase locked loop for gating out the recovered modulating signal. The phase locked loop includes an emitter coupled multivibrator whose phase shifted output is applied together with the FM signal to the squelch circuitry for quadrature phase detection, followed by filtering to derive an indication signal for controlling the gating of the recovered modulating signal.

Abstract: In the frequency measuring system disclosed herein, a control signal is generated which is related to the value of function of the input signal for a selectable delay time. The average value of the control signal is employed to control the clock rate of a shift register which is used to obtain a delayed version of the input signal, the input signal being digitized and fed into the shift register. This feedback path forms a servo-loop which adjusts the clocking rate of the shift register in correspondence with the frequency of any coherent component in the input signal, even though the input signal may be a composite comprising many random components.

Abstract: A phase-locked loop is provided with a phase detector capable of providing phase error magnitude and direction information for synchronizing a voltage controlled oscillator with a train of data pulses spaced apart in integral multiples of a fundamental clock period using an edge-triggered flip-flop and simple digital logic gates.

Abstract: A current control circuit comprises a current proportional circuit having two terminals, the current of one terminal being a proportional relationship with the current of the other terminal. An output terminal coupled with the current proportional circuit and a load through which a controlled current flows, and a constant current source. A steering circuit to which a switching signal is applied, is provided between the two terminals of the current proportional circuit and the constant current source, in order to couple the constant current source to one of the two terminals in response to the switching signal.

Abstract: A phase-locked-loop circuit configuration is described which eliminates the statistical nature of the acquisition process, thereby improving or decreasing the acquisition or lock-up-time of the loop. The circuit configuration is such that given an input signal, that occurs at time T.sub.0, the loop error signal is reduced to a level where the lock-up-time is substantially reduced and predictable to a degree of certainty heretofore unattainable. In addition, by eliminating the statistical nature of the acquisition process, lock-up-time becomes a function of controllable system parameters, such as bandwidth, gain and circuit time constants.

Abstract: An oscillator suitable for use as a local oscillator of high frequency apparatus comprises a voltage controlled oscillator, a reference oscillator, a phase detector for detecting the phase difference between the oscillation frequencies of the voltage controlled oscillator and the reference oscillator, means for filtering the output of the phase detector to produce a DC voltage and a phase synchronizing loop for feeding back the DC output of the low-pass filter means to the voltage controlled oscillator. Depending upon whether the oscillation frequency of the reference oscillator is maintained at a duty cycle of 50% or at a value other than 50%, the oscillation frequency of the voltage controlled oscillator is synchronized with an odd multiple or an integer multiple of the oscillation frequency of the reference oscillator when the oscillation frequency of the voltage controlled oscillator is varied forcibly.

Abstract: A voltage controlled oscillator circuit comprises a voltage controlled oscillator circuit, first and second constant-current circuits respectively for causing first and second constant currents, current dividing means for dividing the first constant current in accordance with an outside control voltage, and means for adjustably varying the control voltage. The oscillation frequency is controlled responsive to an input control current equal to the sum of one of the divided currents and the second constant current. The adjustment means causes an adjustment of the output currents of the current dividing means and of the free-running oscillation frequency.

Abstract: A clock pulse generating system is disclosed for recovery of read data from magnetic record media comprised of a phase-locked loop for tracking data pulses. The loop employs simple digital logic gates for phase error detection, third-order filtering for the transient phase and frequency error reduction and a voltage controlled oscillator (VCO) comprised of a capacitor charged by current from a voltage controlled current source, voltage threshold detection means, and means responsive to the threshold detection means to quickly discharge the capacitor. The VCO includes a flip-flop at its output to produce a square-wave feedback signal to the phase detection gates and to a data recovery circuit.