Pulse Width Modulator Patents (Class 332/109)
  • Patent number: 8134420
    Abstract: A communication apparatus including: a modulator which modulates a reference clock signal having a predetermined basic frequency and outputs a modulated clock signal whose value fluctuates at a first frequency with respect to the basic frequency; a PWM signal generator which generates a PWM signal at a second frequency, with the modulated clock signal being as an operation clock; a switching portion which outputs a signal by switching an analog signal on the basis of the PWM signal; a filter which passes a signal included in an output signal of the switching portion, a frequency of the passed signal being lower than a third frequency, and a setting portion which sets the first frequency and the second frequency such that a fourth frequency in which a duty value of the PWM signal fluctuates is higher than the third frequency and such that the first frequency is higher than the second frequency.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: March 13, 2012
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Tadahiro Kunii
  • Publication number: 20120057385
    Abstract: This invention relates to a power control circuit, and, an inventive PWM controller, switching circuit, high voltage discharge circuit and magnetic amplifier are also introduced and used to construct the power control circuit. The power control circuit has featured power saving and wide frequency band.
    Type: Application
    Filed: September 6, 2010
    Publication date: March 8, 2012
    Inventors: Yen-Wei Hsu, Whei-Chyou Wu
  • Publication number: 20120056688
    Abstract: New methods for generating through-zero pulse-width modulation are disclosed. In one approach, a periodic reference signal varies over time over at least one portion of the period. A pulse-width control signal varies linearly with time over at least one portion of the reference signal. The reference signal is compared with the pulse-width control value to produce a first pulse waveform. The value of a function of the control value is subtracted from the first pulse waveform to produce through-zero pulse-width modulation. In another approach, the difference in value between two ramp or sawtooth periodic waveforms is computed to produce a pulse waveform with a time-varying DC offset that varies linearly in time. The time-varying offset-term is retained with the pulse waveform, producing through-zero pulse-width modulation.
    Type: Application
    Filed: November 8, 2010
    Publication date: March 8, 2012
    Inventor: Lester F. Ludwig
  • Patent number: 8125287
    Abstract: A multichannel digital pulse width modulator/digital pulse frequency modulator uses a single ring oscillator that is shared by multiple channels. The ring oscillator has taps that can be used for least significant bit (LSB) precision of the generated PWM signal. The ring oscillator also produces a ring clock that is used to synchronize logic in the channels. Since the logic in the channels are synchronized by the ring clock, the channels can each independently produce different frequency PWM (or PFM) signals and still share the same ring oscillator.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: February 28, 2012
    Inventors: Zdravko Lukic, Eric Iozsef, Zhenyu Zhao, Jingquan Chen
  • Patent number: 8120401
    Abstract: In one embodiment, the digital pulse width modulator of these teachings includes comparators and a number of phases and capable of increasing resolution without increasing clock frequency. In another embodiment, the digital pulse width modulator (DPWM) of these teachings includes equality comparators and a number of phases and increases resolution without increasing clock frequency. A further embodiment of the system of these teachings includes a priority encoded comparator component (in one instance including a number of comparators) comparing duty cycle commands against preset minimums, that embodiment being referred to as a frequency Foldback component. Other embodiments and embodiments of the method of these teachings are also disclosed.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: February 21, 2012
    Assignee: L&L Engineering LLC
    Inventors: Stewart Kenly, Paul W. Latham, II
  • Patent number: 8121201
    Abstract: A pulse transmitter having a relatively simple structure and generating a pulse modulating signal even at a high transmission rate. In the pulse transmitter, a symbol pulse generating part (103) generates a symbol pulse of amplitude level ? when data S1 is “0,” and that of amplitude level &ggr; when data S1 is “1” in the first pulse slot section, the data pulse generating part (104) generates a data pulse of amplitude level 0 when data S2 to Sn is “0,” and that of amplitude level ? when data S2 to Sn is “1” in a later pulse slot section. The relationship of the amplitude levels keep the relation ?<?<&ggr. An adder (105) adds the symbol pulse and the data pulse and outputs the sum as a pulse modulating signal.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: February 21, 2012
    Assignee: Panasonic Corporation
    Inventors: Hitoshi Asano, Hideki Aoyagi, Michiaki Matsuo
  • Patent number: 8115564
    Abstract: Systems and methods for minimizing startup transients in digital audio controllers that may result in audible artifacts in the output of an audio amplification system. One embodiment comprises a digital PWM amplifier that includes a mechanism for controlling the amount of dead time in the audio output signal. When the amplifier starts up, the PWM signals provided to the output stage are simultaneously deasserted (i.e., there is dead time) for most of each switch period. The amount of dead time is gradually reduced over a series of switch periods until a nominal operating amount of dead time in each switch period is reached. Thus, the PWM signals are slowly ramped up from having a very large percentage of dead time (e.g., nearly 100%) to having a very small percentage of dead time (e.g., 1-2% to prevent shoot-through.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: February 14, 2012
    Assignee: D2Audio Corporation
    Inventor: Michael A. Kost
  • Patent number: 8115563
    Abstract: The frequency characteristic of a voltage-feedback class-D amplifier circuit for driving an output load is improved. A triangular-wave correction circuit which compensates a gradient of a triangular wave is provided to a triangular-wave signal generator which supplies a triangular wave signal used as a PWM carrier to a comparison circuit for performing PWM modulation of an input signal. In an area where a duty of a command value for an output circuit drive becomes about 50%, a slew rate (gradient) of the triangular wave is decreased.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: February 14, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Naoya Odagiri
  • Publication number: 20120032748
    Abstract: Systems and devices for ripple reduction in a DC/DC converter are presented. The disclosed systems and methods enable ripple reduction in discontinuous conduction mode (DCM) operation. In DCM, the inductor current peak to peak ripple may be reduced based on the load current. To achieve the reduction of the inductor peak to peak current ripple, a digital counter is used to count the time between consecutive PWM pulses. The digital output of the counter is used to control the pulse width modulation. As the digital output of the counter increases, the PWM on-time decreases. Since the PWM pulse is demanded by the load in DCM mode, the peak to peak inductor ripple is modulated by the counter, or, in turn, modulated by the load current.
    Type: Application
    Filed: August 3, 2010
    Publication date: February 9, 2012
    Applicant: Texas Instruments Incorporated
    Inventors: Xuening Li, Hal Chen, Weidong Zhu, Wenkai Wu
  • Patent number: 8111846
    Abstract: Embodiments of the present invention include switching amplifier circuits and methods. In one embodiment, the present invention includes a low distortion method of driving a switching amplifier comprising modulating an audio input signal to produce a half-wave rectified pulse-width modulated signal and a complementary half-wave rectified pulse-width modulated signal. These signals may be amplified in a power amplifier and combined in a feedback circuit to generate a first feedback signal and a second feedback signal, which may be coupled the inputs of a modulator for controlling the output signal.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: February 7, 2012
    Inventors: Hideto Takagishi, Wolf Zhang, Alan Wu
  • Patent number: 8081041
    Abstract: A practical method and system for oversampled digitally controlled DC-DC converters is presented. To minimize the switching losses while maintaining all advantages of the oversampling, “glue logic” and application specific oversampling digital pulse-width modulator are introduced. Experimental results demonstrate transient response with 50% smaller deviation than that of conventional controllers, allowing for proportional reduction in the size of the power stage output capacitor.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: December 20, 2011
    Assignee: Exar Corporation
    Inventors: Aleksandar Prodic, Zdravko Lukic, Aleksandar Radic
  • Patent number: 8076987
    Abstract: A pulse width modulating (PWM) circuit includes an activating module and a pulse generating module connected to the activating module. The activating module includes a current resource and a compensation unit. The current source generates an activating current, and the compensating unit detects the activating current and compensates the activating current if the activating current changes. The activating current is input to the pulse generating module to generate pulse voltages output by the pulse generating module.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: December 13, 2011
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chien-Min Lee
  • Patent number: 8072283
    Abstract: In a device (10) for modulating Cartesian base band signals (I, Q) a first and second mapping unit (12, 14) each map signal samples of a corresponding Cartesian signal (I, Q) to intermediary signal sections having only two non-zero levels provided symmetrically around zero for forming two intermediary signals (S1, S2). A first and second processing unit (16, 18) each map each intermediary sections of an intermediary signal (S1, S2) to segments of a corresponding pulse train (S3, S4) through providing a positive pulse in one half of a segment if the corresponding signal section has a positive signal level and a positive pulse in another half of the segment if the corresponding signal section has a negative signal level. A delay unit (20) delays the pulses of one train in relation to the other and a combining unit (22) combines the trains for provision to a power amplifier (24).
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: December 6, 2011
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Hakan Malmqvist, Leonard Rexberg
  • Publication number: 20110285472
    Abstract: Output circuits using pulse width modulation (PWM) and/or pulse density modulation (PDM) are described. In one aspect, a PWM output circuit includes a PWM modulator that operates based on a square wave signal instead of a sawtooth or triangular wave signal. In another aspect, a PDM output circuit includes a PDM modulator that uses variable reference voltages to reduce variations in switching frequency. In yet another aspect, a dual-mode output circuit supports both PWM and PDM and includes a pulse modulator and a class D amplifier. The pulse modulator performs PWM on an input signal if a PWM mode is selected and performs PDM on the input signal if a PDM mode is selected. The class D amplifier receives a driver signal from the pulse modulator and generates an output signal.
    Type: Application
    Filed: August 4, 2011
    Publication date: November 24, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventors: Brett C. Walker, Song Stone Shi
  • Publication number: 20110279076
    Abstract: An electric motor, having a stator (465), a rotor (470), and an apparatus for evaluating a signal provided for controlling said motor (110), comprises a receiving unit (430, 440) for receiving a control signal (PWM_mod), which is a pulse width modulated signal (PWM) onto which a data signal (DIR, DATA) is modulated. An evaluation unit (440) is provided for evaluating the modulated control signal (PWM_mod). The unit is configured to extract, from the modulated control signal (PWM_mod), data provided for operation of the motor (110). The control apparatus includes a signal generator (450) configured to generate, on the basis of the extracted or ascertained data provided for operation of the motor (110), at least one control signal for the motor (110), such as a commanded direction of rotation. Piggybacking other control data onto the PWM power level signal reduces hardware investment, by permitting omission of a signal lead which would otherwise be required in the motor structure.
    Type: Application
    Filed: December 24, 2009
    Publication date: November 17, 2011
    Inventor: Markus Hirt
  • Patent number: 8050319
    Abstract: The signal generating apparatus includes a signal modulating unit, a selection signal generating unit, and a phase adjusting unit. The signal modulating unit is utilized for processing a modulation upon an input signal to generate a modulated signal. The selection signal generating unit is utilized for generating at least a first selection signal. The phase adjusting unit is coupled to the signal modulating unit and the selection signal generating unit, and is utilized for receiving the modulated signal and adjusting a pulse width of the modulated signal to generate an output signal according to the first selection signal.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: November 1, 2011
    Assignee: Realtek Semiconductor Corp.
    Inventors: Shu-Yeh Chiu, Po-Chiang Wu
  • Publication number: 20110260804
    Abstract: A pulse width modulating (PWM) circuit includes an activating module and a pulse generating module connected to the activating module. The activating module includes a current resource and a compensation unit. The current source generates an activating current, and the compensating unit detects the activating current and compensates the activating current if the activating current changes. The activating current is input to the pulse generating module to generate pulse voltages output by the pulse generating module.
    Type: Application
    Filed: July 23, 2010
    Publication date: October 27, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chien-Min Lee
  • Patent number: 8044744
    Abstract: A method and apparatus is described for a time modulated signal. A cosine function is used as the basis for the signal with time intervals at the maximum and minimum values of the cosine function defining the encoded data. The received waveform is twice differentiated to provide a cosine function from which zero crossings are detected and the time intervals determined.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: October 25, 2011
    Assignee: And Yet, Inc.
    Inventor: Martin H. Graham
  • Patent number: 8044743
    Abstract: A method for reducing the transition rate of a pulse width modulated signal representing an original signal having a predetermined frequency range of interest and producing an output signal, the method including the steps of: combining pulses from a predetermined number of consecutive frames into a combined pulse; and positioning the combined pulse within the predetermined number of consecutive frames, such that the output signal has substantially the same Fourier Transform phase as the pulse width modulated signal, for at least the predetermined frequency range of interest of the original signal.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: October 25, 2011
    Assignee: DSP Group Limited
    Inventor: Israel Greiss
  • Publication number: 20110221541
    Abstract: A pulse width modulation signal generator includes a triangular wave generator, a voltage comparator, and a wave shaping circuit. The triangular wave generator generates a triangular wave signal and a pair of first and second pulse signals. The first pulse signal is pulsed for a given duration of time when the triangular wave signal reaches a minimum limit thereof. The second pulse signal is pulsed for a given duration of time when the triangular wave signal reaches a maximum limit thereof. The voltage comparator generates a first pulse width modulation signal by comparing the triangular wave signal with an externally supplied direct current signal. The wave shaping circuit generates a second pulse width modulation signal by removing chattering components occurring immediately after rising and falling edges of the first pulse width modulation signal with a masking signal generated based on the first and second pulse signals and the first pulse width modulation signal.
    Type: Application
    Filed: March 9, 2011
    Publication date: September 15, 2011
    Applicant: RICOH COMPANY, LTD.
    Inventor: Yasuo UEDA
  • Publication number: 20110215734
    Abstract: Provided is a pulse width modulation (PWM) pulse generating circuit, a device including the circuit, and a PWM control method. The circuit includes a detector to detect the frequency of the PWM clock signal and output a frequency detection signal including whether the frequency of the PWM clock signal is higher than a reference frequency, and a PWM pulse signal output unit to generate a PWM pulse signal according to a data signal, the PWM clock signal, and the frequency detection signal. When the frequency detection signal includes that the frequency of the PWM clock signal is higher than the reference frequency, the PWM pulse signal output unit generates the PWM pulse signal having a predetermined allowable pulse width or a pulse with that is higher than the predetermined allowable pulse width.
    Type: Application
    Filed: February 11, 2011
    Publication date: September 8, 2011
    Applicant: Samsung Electronics Co., Ltd
    Inventor: Yeon-Tack SHIM
  • Publication number: 20110210707
    Abstract: In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters.
    Type: Application
    Filed: February 27, 2010
    Publication date: September 1, 2011
    Inventors: Stefano Marsili, Dietmar Straeussnigg, Luca Bizjak, Robert Priewasser, Matteo Agostinelli
  • Publication number: 20110199164
    Abstract: A multichannel digital pulse width modulator/digital pulse frequency modulator uses a single ring oscillator that is shared by multiple channels. The ring oscillator has taps that can be used for least significant bit (LSB) precision of the generated PWM signal. The ring oscillator also produces a ring clock that is used to synchronize logic in the channels. Since the logic in the channels are synchronized by the ring clock, the channels can each independently produce different frequency PWM (or PFM) signals and still share the same ring oscillator.
    Type: Application
    Filed: February 18, 2010
    Publication date: August 18, 2011
    Applicant: EXAR CORPORATION
    Inventors: Zdravko Lukic, Eric Iozsef, Zhenyu Zhao, Jingquan Chen
  • Patent number: 7999629
    Abstract: The present disclosure relates to I/Q modulation circuits, devices, and methods.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: August 16, 2011
    Assignee: Infineon Technologies AG
    Inventor: Timo Gossmann
  • Publication number: 20110193648
    Abstract: A pulse width modulation (PWM) signal generator generates a PWM signal having a specified effective PWM duty resolution for a corresponding cycle window. The PWM signal generator receives an N-bit value representing a duty to be implemented and sets values X and Y to the M least significant bits and the N-M most significant bits, respectively, of the N-bit value. The value M can be determined based on the value N and a maximum implementable frequency of a clock signal used to time the generation of each PWM cycle. The PWM signal generator generates a cycle window of 2M PWM cycles, each PWM cycle of the cycle window having a duty of either Y or Y+1. The number of PWM cycles in the cycle window having the duty Y+1 is based on the value X and the PWM cycles having a particular duty are contiguous within the cycle window.
    Type: Application
    Filed: February 10, 2010
    Publication date: August 11, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Bin Zhao
  • Publication number: 20110181369
    Abstract: A digital pulse width modulation device includes a counter, a first comparator and a second comparator, wherein the first and second comparators are connected in parallel with each other and in series with the counter. The counter is capable of sending a count signal to the first and second comparators simultaneously, starting a count when the counter receives a clock signal, and transmitting the count signal to the first and second comparators. If the first comparator receives a pulse duty width signal, the count of the count signal will generate a pulse output of the corresponding duty cycle. If the second comparator receives a total pulse duty length signal and the count of the count signal reaches a number of the total length, a clear signal will be outputted to the counter to reset the counter to zero, so as to achieve the effect of correcting the output pulse.
    Type: Application
    Filed: January 26, 2010
    Publication date: July 28, 2011
    Inventors: Ta-I LIU, Chung-Chih Tung
  • Publication number: 20110182096
    Abstract: Provided is a control technique of a PWM conversion type power converter capable of compensating for a voltage error due to voltage drop mainly at a switching element and managing a switching time of a PWM signal at the same time, and capable of suppressing increase/decrease of software operation load and addition of a hardware circuit to the minimum. A semiconductor integrated circuit having a PWM signal generating unit which generates a PWM signal is provided with a PWM timer unit including a counter counting a pulse width of a pulse signal inputted from the outside with delay from a PWM signal, a register loading a counter value of the counter in synchronization with the PWM signal, and an A/D converting unit converting an analog signal serving as a source signal of the pulse signal inputted from the outside to a digital signal.
    Type: Application
    Filed: April 5, 2011
    Publication date: July 28, 2011
    Inventors: Takahiro Suzuki, Yasuo Notohara, Tsunehiro Endo, Yuji Mori
  • Patent number: 7978107
    Abstract: An example digital-to-analog converter (DAC) for a power supply controller includes a first node, a second node, a current source, and a switch. The first node is to be coupled to provide a first analog signal to a variable oscillator of the power supply controller. The second node is to be coupled to provide a second analog signal to the variable oscillator of the power supply controller. The switch is coupled to the current source and configured to couple the current source to the first node to provide current to the first analog signal in response to a binary digit received by the DAC, where the switch is further configured to couple the current source to the second node to provide current to the second analog signal in response to a complement of the binary digit.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: July 12, 2011
    Assignee: Power Integrations, Inc.
    Inventors: Mingming Mao, Yury Gaknoki
  • Patent number: 7965151
    Abstract: A pulse width modulator (PWM) includes a driver and a two-way integrator. The driver is coupled to output a first and a subsequent period of a PWM signal. Both the first and the subsequent periods include the PWM signal changing between first and second states. The two-way integrator is coupled to integrate an input current and coupled to generate a duty ratio signal in response to integrating the input current. The driver determines a duty factor of both the first and the subsequent periods by setting the PWM signal to the second state in response to the duty ratio signal. The two-way integrator includes a capacitor that integrates the input current during the first period by charging the capacitor and integrates the input current during the subsequent period by discharging the capacitor.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: June 21, 2011
    Assignee: Power Integrations, Inc.
    Inventors: Jonathan Edward Liu, Giao Minh Pham
  • Publication number: 20110128085
    Abstract: System and method for digitizing analog voltage signals. A first voltage signal may be received at a comparator. A ramp signal may be received at the comparator. The ramp signal may be generated by a ramp generator. An output signal may be generated by the comparator. The output signal may indicate whether the analog voltage signal or the ramp signal is greater. The output signal may be conveyed to logic circuitry by the comparator. Control information may be conveyed by the logic circuitry to the ramp generator. The ramp generator may generate the ramp signal based on the control information. The logic circuitry may determine a digital representation of the first voltage signal based on the output signal from the comparator and the control information.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 2, 2011
    Inventors: Joe A. Marrero, Lynn R. Kern, Scott C. McLeod
  • Patent number: 7953145
    Abstract: A PWM signal generating circuit outputs a stable PWM signal for increasing and decreasing a duty ratio at a predetermined rate within a predetermined period without requiring an improvement of a process capacity of a CPU as compared to a conventional PWM signal generating circuit. The PWM signal generating circuit consists of a plurality of circuit elements each of which outputs a digital signal. A first counter circuit periodically changes a PWM signal output therefrom into an active state. A second counter circuit changes the PWM signal, which has been changed into the active state by the first counter circuit, into an inactive state within each cycle. The second counter circuit increases and decreases an active-to-inactive time period from a time when the PWM signal is changed into the active state to a time when the PWM signal is changed into the inactive state.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: May 31, 2011
    Assignee: Ricoh Company, Ltd.
    Inventor: Makoto Matsushima
  • Patent number: 7952446
    Abstract: A microcomputer includes: a CPU executing a predetermined calculation process; and a PWM timer generating a PWM pulse. The PWM timer includes a RAM for storing a duty value of the PWM pulse and a PWM controller for generating the PWM pulse. The PWM controller includes a PWM counter for counting up from a predetermined value as an initial value. The PWM pulse has an unit waveform, which is generated based on comparison between the duty value of the RAM and an output value of the PWM counter. The RAM outputs a new duty value at every comparison without functioning the CPU so that the duty value of the PWM pulse is changed in chronological order.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: May 31, 2011
    Assignee: Denso Corporation
    Inventors: Tomoharu Hayakawa, Hiroyuki Morita, Hitoshi Ishikawa, Tatsuya Aizawa, Yu Takeuchi
  • Patent number: 7953328
    Abstract: An apparatus and a method for a I-Q quadrature modulation transmitter monitor a phase bias between an I branch and a Q branch of the I-Q quadrature modulation transmitter. The I-Q quadrature modulation transmitter includes the I-branch, the Q-branch equipped with a phase bias, and a tap. The apparatus is installed between the tap and the phase bias, and monitors the phase between the I branch and the Q branch which phase is introduced by the phase bias. The apparatus includes the following components: a module squarer, receiving signal from the tap and outputting a module square of the received signal; a multiplier, to multiplying data of the I-branch, data of the Q-branch and the module square to output a multiplied signal; and an averager, averaging the multiplied signal output by the multiplier. The phase between the I branch and the Q branch may be corrected according to monitoring results.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: May 31, 2011
    Assignee: Fujitsu Limited
    Inventors: Zhenning Tao, Jens C. Rasmussen
  • Publication number: 20110115460
    Abstract: A module including a case; an electrical switching device configured to control power to a load; and a controller coupled to the electrical switching device. The electrical switching device and the controller are substantially encapsulated by the case. Functionality of the module can be exposed through a communication interface in the case.
    Type: Application
    Filed: March 31, 2010
    Publication date: May 19, 2011
    Applicant: LEVITON MANUFACTURING CO., INC.
    Inventors: Randall B. Elliott, Richard A. Leinen, Robert L. Hick, Kevin Parsons, Subramanian Muthu
  • Patent number: 7940141
    Abstract: A first situation indicating that the system is in a power-on situation or an un-mute situation, or a second situation indicating that the system is in a power-off situation or in a mute situation, is detected. When the first situation is detected, a differential PWM signal including a plurality of pulses each having a gradually increased or reduced width and the subsequent pulse train of 50% duty cycle pulses is generated and, if the output of an audio processor is in a stable situation, sent to the amplifier via a multiplexer. When the second situation is detected, the differential PWM signal including a plurality of pulses each having a gradually reduced width and the subsequent pulse train of no signal is generated and, at the same time, the generated pulses are sent to the amplifier via the multiplexer.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: May 10, 2011
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Willem Johan Stapelbroek
  • Publication number: 20110095837
    Abstract: There is disclosed a method and apparatus for generating, in an envelope tracking modulator of a mobile radio transmission apparatus, a pulse width modulated, PWM, signal representing a time-varying signal, the method comprising, for each time cycle: a) generating a rising ramp from a first voltage level to a second voltage level; b) generating a falling ramp from the second voltage level to the first voltage level; c) detecting a rising slope of the time-varying signal crossing the falling ramp and responsive thereto if the PWM signal is at the first voltage level, transitioning the PWM signal to the second voltage signal; d) detecting a falling slope of the time-varying signal crossing the rising ramp, and responsive thereto if the PWM signal is at the second voltage level, transitioning the PWM signal to the first voltage signal.
    Type: Application
    Filed: April 20, 2009
    Publication date: April 28, 2011
    Applicant: NUJIRA LIMITED
    Inventor: Martin Paul Wilson
  • Publication number: 20110095836
    Abstract: The invention provides a method and a modulation circuit for pulse width modulation with feedback, wherein a pulse width modulated signal is provided on the basis of an input signal and a reference signal that is periodic and has a reference frequency. The pulse width modulated signal is provided in that an output signal is switched from a first voltage level to a second voltage level in dependence on a comparison between the input signal and the reference signal at least once in every cycle of the reference signal, and in that at least once at a fixed moment in time in every cycle the pulse width modulated signal is switched from the second voltage level to the first voltage level. Furthermore, a periodic correction signal is added for compensation of the switching from the second voltage level to the first voltage level in the pulse width modulated signal.
    Type: Application
    Filed: April 22, 2009
    Publication date: April 28, 2011
    Applicant: Hypex Electronics B.V.
    Inventor: Bruno Johan Georges Putzeys
  • Patent number: 7932790
    Abstract: Switch-modulation of a radio-frequency power amplifier by-representing the input signal by the I-signal (1) and Q-signal (9) of the complex components (I+j?Q), and pulse width modulating the I-signal and the Q-signal separately to create a modulated I-signal pulse sequence (3a) and a modulated Q-signal pulse sequence (3b). Further, the pulses corresponding to negative sample values are time-shifted relative the pulses corresponding to positive sample values, and each pulse of the I-signal pulse sequence is delayed by introducing a delaying time shift.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: April 26, 2011
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Leonard Rexberg, Håkan Malmqvist, Thomas Lejon
  • Patent number: 7915938
    Abstract: A multiple channel Digital Pulse Width Modulator (DPWM) can include a single delay locked loop with a delay line, the delay line producing a number of outputs. Circuitry can use a delay line mask to mask a portion of the delay line outputs to produce a modified outputs so as to prevent premature pulse width reset. Jitter tolerance look ahead circuits can prevent jitter from causing premature reset of pulse width modulated signals. The pulse width modulators can include multiple alternately used multiplexers so that the operation of the pulse width modulators is not affected by the load time of the multiplexers.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: March 29, 2011
    Assignee: Exar Corporation
    Inventors: Eric Iozsef, Irv Lustigman, Abdelkarim Gadiri
  • Patent number: 7911283
    Abstract: A low noise oscillator includes a resonator 102 that is excited with a pulsed signal (i.e., an impulse of energy) to replace energy lost to parasitic resistive losses once every Nth period (where N=1, 2, 3 . . . ). The resonating signal is monitored by a level detector and when the signal falls below a predetermined threshold, the pulse generator outputs a pulse or adjusts pulse width, pulse amplitude (or both) of a pulsed signal to create the necessary impulse for application to the resonator to recoup losses resulting from resonator operation. A phase shifting circuit may be provided to ensure the pulses are time aligned with the resonating signal to reduce noise.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: March 22, 2011
    Assignee: Nortel Networks Limited
    Inventors: Adrian J. Bergsma, Charles Nicholls
  • Patent number: 7907664
    Abstract: Systems and method to compress digital video based on human factors expressed as a desirability score are provided. A particular method includes passing a digital input signal through a pulse-width modulator and passing an output of the pulse-width modulator through a power switching device. An output of the power switching device has a plurality of pulses. The method includes receiving the output of the power switching device at a first input of a comparator and receiving a reference voltage at a second input of the comparator. The method includes determining a net signal based on an output of the comparator and determining a timing error signal based on the net signal and the digital input signal. The method also includes adjusting the digital input signal to compensate for harmonic distortion based at least in part on the timing error signal.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: March 15, 2011
    Assignee: Sigmatel, Inc.
    Inventors: Zukui Song, Michael Determan
  • Publication number: 20110058399
    Abstract: A signal converter for generating switch drive signals for a multi-level converter comprises an input for a first pulse-width-modulation signal and a second pulse-width-modulation signal and an input for a polarity signal indicating a first polarity or a second polarity. The signal converter comprises four outputs for four switch drive signals for driving four switches of the multi-level converter. Also, the signal converter comprises a logic circuit for driving the switch drive signals in dependence on the polarity signal. The logic is configured to drive the switch drive signals in dependence on the polarity signal.
    Type: Application
    Filed: December 12, 2007
    Publication date: March 10, 2011
    Applicant: MITSUBISHI ELECTRIC EUROPE B.V. NIEDERLASSUNG DEUTSCHLAND
    Inventors: Marco Honsberg, Thomas Radke
  • Patent number: 7898352
    Abstract: The present invention relates in general to transferring the envelope information of a polar modulated signal to a varying pulsewidth signal, while the phase modulation is direct transferred to the phase modulation of this PWM signal. Accordingly, the resultant signal is a PWM-PPM-signal. Such a signal can efficiently amplified by use of switching amplifying stages. By the present invention four pre-distorted baseband signals are applied basically to 4 linear RF mixers and a two adders, which are, the only needed external RF building blocks to build the modulator according to the invention. That is, the basic idea of the invention resides in the way of modulation of the four baseband signals and the way of combining of the RF modulated signals.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: March 1, 2011
    Assignee: NXP B.V.
    Inventors: Jan Vromans, Gerben W. De Jong, Mihai A. T. Sanduleanu
  • Patent number: 7898353
    Abstract: A circuit includes a clock conditioning circuit which receives an encoded clock signal, and provides first and second conditioned clock signals in response. The clock conditioning circuit adjusts a period of the first and second conditioned clock signals in response to an adjustment of a period of the encoded clock signal. The circuit includes a modulator which receives the first and second conditioned clock signals.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: March 1, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Merit Y. Hong, Bruce M. Newman
  • Patent number: 7889787
    Abstract: The invention provides a novel method of transmit beamforming, which allows compact analog implementation of complex digital algorithms without compromising their features. It is aimed to support envelope shaping, apodization, and phase rotation per channel and per firing. Each of three embodiments represents a complete transmit channel driven by pulse-width modulated (PWM) waveforms stored in a conventional sequence memory. PWM signals controls the transmit pulse envelope (shape) by changing the duty cycle of the carrier. Beamformation data are loaded prior to a firing via serial interface. Under the direction of a controller, the circuitry allows high precision (beyond sampling rate) phase rotation of the carrier. It also provides transmit apodization (aperture weighting), which maintains an optimal trade-off among low sidelobe level and widening of the mainlobe. Implementing such an IC, the manufacturing cost of a high-end ultrasound system can be reduced.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: February 15, 2011
    Assignee: Supertex, Inc.
    Inventor: Lazar A. Shifrin
  • Patent number: 7889019
    Abstract: A digital circuit implementing pulse width modulation controls power delivered in what one can model as a second order or higher order system. An exemplary control plant could embody a step-down switch mode power supply providing a precise sequence of voltages or currents to any of a variety of loads such as the core voltage of a semiconductor unique compared to its input/output ring voltage. An algorithm produces a specific sequence of pulses of varying width such that the voltage or current delivered to the load from the system plant closely resembles a critical damped step response. The specific pulse width modulation sequence controls a plant that provides a near critical damped step response in one embodiment without a feed-forward or feedback loop physically embodied in the control system thereby reducing the parts cost or control semiconductor production yield cost while enhancing noise immunity and long term reliability of the control system.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: February 15, 2011
    Inventor: Andrew Roman Gizara
  • Patent number: 7872542
    Abstract: An integrated circuit includes a delay lock loop (DLL) circuit that generates incremental delay line signals and a delay line output signal based on a received clock signal. A pulse-width modulation (PWM) control module generates a PWM control signal. A tunable circuit having variable capacitance is controlled based on the delay line output signal, the PWM control signal, and one of the incremental delay line signals.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: January 18, 2011
    Assignee: Marvell World Trade Ltd.
    Inventors: Jody Greenberg, Sehat Sutardja
  • Patent number: 7872546
    Abstract: A dual mode modulator is proposed for driving a power output stage having a serial connection of high-side power FET and low-side power FET. The dual mode modulator includes a PWM modulator operating under a PWM-frequency and a PFM modulator for controlling the power output stage. To improve the dynamic load regulation of the dual mode modulator, a dynamic frequency booster can be added to the dual mode modulator to boost up the PWM-frequency from its normal operating frequency during a PFM-to-PWM mode transition period. Secondly, a dynamic slew rate booster can be added to boost up an error amplifier slew rate of the PWM modulator from its normal operating slew rate during the mode transition period. Thirdly, a dynamic turn-off logic circuit can be added to turn off the low-side power FET during the mode transition period.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: January 18, 2011
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Behzad Mohtashemi, Allan Chang
  • Patent number: 7868711
    Abstract: An arrangement for pulse-width modulating an analog or digital input signal is provided. The non-linear distortion generated in the pulse-width modulator is precompensated by applying a signal with reversed error to the pulse-width modulator. The signal with reversed error is generated by a further pulse-width modulator that receives the input signal and whose output signal is subtracted from twice the input signal. The arrangement may e.g. be used to drive class D audio amplifiers.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: January 11, 2011
    Assignee: NXP B.V.
    Inventors: Petrus Antonius Cornelis Maria Nuijten, Lûtsen Ludgeras Albertus Hendrikus Dooper
  • Patent number: 7847651
    Abstract: A method and apparatus to generate a pulse width modulated signal from a sampled digital signal by chaotic modulation. The method includes generating predetermined chaotic intervals having random interval values using a chaotic interval generator, and generating the pulse width modulated signal from a reference signal and the sampled digital signal during each of the chaotic intervals. Thus, electromagnetic interference (EMI) that affects an audio amplifier can be remarkably reduced.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: December 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Vladislav Shimanskiy