Abstract: A printed circuit board having a micro strip line, a printed circuit board having a strip line and a method of manufacturing thereof are disclosed. The printed circuit board having a micro strip line in accordance with an embodiment of the present invention includes a first insulation layer, a signal line buried in one surface of the first insulation layer, a plurality of conductors penetrating through the first insulation layer and being disposed on both sides of the signal line in parallel with the signal line, and a ground layer formed to be electrically connected to the conductor on the other surface of the first insulation layer.

Abstract: A signal bus includes multiple interconnects for transporting electronic signals. The interconnects have different physical path lengths and different structures to equalize the different the physical path lengths, so that the electronic signals traverse the corresponding interconnects in same period of time.

Abstract: A differential transmission circuit includes a pair of transmission line conductors and a ground conductor layer, wherein the pair of transmission line conductors include a first straight line region where both the pair of transmission line conductors extend in parallel to each other in a first direction with a first width in a first layer, a first cross region where one of the pair of transmission line conductors is formed in the first layer, the other thereof is formed in a second layer, and the pair of transmission line conductors cross the each other in a three-dimensional manner, the first cross region being disposed on the front side of the first straight line region, and wherein each of the widths of the pair of transmission line conductors in the first cross region is smaller than the first width.

Abstract: The invention relates to a method and a device for pseudo-differential transmission in interconnections used for sending a plurality of electrical signals. The ends of an interconnection having 4 transmission conductors and a return conductor distinct from the reference conductor are each connected to a termination circuit. Three damping circuits are connected between the return conductor and the reference conductor. The transmitting circuits receive at their inputs the signals from the 4 channels of the two sources, and are connected to the conductors of the interconnection. The receiving circuits are connected to the conductors of the interconnection, each receiving circuit being such that the 4 channels of a source connected to a transmitting circuit in the activated state are sent to the four channels of the destinations without noticeable external crosstalk.

Abstract: A wireless transceiver chip and calibration method thereof are disclosed. The wireless transceiver chip comprises at least one receiver, at least one transmitter, and at least one switch. The switch is connected to the receiver and the transmitter respectively for being applied to switch between the receiver and the transmitter. Practically, the switch is provided within the wireless transceiver chip, such that the pin count of the wireless transceiver chip can be reduced.

Abstract: A printed circuit board includes a first layout layer, a second layout layer, a copper foil layer, a first via and a second via. The first layout layer has a first signal line and a second signal line, each of which has a curved first portion. The second layout layer has a third signal line and a fourth signal line, each of which also has a curved first portion. The curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are coupled to the first via and the second via. In this case, the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line cooperatively generate spiral inductance characteristic.

Abstract: Various apparatus and methods of addressing crosstalk in a circuit board are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first layer of a circuit board with a first signal trace and forming a second layer of the circuit board with a second signal trace. A first guard trace is formed on the first layer and offset laterally from the first signal trace but at least partially overlapping the second signal trace and a second guard trace is formed on the second layer and offset laterally from the second signal trace but at least partially overlapping the first signal trace.

Abstract: Disclosed is a structure for precision control of electrical impedance of signal transmission circuit board. A substrate forms thereon a plurality of first signal transmission lines, and a first covering insulation layer is formed on a first surface of the substrate to cover a surface of each first signal transmission lines and each spacing section formed between adjacent first signal transmission lines. Each first signal transmission lines can transmit a differential mode signal or a common mode signal.

Abstract: The invention relates to a method and a device for transmission through interconnections used for sending a plurality of electrical signals. An interconnection having 4 transmission conductors and a reference conductor cannot be modeled as a uniform multiconductor transmission line. Each end of the interconnection is connected to a termination circuit. The transmitting circuits receive at their inputs the signals from the 4 channels of the two sources, and are connected to the interconnection. A transmitting circuit in the activated state produces modal electrical variables, each modal electrical variable being allocated to one and only one channel. The receiving circuits are connected to the interconnection, each receiving circuit being such that the signals of the 4 channels of a source connected to a transmitting circuit in the activated state are sent to the four channels of the destinations, without noticeable echo and internal crosstalk.

Abstract: Disclosed herein is a flat uniform transmission line having an electromagnetic shielding function. The flat uniform transmission line includes a strip transmission line, an insulating layer, and electromagnetic shielding layers. The strip transmission line is formed on a dielectric layer made of functional polymer material, and includes a plurality of strip lines. The plurality of strip lines are configured to be a ground line, or to transmit signals. The insulating layer is formed on the strip transmission line. The electromagnetic shielding layers are respectively formed on the insulating layer and beneath the strip transmission line.

Abstract: Provided is a microstrip transmission line for reducing far-end crosstalk. In a conventional microstrip transmission line on a printed circuit board, a capacitive coupling between adjacent signal lines is smaller than an inductive coupling therebetween, so that far-end crosstalk occurs. According to the present invention, the capacitive coupling between the adjacent signal lines is increased to reduce the far-end crosstalk. A vertical-stub type microstrip transmission line is provided.

Abstract: Methods and apparatus are disclosed, such as those involving an interconnection layout for an integrated circuit (IC). One such layout includes a plurality of differential pairs of lines. Each differential pair has two lines including one or more parallel portions extending substantially parallel to each other. Each pair also includes a shield line. Each of the shield lines includes one or more parallel portions interposed between the parallel portions of one of the pairs of differential lines. One or more of the shield lines are electrically connected to a voltage reference, such as ground. This layout is believed to reduce or eliminate intra-pair coupling as well as inter-pair coupling.

Abstract: A multilayer complementary-conducting-strip transmission line (CCS TL) structure is disclosed herein. The multilayer CCS TL structure includes a substrate, and n signal transmission lines being parallel and interlacing with n-1 mesh ground plane(s), therein a plurality of inter-media-dielectric (IMD) layers are correspondingly stacked with among the n signal transmission lines and the n-1 mesh ground plane(s) to form a stack structure on the substrate, therein n?2 and n is a natural number. Whereby, a multilayer CCS TL with independent of each layer and complete effect on signal shield is formed to provide more flexible for circuit design, reduce the circuit area and also diminish the transmission loss.

Abstract: A printed circuit board includes signal transmitting units that transmit signals, signal receiving units that receive signals, and a plurality of signal lines that connect the signal transmitting units and the signal receiving units. A resistor having a value Rp [?] of resistance with a first tolerance is provided between two signal lines that are adjacent to each other. In addition, a capacitor element that is connected in series to the resistor and that has a value Cp [F] of capacitance with a second tolerance is also connected between the two signal lines. In relation to the rise time tr [s] of the signals output from the signal transmitting units, the value Rp of resistance of the resistor and the value Cp of capacitance of the capacitor element are set such that an expression (Cp×Rp)×0.9 tr/3?(Cp×Rp)×1.1 is satisfied.

Abstract: A method and apparatus provide an IP telephone or similar device with a mechanism to receive and at least briefly loop back discovery signals received from a telecommunications device such as an Ethernet switch while not permitting the loop back of data packet signals. No mechanical relays are required and the circuitry can be fully integrated on an integrated circuit using commonly available techniques, if desired.

Abstract: Disclosed herein is a flat uniform transmission line having an electromagnetic shielding function. The flat uniform transmission line includes a strip transmission line, an insulating layer, and electromagnetic shielding layers. The strip transmission line is formed on a dielectric layer made of functional polymer material, and includes a plurality of strip lines. The plurality of strip lines are configured to be a ground line, or to transmit signals. The insulating layer is formed on the strip transmission line. The electromagnetic shielding layers are respectively formed on the insulating layer and beneath the strip transmission line.

Abstract: Transmission lines for electronic devices such as microstrip and stripline transmission lines may be provided that include patterned conductive lines and a conductive paint in the patterned conductive lines. The transmission lines may include one or more planar ground conductors. The ground conductors may include conductive lines arranged in a crosshatch pattern with spaces between the conductive lines. The ground conductors may also include conductive paint in spaces within the crosshatched pattern. The ground conductors may form one or more ground planes for the transmission lines.

Abstract: Long-side length a1 to a5 of rectangular waveguide tubes in a long-side direction (magnetic field direction) become greater, the shorter a line length is (the closer a rectangular waveguide tube is to the center). ai and Li are set such that line lengths L1 to L5 of each rectangular waveguide tube is Li=m?gi (i=1 to 5, and m is a positive integer number), with guide wavelengths of each rectangular waveguide tube, determined by the length a1 to a5, as ?g1 to ?g5. Hence, the line length Li of each rectangular waveguide tube can be arbitrarily set, while maintaining a phase relationship between high frequency signals transmitted by each rectangular waveguide tube. When a difference in line lengths between rectangular waveguide tubes is set to be shorter, the degree of freedom in arrangement of the rectangular waveguide tubes can be improved while suppressing the degradation of propagation characteristics caused by temperature change.

Abstract: An isolator provides bidirectional data transfer for a plurality of communications channels. First and second dies are located on first and second sides of a voltage isolation barrier and have a first and second plurality of digital data input/output pins associated therewith. First circuitry on the first die and third circuitry on the second die serializes a plurality of parallel digital data inputs from the digital data input/output pins onto one link across the barrier and transmits synchronization clock signals associated with the digital data inputs over a link across the barrier. Second circuitry on the second die and fourth circuitry on the first die de-serializes the digital data inputs from the first link onto the second digital data input/output pins and receives the first synchronization clock signal associated with the digital data inputs on the second link.

Abstract: A microstrip line for a printed wiring board such as a flexible printed wiring board which includes a sandwiched thin insulating layer and cannot use a solid grounding conductor, the microstrip line being such that shape of grounding conductors relative to signal lines remains unchanged even in the presence of a curved shape and that overlapping areas of signal lines and grounding conductors located opposite to each other remain unchanged even in case of exposure misalignment or stack misalignment. A printed wiring board with a microstrip line structure in which signal lines are curved include wire-type grounding conductors located across an insulating layer from the signal lines, characterized in that wiring pitch of the grounding conductors is 1/n of width of the signal lines (where n is a natural number of 1 or 2).

Abstract: A distributed, diode mixer circuit includes a plurality of passive diode mixer cores including at least first and second passive diode mixer cores including doubly-balanced diodes in symmetrical balanced configuration forms, each mixer core having a pair of differential reference nodes driven by the reference signal and a pair of differential nodes driven by the data signal and a reactive impedance network including one or multiple reactive elements or transmission lines connected between the like nodes of each the first and second mixer cores.

Abstract: A circuit substrate includes a first pair of ground lines, a second pair of ground lines, a plurality of first connection lines, a plurality of second connection lines and a plurality of conductive pillars. The first and second pairs of ground lines are located on first and second surfaces of the substrate, respecteively. The pillars are located in the substrate and vertically conducted between the first pair of ground lines and the second connection lines and between the second pair of ground lines and the first connection lines, and the first and second pairs of ground lines are conducted, so that a 3-D grounding circuit loop is formed. Moreover, a first pair of signal lines is disposed between the first connection lines for grounding and a second pair of signal lines is disposed between the second connection lines for grounding to get a better signal integrity.

Abstract: A waveguide structure including a first member, made of metal, in a surface portion of which a first groove having a linear shape is formed; and a second member, made of resin, in a surface portion of which a second groove having a linear shape is formed and to the surface of which metal plating is applied. The first member and the second member are arranged in such a way that the first groove and the second groove face each other so that a waveguide tube is configured. The first member in the surface portion of which the first groove is formed and the second member in the surface portion of which the second groove is formed are held in such a way that a gap exists between the respective surfaces thereof.

Abstract: A signal bus includes multiple interconnects for transporting electronic signals. The interconnects have different physical path lengths and different structures to equalize the different the physical path lengths, so that the electronic signals traverse the corresponding interconnects in same period of time.

Abstract: A network filter for connecting a converter to a 3-phase supply network includes in each phase a toroidal inductor which is connected in series with a commutation inductor at a respective first connection point, and a capacitor circuit having at least four capacitances, wherein first terminals of a first, a second and a third capacitance is connected in one-to-one correspondence to a respective one of the first connection points. Second terminals of the first, second and third capacitance are connected at a common second connection point, with a fourth capacitance being connected between ground and the common second connection point. The windings of the toroidal inductors can be formed of the connecting lines which connect the corresponding first terminals to the three phases of the supply network.

Abstract: A printed circuit board (PCB) capable of decreasing wireless wide area network (WWAN) noise generated due to internal signal interference occurring in the PCB is disclosed. The PCB printed circuit board includes a first layer, a second layer, and at least one insulating layer formed between the first and second layers. The PCB board further includes a first signal line group disposed on the first layer while including a plurality of first signal lines each supplying a first signal, isolation patterns disposed on the first layer such that the isolation patterns are arranged between adjacent ones of the first signal lines, respectively, to prevent the adjacent first signal lines from interfering with each other, and a second signal line group disposed on the second layer while including a plurality of second signal lines each supplying a second signal different from the first signal. The second signal line group corresponds to the isolation patterns.

Abstract: A pair of signal transmission lines includes an aggressor line and a victim line parallel to the aggressor line. A plurality of time delay modules is linked in the aggressor line. A plurality of time delay modules is linked in the victim line. A total delay time of the time delay modules of the victim line is equal to a total delay time of the time delay modules of the aggressor line.

Abstract: A circuit board includes a signal line plane and a reference plane. The signal line plane has at least a first transmission line and a second transmission line formed thereon. The reference plane has a conductive region and at least a non-conductive region. The first transmission line and the second transmission line overlap the conductive region in a thickness direction of the circuit board. The non-conductive region includes at least a first part and a second part connected to the first part, where the second part is positioned between the projection of the first transmission line on the reference plane and the projection of the second transmission line on the reference plane, and has no intersection with at least one of the projection of the first transmission line and the projection of the second transmission line.

Abstract: The techniques described herein permit the application of methods for increasing the performance of a communications system on a medium made up of N conductors (21 to 2N) and a reference plane (4) by means of injecting signals (11 to 1N) inductively in up to N combinations of the conductors, including injection in common mode (11), such that said injected signals can be made to be orthogonal to each other.

Abstract: The invention relates to an interfacing device for transmission through interconnections used for sending a plurality of electrical signals. The interfacing device of the invention comprises signal terminals and a common terminal. A receiving circuit delivers, when the receiving circuit is in the activated state, “output signals of the receiving circuit” determined each by a linear combination of the voltages between one of the signal terminals and the common terminal, to the destination. A termination circuit is such that, when it is in the activated state, it is approximately equivalent, for the signal terminals and the common terminal, to a (m+1)-terminal network such that, for small signals, the impedance matrix, with respect to the common terminal, of the (m+1)-terminal network is equal to a wanted non-diagonal matrix of size m×m.

Abstract: A set top box is described including multiple tuners and an apparatus and method for controlling signal level. The apparatus includes a signal splitter for splitting signal power of a signal between an input and at least two outputs, a controller coupled to an output, and a circuit controlled by the controller and selectively coupled to the signal splitter for altering a signal transfer response characteristic of the signal. The method describes controlling the signal level of signals outputted by a signal splitter including determining a signal quality characteristic of one of the output signals and altering a signal response in the signal splitter in response to comparing the signal quality characteristic to a predetermined signal quality characteristic threshold.

Abstract: The present invention provides a multi-phase layout structure and method. The layout structure comprises: a first layout layer; a second layout layer substantially parallel to the first layout layer; a plurality of traces, each transmitting a signal, and the plurality of signals having a phase difference between each other; wherein a horizontal coupling capacitance is provided between two neighboring traces configured on the same layer of the first layout layer and the second layout layer, a vertical coupling capacitance is provided between two neighboring traces configured on different layers of the first layout layer and the second layout layer, and the plurality of traces have substantially the same total coupling capacitance wherein the total coupling capacitance is defined by the horizontal coupling capacitance and the vertical coupling capacitance.

Abstract: To reduce cross-talk, an integrated circuit may include a uniform signal trace for a first signal; and a pair of non-uniform signal traces forming a differential pair for a differential signal. The pair of non-uniform signal traces near the uniform signal trace.

Abstract: Disclosed herein is a flat uniform transmission line having an electromagnetic shielding function. The flat uniform transmission line includes a strip transmission line, an insulating layer, and electromagnetic shielding layers. The strip transmission line is formed on a dielectric layer made of functional polymer material, and includes a plurality of strip lines. The plurality of strip lines are configured to be a ground line, or to transmit signals. The insulating layer is formed on the strip transmission line. The electromagnetic shielding layers are respectively formed on the insulating layer and beneath the strip transmission line.

Abstract: Various apparatus and methods of addressing crosstalk in a circuit board are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first layer of a circuit board with a first signal trace and forming a second layer of the circuit board with a second signal trace. A first guard trace is formed on the first layer and offset laterally from the first signal trace but at least partially overlapping the second signal trace and a second guard trace is formed on the second layer and offset laterally from the second signal trace but at least partially overlapping the first signal trace.

Abstract: Methods and apparatus are disclosed, such as those involving an interconnection layout for an integrated circuit (IC). One such layout includes a plurality of differential pairs of lines. Each differential pair has two lines including one or more parallel portions extending substantially parallel to each other. Each pair also includes a shield line. Each of the shield lines includes one or more parallel portions interposed between the parallel portions of one of the pairs of differential lines. One or more of the shield lines are electrically connected to a voltage reference, such as ground. This layout is believed to reduce or eliminate intra-pair coupling as well as inter-pair coupling.

Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.

Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.

Abstract: A micro-strip transmission line may include a plurality of conductors, wherein each conductor has a compensating portion and a remaining portion. The compensating portion can compensate for far-end crosstalk in the remaining portion. In one example, the compensating portion has a longitudinal section and a plurality of alternating stubs extending from lateral surfaces of the longitudinal section.

Abstract: Systems having three coupled transmission lines designed in such a way that any two of which taken together can be used as a differential transmission line with a roughly equal differential mode characteristic impedance while achieving high level of common mode characteristic impedance. The high level of common mode characteristic impedance is achieved by arrangement of the three transmission lines in distinct planes along a transmission axis.

Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.

Abstract: Which permits the application of methods for increasing the performance of a communications system on a medium made up of N conductors (21 to 2N) and a reference plane (4) by means of injecting signals (11 to 1N) inductively in up to N combinations of the conductors, including injection in common mode (11), such that said injected signals can be made to be orthogonal to each other.

Abstract: An impedance matching system, a network analyzer having the same, and an impedance matching method thereof are disclosed. The system includes a signal extractor to extract an output signal and an input signal having at least a portion of an electric current outputted through a load and at least a portion of an electric current inputted through the load, respectively, a processor to process the output signal and the input signal extracted from the signal extractor, a comparator to compare a phase and an amplitude of the output signal with a phase and an amplitude of the input signal, respectively, a coefficient calculator to calculate a reflection coefficient using the comparative result provided from the comparator, and a circuit controller to generate a signal for controlling a matching circuit, which matches the phase and the amplitude of the output signal with the phase and the amplitude of the input signal, respectively, so as to ensure the reflection coefficient to have a predetermined value.

Abstract: Methods and apparatus are disclosed, such as those involving an interconnection layout for an integrated circuit (IC). One such layout includes a plurality of differential pairs of lines. Each differential pair has two lines including one or more parallel portions extending substantially parallel to each other. Each pair also includes a shield line. Each of the shield lines includes one or more parallel portions interposed between the parallel portions of one of the pairs of differential lines. One or more of the shield lines are electrically connected to a voltage reference, such as ground. This layout is believed to reduce or eliminate intra-pair coupling as well as inter-pair coupling.

Abstract: A substrate having two high frequency components positioned on substrates typically used for lower frequency devices. A coplanar strip transmission line, providing for transmission of high frequency signals, comprises first, second and third parallel, spaced conductive traces positioned on a surface of the substrate, wherein the substrate defines a first slot extending from the first surface into the substrate and between the first and second parallel, spaced conductive traces and a second slot extending from the first surface into the substrate and between the first and third parallel, spaced conductive traces. Optionally, an antenna is coupled to the coplanar strip transmission line and comprises first and second antenna traces, the substrate defining a third slot therebetween.

Abstract: The communication system includes a trunk line constituted of first and second signal lines for transmitting differential signals, a plurality of branch lines each branching from the trunk line and connected with a node, and at least one reflection prevention circuit connected between the first and second signal lines. The reflection prevention circuit includes a rectifier circuit configured to inhibit a current from flowing between the first and second signal lines when a voltage between the differential signals is smaller than or equal to a predetermined voltage, and allow a current to flow between the first and second signal lines when the voltage between the differential signals is larger than the predetermined voltage, and a resistive element connected in series to the rectifier circuit between the first and second signal lines.

Abstract: A micro-strip transmission line capable of reducing far-end crosstalk is provided. The micro-strip transmission line having a serpentine shape is capable of reducing the far-end crosstalk of the transmission line by increasing capacitive coupling between neighboring transmission lines by allowing parallel micro-strip transmission lines to have serpentine shapes. In the structure of the micro-strip transmission line having the serpentine shape, it is possible to reduce the far-end crosstalk of the transmission line by increasing capacitive coupling between neighboring transmission lines by allowing parallel micro-strip transmission lines to have serpentine shapes.

Abstract: High speed printed circuit boards (PCBs) are disclosed comprising a dielectrics systems with the back-side trenches, prepregs, signal lines and ground-plans, wherein the signal line and ground-plan are located on the dielectrics. Using of the open trenches in the substrate help to reduce the microwave loss and dielectric constant and thus increasing the signal carrying speed of the interconnects. Thus, according to the present invention, it is possible to provide a simple high speed PCB using the conventional material and conventional PCB manufacturing which facilitates the design of circuits with controlled bandwidth based on the trench opening in the dielectrics, and affords excellent reliability. According to this present invention, high speed PCB with the interconnect system contains whole portion or portion of interconnects for high speed chips interconnects and that have have the dielectric system with opened trench or slot to reduce the microwave loss.

Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.

Abstract: A forward-reverse crosstalk compensation method is provided for compensating capacitance/inductance on a printed circuit board of a connector. The method includes a forward compensation process and a reverse compensation process. The forward compensation process compensates the unbalanced capacitance in the plug of the connector by using the parallel conductive lines or wires. The reverse compensation process can be used to compensate the unbalance capacitance/inductance caused by the forward compensations in the same pair combination of the connector. In both forward compensation and reverse compensation processes, electro-magnetic fields, such as capacitors, can be formed to balance the capacitance/inductance on the printed circuit board of the connector.