Plural Resistors Patents (Class 338/260)
  • Patent number: 10527578
    Abstract: A heater section includes a plate-like ceramic body (a first substrate layer 1, a second substrate layer 2, and a third substrate layer 3) having a longitudinal direction (front-rear direction) and a short-length direction (left-right direction), and a heater 72 disposed within the plate-like ceramic body and including a lead section 79 and a heating section 76 connected to the lead section 79. The heating section 76 includes a straight portion 78 extending along the longitudinal direction, and a lead side curved portion 77b connected to one of the ends of the straight portion 78 closer to the lead section 79. The lead side curved portion 77b has a lower resistance per unit length than the straight portion 78 at one or more temperatures in the range of 700° C. to 900° C.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: January 7, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Yusuke Watanabe, Takao Murase, Masashi Yasui
  • Patent number: 9906002
    Abstract: The invention provides a RC module (20) for a RC voltage divider for an electrical substation insulated by a dielectric fluid. The RC module (20) comprises first and second plane conductive supports (210a,b) separated from each other in order to co-operate with the dielectric fluid to form a capacitor, when the module equips an electrical substation. The module further comprises at least one resistive element (220a,b) electrically connecting together the first and the second conductive supports (210a,b), the resistive element comprising a printed circuit (222) defining a resistive electric circuit including a plurality of resistive 2-terminal components mounted in series. The invention also provides a resistive element and a voltage divider.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: February 27, 2018
    Assignee: ALSTOM TECHNOLOGY LTD
    Inventor: Patrice Juge
  • Patent number: 9659875
    Abstract: A chip part includes a substrate, an element formed on the substrate, and an electrode formed on the substrate. A recess and/or projection expressing information related to the element is formed at a peripheral edge portion of the substrate.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: May 23, 2017
    Assignee: ROHM CO., LTD.
    Inventor: Hiroki Yamamoto
  • Patent number: 9513154
    Abstract: A connector is used to bring a harness from a level sensor that is arranged in the oil pan and detects a level of oil in the oil pan, out of the oil pan. The connector includes a contact that is electrically connected to the level sensor, and a housing that retains the contact. The housing includes a housing portion that is housed in the connector mounting hole, and a clip attaching groove and a flange portion that are arranged sandwiching the housing portion. A clip and the flange portion sandwich the oil pan, such that the connector is attached to the oil pan, by the housing portion being housed in the connector mounting hole, and the clip being attached to the clip attaching groove.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: December 6, 2016
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tomonori Futamura, Masayoshi Nakai
  • Patent number: 8987864
    Abstract: There is provided an array type chip resistor including: a chip body, four pairs of lower electrodes disposed on both sides of a lower surface of the chip body and formed so as to be extended to edges of the chip body, side electrodes formed so that the lower electrodes are extended to sides of the chip body, and a resistor interposed between the lower electrodes on the lower surface of the chip body and electrically connected to the lower electrode through a contact portion, wherein when a width of the side electrode is defined as d1, a distance between adjacent side electrodes is defined as d2, and a height of the side electrode is defined as h, in the case in which d1/d2 is 0.5 to 1.5, a value of h is 4,300/d1 ?m or above and is 0.24d2+87.26 ?m or less.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jung Il Kim, Ha Sung Hwang, Hae In Kim, Ichiro Tanaka, Oh Sung Kwon
  • Patent number: 8766762
    Abstract: An overvoltage protection element is disclosed that includes a housing, connections for electrically connecting the overvoltage protection element to a current path or a signal path to be protected The overvoltage protection element further includes two varistors arranged inside the housing and electrically connected in parallel, and a center electrode arranged at least partially between the varistors. The housing has two housing halves made of metal and electrically connected to each other, wherein the center electrode is isolated from the housing halves and is electrically connected at the opposite sides of the electrode to a first connection area of a varistor and wherein the two varistors and the center electrode are sandwiched between the two housing halves. One housing half is designed as a cover, which has a covering section and a recessed engagement section.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: July 1, 2014
    Assignee: Phoenix Contact GmbH & Co. KG
    Inventors: Christian Depping, Christina Grewe, Joachim Wosgien, Philip Jungermann
  • Publication number: 20130106567
    Abstract: An overvoltage protection element is disclosed that includes a housing, connections for electrically connecting the overvoltage protection element to a current path or a signal path to be protected The overvoltage protection element further includes two varistors arranged inside the housing and electrically connected in parallel, and a center electrode arranged at least partially between the varistors. The housing has two housing halves made of metal and electrically connected to each other, wherein the center electrode is isolated from the housing halves and is electrically connected at the opposite sides of the electrode to a first connection area of a varistor and wherein the two varistors and the center electrode are sandwiched between the two housing halves. One housing half is designed as a cover, which has a covering section and a recessed engagement section.
    Type: Application
    Filed: April 15, 2011
    Publication date: May 2, 2013
    Applicant: PHOENIX CONTACT GMBH & CO. KG
    Inventors: Christian Depping, Christina Grewe, Joachim Wosgien, Philip Jungermann
  • Patent number: 8179225
    Abstract: A ceramic electronic component has a chip element body having a conductor arranged inside, external electrodes, and a discrimination layer. The chip element body has first and second end faces facing each other, first and second side faces being perpendicular to the first and second end faces and facing each other, and third and fourth side faces being perpendicular to the first and second end faces and to the first and second side faces and facing each other. The external electrodes are formed on the first and second end faces, respectively, of the chip element body. The discrimination layer is provided on at least one side face out of the first side face and the second side face in the chip element body. The chip element body is comprised of a first ceramic. The discrimination layer is comprised of a second ceramic different from the first ceramic and has a color different from that of the third and fourth side faces.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: May 15, 2012
    Assignee: TDK Corporation
    Inventors: Toshihiro Iguchi, Akitoshi Yoshii, Akira Goshima, Kazuyuki Hasebe
  • Patent number: 8098127
    Abstract: A resistor assembly for use at microwave frequencies, has a substrate with first and second contacts or metalizations at either end of the substrate. A third contact or metallization is provided on one side of the substrate generally in the middle thereof. First and second resistors, as thin film resistors, are provided on the substrate extending between the first and second contacts and the third, central contact. A third resistor is provided on the other side of the substrate, connecting the first and second contacts, so as to form a delta configuration of three resistors. This then provides a resistor configuration that can be used to implement a three port Wilkinson splitter or combiner.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: January 17, 2012
    Assignee: ITS Electronics Inc.
    Inventor: Ilya Tchaplia
  • Patent number: 7880581
    Abstract: A PTC thermistor includes two electric conducting plates connected with different electrodes and an intermediate insulating plate clamped between the two electric conducting plates. The intermediate insulating plate has its surface bored with openings at locations respectively corresponding with those of each PTC thermal resistance member for the PTC thermal resistance member to be engaged therein. The intermediate insulating plate can surely separate and insulate the two different-electrode electric conducting plates and stably fix the PTC thermal resistance members in position.
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: February 1, 2011
    Inventor: Chung-Tai Chang
  • Patent number: 7804392
    Abstract: A switching resistor for an electric switching device having an electrically conductive resistive material. The resistive material is a resistive material on a synthetic material basis.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: September 28, 2010
    Assignee: Siemens AG
    Inventors: Heiko Jahn, Lutz-Rüdiger Jänicke
  • Patent number: 7765680
    Abstract: There is provided a method of producing a printed circuit board incorporating a resistance element capable of adjusting resistance after the resistance element has been formed and assuring a high accurate resistance. A method of producing a printed circuit board incorporating a resistance element using carbon paste includes the steps of: forming through holes 5, 6, 25 and 26 or a bottomed hole in a double-sided copper clad laminate; applying noble metal plating into the through hole or the bottomed hole; filling the through hole or the bottomed hole with carbon paste; subjecting the carbon paste with which the thorough hole or the bottomed hole is filled to noble metal plating, conducting treatment and plating to form a conductive layer; forming an opening 18 in the conductive layer on the end of the through hole filled with the carbon paste; and performing trimming through the opening to adjust the resistance of the resistor formed by the carbon paste.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: August 3, 2010
    Assignee: Nippon Mektron, Ltd.
    Inventor: Garo Miyamoto
  • Patent number: 7714411
    Abstract: An electro-optical device includes: a substrate; a plurality of wiring lines which is formed on the substrate; and an IC which is mounted on the substrate so as to be electrically connected to the plurality of wiring lines. At least a pair of wiring lines among the plurality of wiring lines include a first conductive layer formed on the substrate and a second conductive layer formed on at least the first conductive layer. The first conductive layer and the second conductive layer have different resistance values. The first conductive layer of one of the pair of wiring lines has a plurality of first resistors each extending toward the other wiring line, and the second conductive layer of the other wiring line has a second resistor extending toward the one wiring line. The plurality of first resistors is connected to the second resistor.
    Type: Grant
    Filed: May 22, 2006
    Date of Patent: May 11, 2010
    Assignee: Epson Imaging Devices Corporation
    Inventors: Fusashi Kimura, Shinichi Kobayashi, Yuki Okuhara, Kenichi Tajiri
  • Publication number: 20100039212
    Abstract: A dry-type high-voltage load system apparatus has a space-saving structure, which is resistant to chain breaking, arc discharge and vibration, and a method of preventing the chain breaking and the arc discharge for use with the system apparatus. The system apparatus includes a dry-type high-voltage load system circuit including a low-voltage bank formed of lower-capacity configuration banks which include three-phase resistor circuits which are low-voltage resistor circuit. A high-voltage bank includes lower-capacity configuration banks for a high-voltage resistor circuit formed of three-phase resistor circuits. The three-phase resistor circuits are connected to a high-voltage power generator in parallel and are in the form of a Y-connection of three resistor arrays so that an isolated and independent neutral point is unconnected to other neutral points. The three phase resistor circuits may also be in the form of a ?-connection.
    Type: Application
    Filed: April 16, 2009
    Publication date: February 18, 2010
    Applicant: Kouken Company, Limited
    Inventor: Kesafumi Matsumoto
  • Patent number: 7649437
    Abstract: A multilayer positive temperature coefficient thermistor that has a BaTiO3-based ceramic material contained as a primary component in semiconductor ceramic layers, the ratio of the Ba site to the Ti site is in the range of 0.998 to 1.006, and at least one element selected from the group consisting of La, Ce, Pr, Nd, and Pm is contained as a semiconductor dopant. In this multilayer positive temperature coefficient thermistor, a thickness d of internal electrodes layer and a thickness D of the semiconductor ceramic layers satisfy d?0.6 ?m and d/D<0.2. Accordingly, even when the semiconductor ceramic layers have a low sintered density such that an actual-measured sintered density is 65% to 90% of a theoretical sintered density, a multilayer positive temperature coefficient thermistor having a low rate of temporal change in room-temperature resistance can be obtained without performing any complicated processes, such as a heat treatment. When the content of the semiconductor dopant is 0.1 to 0.
    Type: Grant
    Filed: March 17, 2008
    Date of Patent: January 19, 2010
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenjirou Mihara, Atsushi Kishimoto, Hideaki Niimi
  • Publication number: 20090251276
    Abstract: An electrical assembly includes a housing and at least two PTC (Positive Temperature Coefficient) resistor elements in the housing. Each of the at least two PTC resistor elements includes a body having a flat construction and electrodes on main surfaces of the body. Each of the at least two PTC resistor elements includes an electrically insulating envelope. The housing is closed.
    Type: Application
    Filed: November 8, 2007
    Publication date: October 8, 2009
    Inventor: Werner Kahr
  • Patent number: 7563024
    Abstract: For some embodiments, skin temperature of a computer system may be determined by using a network of thermistors and conductors. A thermistor may be positioned at an intersection of two conductors. Current may be supplied to a first conductor. Voltage may be measured at a second conductor. Resistance information associated with the thermistor may be determined. Skin temperature may be determined from the resistance information.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: July 21, 2009
    Assignee: Intel Corporation
    Inventors: Efraim Rotem, Rajiv K. Mongia
  • Publication number: 20090039804
    Abstract: To provide a voltage division resistor for acceleration tube, an acceleration tube, and an accelerator capable of reducing the cost of the acceleration tube and enhancing the operation efficiency.
    Type: Application
    Filed: August 25, 2005
    Publication date: February 12, 2009
    Applicant: KYOTO INSTITUTE OF TECHNOLOGY
    Inventors: Shigehiro Nishino, Ryoichi Ono
  • Patent number: 7423514
    Abstract: A thermally stabilized device is described. Single or multiple input ports are accommodated and single and multiple power ports are described. The variation of resistance of a resistor subject to varying power dissipations is minimized by injecting complementary power dissipation and thermally linking it to the resistor. In this manner the temperature of a resistor may be maintained constant even though it dissipates varying amounts of power.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: September 9, 2008
    Assignee: Agilent Technologies, Inc.
    Inventor: Stephen Bolin Venzke
  • Publication number: 20070196051
    Abstract: A substrate for forming passive elements in chip type has a top surface, a thickness, multiple parallel grooves, multiple through holes and multiple chip regions. The parallel grooves are formed on the top surface of the substrate. The through holes are formed between and across two adjacent parallel grooves, and each through hole is separated from other through holes and has smooth inner walls. The chip regions are defined between adjacent through holes and parallel grooves and are arranged in a matrix.
    Type: Application
    Filed: December 15, 2006
    Publication date: August 23, 2007
    Applicant: WALSIN TECHNOLOGY CORP.
    Inventors: Shiow-Chang Luh, Chun-Hsiung Kuo
  • Patent number: 7227443
    Abstract: A fixed resistor network has an insulating substrate, a plurality of film resistors arranged on a top surface of the insulating substrate, terminal electrodes formed for the film resistors on each lengthwise sidewall of the insulating substrate at a given pitch along the sidewall, and recesses provided between the terminal electrodes. The occurrence of solder bridges between the terminal electrodes during solder mounting and the occurrence of chipping in the terminal-electrode-forming areas between the recesses on the lengthwise sidewall are both reduced by making the width of the recesses along the lengthwise sidewall either 0.44 to 0.48 times or 0.525 to 0.625 times the pitch.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: June 5, 2007
    Assignee: Rohm Co., Ltd.
    Inventor: Takahiro Kuriyama
  • Patent number: 7081805
    Abstract: A thermally stabilized device is described. Single or multiple input ports are accommodated and single and multiple power ports are described. The variation of resistance of a resistor subject to varying power dissipations is minimized by injecting complementary power dissipation and thermally linking it to the resistor. In this manner the temperature of a resistor may be maintained constant even though it dissipates varying amounts of power.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: July 25, 2006
    Assignee: Agilent Technologies, Inc.
    Inventor: Stephen Bolin Venzke
  • Patent number: 7049929
    Abstract: Circuit panels are provided with resistors in vias extending between the top and bottom surfaces of the panels. The resistors may be formed by depositing a composite in each via, as by depositing a dispersion of a conductive material and a dielectric or by depositing one or more thin layers of a conductor. The resistors may be disposed at interior locations buried within a multilayer circuit board formed by laminating one or more panels having such resistors with one or more additional elements.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: May 23, 2006
    Assignee: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Patent number: 6911896
    Abstract: A resistor string that may have two resistor matrices laid out back-to-back with selected or all nominally equipotential nodes of the two matrices being interconnected. In certain applications, the matrix may have switch connections at each node, with the second matrix being an inactive matrix that may have the same number or different number, typically fewer resistors than the first matrix. In another embodiment, separate matrices may be used, and the inactive matrix may be smaller and have fewer resistors of a lower value to minimize the effect of gradients across the substrate. Preferred matrices and node connection switch configurations, as well as various embodiments of these and other features of the invention are disclosed.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: June 28, 2005
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Richard Nicholson, Simon Churchill, Srikanth Govindarajulu
  • Patent number: 6856235
    Abstract: A method of making resistors includes providing a sacrificial layer. Conductive material is then formed over a region of the sacrificial layer. Resistive material is then deposited over the first surface of the sacrificial layer such that the resistive material covers the sacrificial layer and the conductive material. A portion of the sacrificial layer is then removed to expose the conductive material. A method of making resistors includes the steps of providing a sacrificial layer, removing at least a portion of the sacrificial layer from regions of the sacrificial layer so as to create a plurality of cavities within the sacrificial layer, plating said cavities with a conductive material, disposing resistive material over the first surface of the sacrificial layer such that resistive material covers the sacrificial layer and said conductive material, and removing at least a portion of said sacrificial layer to expose the conductive material.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: February 15, 2005
    Assignee: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Publication number: 20040233035
    Abstract: A microelectronic assembly, including a microelectronic element such as a semiconductor chip and a dielectric material covering the chip and forming a body having a bottom surface. The assembly includes conductive units having portions exposed at the bottom surface, posts extending upwardly from said exposed portions and top flanges spaced above the bottom surface.
    Type: Application
    Filed: June 30, 2004
    Publication date: November 25, 2004
    Applicant: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Patent number: 6747543
    Abstract: A resistor for driving a motor for an air conditioner blower is provided, in which internal resistance bodies are stacked over one after another between insulation plates in the resistor, to accordingly reduce the volume of the entire of the resistor is reduced, and the resistance bodies are separated into a plurality of metal thin plates not a single plate and stacked over one after another, to thereby increase a line width. Also, a temperature fuse is disposed externally. The air conditioner fan blower motor driving resistor is obtained by stacking resistance bodies made of at least two metal thin plates over one after another. The resistance bodies are formed of an independent resistance body forming a second resistance body and a third resistance body on two separate thin plates, and another independent resistance body forming a first resistance body on another thin plate.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: June 8, 2004
    Assignee: Dong
    Inventor: Peong Ju Lim
  • Publication number: 20040090752
    Abstract: A combination run capacitor/positive temperature coefficient resistor/overload (CAP/PTCR/OL) module is described. The cover of the combination housing includes a capacitor compartment and terminal openings for receiving blade terminals of a run capacitor. The terminal openings in the cover align with blade receiving receptacles coupled to the PTCR start circuit. The blade terminals of a run capacitor are inserted into the receptacle openings and into electrical engagement with the blade receiving receptacles. The capacitor is supported and protected by a potting mixture filling the capacitor compartment.
    Type: Application
    Filed: November 7, 2002
    Publication date: May 13, 2004
    Inventors: Alan Joseph Janicek, Kennett Ray Fuller, Mark Alan Heflin
  • Patent number: 6720859
    Abstract: A temperature compensating device comprises one or more columnar thermistors embedded within a substrate. Because the thermistors are substantially covered by the substrate, they are less susceptible to changes in air temperature and to temperature gradients. Moreover, within the substrate the thermistors can be made thicker and smaller in lateral area, permitting more compact, less expensive devices that exhibit improved high frequency performance. The devices can advantageously be fabricated using the low temperature co-fired ceramic (LTCC) process.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: April 13, 2004
    Assignee: Lamina Ceramics, Inc.
    Inventor: Joseph Mazzochette
  • Patent number: 6606023
    Abstract: A composite circuit protection device includes a laminar insulating member and first and second laminar circuit protection devices.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: August 12, 2003
    Assignee: Tyco Electronics Corporation
    Inventors: Justin Chiang, Shou-Mean Fang, William C. Beadling
  • Patent number: 6577225
    Abstract: An array resistor network that has a high density of resistors per unit area. The array resistor network includes a ceramic substrate having a top and bottom surface. Apertures extend through the substrate between the top and bottom surfaces. Recesses are located on opposite edges of the substrate. Resistors are located on the top surface. Each resistor is located between a recess and an apertures. Inner conductors are connected to one end of the resistors. The Inner conductors are located on the top surface and extend through the aperture onto the bottom surface. Outer conductors are connected to another end of the resistors. The outer conductors are located on the top surface and extend along the recess onto the second surface.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: June 10, 2003
    Assignee: CTS Corporation
    Inventor: David L. Poole
  • Patent number: 6555787
    Abstract: A heating element, including a sensor conductor, two resistive conductors, with one resistive conductor arranged on one side of the sensor conductor and an other resistive conductor arranged on an other side of the sensor conductor such that the sensor conductor and the two resistive conductors are substantially parallel and plastic electrical insulation surrounding the sensor conductor and each resistive conductor.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: April 29, 2003
    Assignee: Dekko Heating Technologies, Inc.
    Inventors: James A. Horn, Stephen L. Hardin, Steven M. Nimtz
  • Patent number: 6556123
    Abstract: A chip PTC thermistor is provided which is capable of increasing the rate of increase in resistance when an overcurrent is applied, thereby increasing the breakdown voltage. The PTC thermistor comprises: a first main electrode and a first sub-electrode disposed on a first face of a conductive polymer with PTC properties; a second main electrode and a second sub-electrode disposed on a second face of the conductive polymer, which is facing the first face; and first and second side electrode and disposed on side faces of the conductive polymer. Cut-off sections are provided to the vicinity of joints of the first main electrode and the first side electrode, and joints of the second main electrode and the second side electrode.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: April 29, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiyuki Iwao, Junji Kojima, Akira Tanaka, Takashi Ikeda, Kiyoshi Ikeuchi
  • Patent number: 6542066
    Abstract: An electrical device comprising a pair of electrodes, three substrates, and PTC elements inserted between the substrates, each PTC element having metal layers on both surfaces, in which each of the outer substrates has a metal layer on the inner surface, the two metal layers being electrically connected to one of the electrodes and in electrical contact with the respective metal layers of the PTC elements facing said metal layers of the outer substrates, and the center substrate has a metal layer on both surfaces, such metal layers being electrically connected to the other electrode and in electrical contact with the respective metal layers of the PTC elements facing said metal layers of the center substrate. This electrical device can increase the area of the PTC elements without increasing the projected area as a whole.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: April 1, 2003
    Assignee: Tyco Electronics Raychem K.K.
    Inventors: Takashi Hasunuma, Mikio Iimura, Katsuaki Suzuki
  • Patent number: 6507272
    Abstract: Enhanced linearity, low switching perturbation resistor string matrices. The resistor strings are arranged in an array of a plurality of rows of resistive elements and electrically arranged with rows equally spaced above and below the physical centerline of the array being coupled together in an opposite sense. Preferably also physically adjacent rows are equally spaced from the center of the electrical order of rows. This connection prevents accumulation of errors due to vertical and horizontal resistance gradients over the array. Also node selection by controlling node select transistors coupled to column select lines to select one node in each row, and also controlling row select transistors to select the row of the desired node minimizes settling time after a tap change by inducing equal and opposite voltage changes at points close together along the resistor string, whether in the array of the present invention or in the snake configuration.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: January 14, 2003
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Richard Nicholson, Simon Churchill, Hao Tang
  • Patent number: 6392530
    Abstract: A plurality of protective resistors can be easily inserted between circuit forming elements, and opposite ends of each protective resistor can be properly press-contacted to each circuit forming element. The protective resistor can be easily replaced when broken. A resistor array board comprises a porous plate having a plurality of through-holes arranged in array and opening at opposite surfaces thereof; and a plurality of protective resistors removably loosely inserted into the through-holes, respectively. Each of the protective resistors are resiliently retained by an electrically conductive spring element, and opposite ends of each of the protective resistors are press-contacted with the circuit forming elements which are arranged in opposing relation on surfaces of the porous plates.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: May 21, 2002
    Assignee: Yamaichi Electronics Co., Ltd.
    Inventor: Etsuji Suzuki
  • Patent number: 6288627
    Abstract: A resistor may be embedded into a substrate. A portion of the resistor may be exposed, by segmenting the substrate, for instance, so that the resistor may be trimmed to a desired resistance level. Alternatively, a portion of a resistor may be embedded into a substrate, with another portion of the resistor being disposed on the outer surface of the substrate. The portion of the resistor on the outer surface may be trimmed to adjust the resistance of the resistor to a desired level.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: September 11, 2001
    Assignee: Intermedics Inc.
    Inventor: Kenneth R. Ulmer
  • Patent number: 6237411
    Abstract: A limit-level sensor for measuring level of a liquid has a resistance element which has an electric resistance which suddenly varies a transition temperature which lies above the maximum liquid temperature. The resistance element is first heated by electric current. Thereupon, the electric resistance of the resistance element is measured. When the resistance element is covered with liquid, the heat generated by the electric current is led away so that the temperature of the resistance element is less than its transition temperature. If the resistance element is not covered by liquid, this heat is scarcely led away, so that the temperature of the resistance element remains above the transition temperature.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: May 29, 2001
    Assignee: Mannesmann VDO AG
    Inventors: Ralf Schimmel, Stefan Lipfert, Joachim Acht, Werner Wallrafen
  • Patent number: 6236301
    Abstract: A deflection sensing system for detecting deflection includes one or more deflection sensors between opposing sets of extensions. When one set of extensions is moved toward an opposing set of extensions, the deflection sensors are deflected. A preferred deflection sensor is a flexible potentiometer, which has a resistance that changes as the flexible potentiometer is deflected A flexible potentiometer includes a variable resistance material on a substrate. In a preferred system, the flexible potentiometer includes a cantilevered section, which is deflected about an extension with respect to the remainder of the flexible potentiometer, or with respect to a portion of the substrate not including the variable resistance material. A flexible potentiometer experiences less stress when in cantilevered form than when stretched between two extensions. In either case, the extensions may be joined to first and second corrugated plates.
    Type: Grant
    Filed: September 4, 1996
    Date of Patent: May 22, 2001
    Assignee: Sensitron, Inc.
    Inventors: Gordon B. Langford, Cesar A. Montano, Greg A. Putnam
  • Patent number: 6215388
    Abstract: A plurality of PTC material layers and a plurality of metal plates are sandwiched together with one adjacent pair of metal plates connected in series through one layer of PTC material. The remaining PTC material layers are connected in parallel with the one layer by selectively interconnecting the other metal plates with the one adjacent pair of metal plates.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: April 10, 2001
    Assignee: Therm-Q-Disc, Incorporated
    Inventor: Jeffrey A. West
  • Patent number: 6087923
    Abstract: A low capacitance chip varistor and a fabrication method thereof are described, which are capable of protecting the electronic elements of an electronic instrument from an external and internal surge and being well applicable to an electronic element which requires a low capacitance, and the low capacitance chip varistor includes at least one sheet support layer formed of a member having a low dielectric constant, a varistor layer including at least more than one varistor coating layer formed on the support layer, at least more than two internal electrode folded with a predetermined portion of the varistor layer to be connected with the varistor layer, one end of each of which is extended from a lateral surface of the support layer, and a pair of integrally formed external electrodes formed on a lateral surface of a varistor stack member integrally formed of the support layer, the varistor layer and the internal electrodes to be connected with one end portion of each internal electrode.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: July 11, 2000
    Assignee: Ceratech Corporation
    Inventors: Byeung Joon Ahn, Yong Joo Kim
  • Patent number: 5990778
    Abstract: The current-limiting resistor has two connection electrodes (1, 2) which are arranged parallel to one another, a resistance body (3) which has PTC behavior and with which large-area contact is made by the connection electrodes (1, 2) and at least one varistor (4) which is in electrically conductive contact with the resistance body (3). The varistor (4) is of pillar-shaped design and has at least two first portions (4a) routed predominantly perpendicularly to the varistor axis and, arranged between said portions, a second portion (4b) having a reduced cross section compared with each of the first portions (4a). The material of the resistance body (3) fills an interspace (6), which is formed by the at least two first portions (4a) and the second portion (4b), and encloses the outwardly pointing edges (4c) of the at least two portions.This resistor can be operated at high voltages, for example 5 or 10 kV, and advantageously has a single resistance body 3 and a single varistor.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: November 23, 1999
    Assignee: ABB Research Ltd.
    Inventors: Ralf Strumpler, Jan H. W. Kuhlefelt
  • Patent number: 5982273
    Abstract: A multi-element type chip device of the present invention includes an elongate chip substrate (10), 2n pairs of opposed electrodes (12a) [n representing a positive integer] formed on a surface of the chip substrate (10) at a generally constant interval longitudinally of the chip substrate, device elements (131-134) each formed between a respective pair of electrodes, and a protective coating (14-16) formed to cover the device elements (131-134) in a row extending longitudinally of the chip substrate (10). A (2m-1)th device element (131, 133) [m representing a positive integer not exceeding n] as counted from one end (10a) of the chip substrate (10) has a widthwise center which is offset from a widthwise center of a corresponding pair of electrodes (12a) toward the other end (10b) of the chip substrate (10).
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: November 9, 1999
    Assignee: Rohm Co., Ltd.
    Inventor: Osamu Shibata
  • Patent number: 5977863
    Abstract: A resistor network for terminating active electronic devices has low cross talk noise between the adjoining resistors and the conductors that connect the resistors to other electronic packages. A substrate has a top and a bottom surface. Resistors are located on the top surface. Conductors are also located on the top surface and are electrically connected to each end of the resistors. Vias extend through the substrate and electrically connect to the conductors. Solder spheres are positioned on the bottom surface and are electrically connected to the vias. An end of each of the resistors is electrically connected in common through a common conductor. The commoned resistors are electrically connected to a common via through the common conductor. The resistor network minimizes cross talk noise between the resistors and provides a high density interconnection.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: November 2, 1999
    Assignee: CTS Corporation
    Inventors: Terry R. Bloom, Richard O. Cooper, David L. Poole
  • Patent number: 5977862
    Abstract: A polymer high voltage current limiter comprising, per phase, a fast circuit-breaker pole, a semi-fast protection circuit-breaker pole, and a set of polymer-based elements having very low resistivity, filled with carbon black, and connected in series and in parallel, wherein each element comprises a carbon-filled polymer matrix of elongate shape and including in its interior two parallel metal conductors.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: November 2, 1999
    Assignee: GEC Alsthom T & D SA
    Inventor: Van Doan Pham
  • Patent number: 5914559
    Abstract: A resistance element which is formed on a substrate by resistors and which divides and supplies high voltage to an electron gun of a cathode ray tube, wherein part or all of the substrate is covered by a high resistance conductive material layer as a topmost layer, and a cathode ray tube having the same.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: June 22, 1999
    Assignee: Sony Corporation
    Inventors: Tsuneo Muchi, Kenichi Ozawa, Tsunenari Saito
  • Patent number: 5905427
    Abstract: An integrated circuit resistor array suitable for use as resistors included in a high performance analog integrated circuit is provided. A plurality of resistor stripes are collectively arranged in a region on a substrate. The resistor stripes are made of the same material and designed to have the same cross-sectional area. The resistor stripes are electrically connected through first metal layer conductors. Second metal layer conductors connect the stripes to external circuits. Different resistors have matched voltage dependencies.
    Type: Grant
    Filed: September 25, 1996
    Date of Patent: May 18, 1999
    Assignee: Burr-Brown Corporation
    Inventors: Toshihiko Hamasaki, Hitoshi Terasawa, Toshio Murota, Keiji Matsuki
  • Patent number: 5844468
    Abstract: Disclosed is a chip network electronic component prevents a short circuit between adjacent electrodes upon soldering, and the strength of the projecting portion is increased to improve reliability. The chip network electronic component includes an insulator substrate having recessed portions in opposite side surfaces to have a plurality of pairs of projecting portions. Electrodes are formed respectively at the projecting portions so as to extend from a main surface to a back surface of the substrate. Electrical elements are each formed on the main surface of the substrate to electrically connect between one pair of the electrodes. A coating layer covers a surface of the electrical elements. The recessed portion includes a pair of opposite flat planes and a flat-planed bottom connecting between the flat planes. The flat plane and the bottom has a connecting portion formed therebetween to have a curvature of 0.1 mm or greater.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: December 1, 1998
    Assignee: Rohm Co. Ltd.
    Inventors: Masato Doi, Yoshinori Matsumoto
  • Patent number: 5756971
    Abstract: Proposed is a heater arrangement for a measuring sensor for determining components in gases, particularly in exhaust gases of internal combustion engines. The heater arrangement comprises at least two heating elements (10, 11) which are disposed at least partly one above the other and electrically insulated from one another by means of at least one insulating layer. A contacting member (14) laid through the insulating layer from one heating element (10) to the other heating element (11) is provided in such a manner that the heating elements (10, 11) are switched in series one behind the other.
    Type: Grant
    Filed: August 3, 1994
    Date of Patent: May 26, 1998
    Assignee: Robert Bosch GmbH
    Inventor: Heinrich Hipp
  • Patent number: 5734313
    Abstract: A chip-type composite electronic component according to the present invention comprises an insulating substrate (1), a common electrode (2) formed on the substrate (1), a plurality of individual electrodes (3a-3h) formed on the substrate (1) to be spaced from the common electrode (2), and a plurality of electronic elements (4a-4e) each interposed between each of the individual electrodes (3a-3h) and the common electrode (2). Each of the common electrode (2) and individual electrodes (3a-3h) has a plated solder layer as an outermost layer. Each of the electronic elements (4a-4e) has a direct current resistance of no less than 47K .OMEGA., and the solder layer of the common electrode (2) has a layer thickness which is no more than 2.9 times as great as that of the solder layer of the individual electrodes (3a-3h).
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: March 31, 1998
    Assignee: Rohm Co., Ltd.
    Inventors: Masato Doi, Hirotoshi Inoue, Seiji Mitsuno