Resistance Element And/or Terminals Printed Or Marked On Base Patents (Class 338/307)
  • Patent number: 7940157
    Abstract: A resistor layout structure and a manufacture method thereof are provided. The resistor layout structure includes a substrate, a plurality of metals, and a plurality of resistor lumps. The plurality of metals is disposed on the substrate. The plurality of first resistor lumps is disposed on the substrate. The metals are used as a supporting structure during the disposing process. Besides, the metals are interlaced and connected in series connected with the resistor lumps to form the resistor. Therefore, the present invention decreases the resistance variability of the resistor.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: May 10, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Ting Chen, Chang-Sheng Chen, Chin-Sun Shyu, Chang-Lin Wei
  • Patent number: 7940158
    Abstract: A chip resistor (1) according to the present invention includes an insulating substrate (2) which is in the form of an elongated rectangle in plan view, a pair of upper electrodes (3, 4) in the form of a strip formed on the upper surface of the insulating substrate (2) at portions adjacent to the long side surfaces of the insulating substrate to extend along the side surfaces, a resistor film (5) formed on the upper surface of the insulating substrate (2) and electrically connected to the upper electrodes (3, 4), and a pair of terminal electrodes (6, 7) formed on the two long side surfaces of the insulating substrate and electrically connected to the upper electrodes (3, 4), respectively. One of two longitudinal ends of the resistor film (5) is connected to one of the upper electrodes (3), whereas the other one of the two longitudinal ends of the resistor film is connected to the other one of the upper electrodes (4).
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: May 10, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Masaki Yoneda
  • Publication number: 20110102060
    Abstract: A resistive sheet includes a flexible cover sheet, a wiring part provided on the bottom face of the cover sheet, and ring, circular-arc, or spiral resistive layer connected to the wiring part. This resistive layer has uneven bottom face. The resistive sheet also includes a spacer layer whose bottom face is disposed at a position lower than the resistive layer. The wiring part is sandwiched between the bottom face of the cover sheet and the spacer layer.
    Type: Application
    Filed: October 20, 2010
    Publication date: May 5, 2011
    Inventors: Satoshi YOSHIHARA, Masaki Sawada, Hisanori Kusunoki, Hiroto Inoue
  • Patent number: 7915996
    Abstract: An electronic component and a method for producing the electronic component achieve efficient production of resistive elements with various resistances. The electronic component includes a pair of terminals opposite each other and a resistive element disposed between the pair of terminals. The resistive element includes a plurality of dots arranged so as to overlap each other in a reference arrangement pattern excluding a portion of the arrangement pattern. To produce the electronic component, an electronic component is prototyped in advance and includes a resistive element in which the dots are arranged in the entire reference arrangement pattern between the pair of terminals. The prototyped resistive element is then partially removed so as to attain a desired resistance. An electronic component is then produced in which the dots are arranged in the reference arrangement pattern with a portion of the arrangement pattern excluded on the basis of the shape of the partially removed resistive element.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: March 29, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Seiji Goto, Masahiro Kimura
  • Patent number: 7907046
    Abstract: The chip resistor (1) of the present invention includes an insulating substrate (2) in the form of a chip, a pair of terminal electrodes (3, 4) formed on both ends of the insulating substrate (2), a plurality of resistor films (5) formed on an obverse surface of the insulating substrate (2) in parallel with each other between the paired terminal electrodes (3, 4), and a cover coat formed on the obverse surface of the insulating substrate (2) to cover the resistor films (5). In the chip resistor (1), one of the terminal electrodes (3) includes individual upper electrodes (8) each formed on the obverse surface of the insulating substrate (3, 4) to be independently connected to a respective one of the resistor films (5) and a side electrode (9) formed on a side surface of the insulating substrate (2) to be connected to all the individual upper electrodes (8).
    Type: Grant
    Filed: September 4, 2006
    Date of Patent: March 15, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Torayuki Tsukada
  • Patent number: 7889049
    Abstract: An electronic component includes a layered structure, an isolated electrode, first and second external electrodes, and first and second internal electrodes. The layered structure includes laminated ceramic layers laminated. The first and second external electrodes are disposed on the surface of the layered structure. The isolated electrode extends in the x-axis direction inside the layered structure and is not connected to the first and second external electrodes. The first internal electrode faces a first end of the isolated electrode with a ceramic layer therebetween. The second internal electrode faces a second end of the isolated electrode with a ceramic layer therebetween. When viewed in plan from the z-axis direction, the width of the isolated electrode in the y-axis direction decreases in the direction from the first end to the second end of the isolated electrode.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: February 15, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Hiromasa Ito
  • Patent number: 7876196
    Abstract: A chip resistor includes an insulating substrate, a pair of electrodes formed on a main surface of the substrate and a resistor element electrically connected to the electrodes. The paired electrodes are spaced from each other in a first direction. The main surface of the substrate is formed with a raised portion in the form of a plateau which is smaller in size than the substrate in a second direction perpendicular to the first direction. The paired electrodes are formed on the raised portion. The resistor element is equal in size to the raised portion in the second direction.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: January 25, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Yoshikazu Tamaki
  • Publication number: 20100308955
    Abstract: A method of fabricating a thin film resistor including providing a substrate, using a low-temperature pulsed-laser deposition process to deposit a titanium carbide (TiC) layer on the substrate, removing portions of the TiC layer with an etching process to leave a TiC pattern on the substrate, and depositing conductive material on opposite ends of the TiC pattern to provide a thin film resistor.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 9, 2010
    Inventors: Robert C. Cole, Gouri Radhakrishnan
  • Patent number: 7843309
    Abstract: A resistor includes first and second opposite terminations, a resistive element formed from a plurality of resistive element segments between the first and second opposite terminations, at least one segmenting conductive strip separating two of the resistive element segments, and at least one open area between the first and second opposite terminations and separating at least two resistive element segments. Separation of the plurality of resistive element segments assists in spreading heat throughout the resistor. The resistor or other electronic component may be packaged by bonding to a heat sink tab with a thermally conductive and electrically insulative material. The resistive element may be a metal strip, a foil, or film material.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: November 30, 2010
    Assignee: Vishay Dale Electronics, Inc.
    Inventors: Felix Zandman, Clark L. Smith, Todd L. Wyatt, Thomas L. Veik, Thomas L. Bertsch
  • Patent number: 7830241
    Abstract: A resistor structure embedded in a multi-layer circuit board and manufacturing method thereof are provided. Resistive material is coated on any layer among the multi-layer circuit board, and two symmetric electrodes are formed in the geometric center of the resistive material area. The two electrodes are disposed in the resistive material layer and are covered by the resistive material. And the two electrodes are led out from respective bores at the central position of the resistive electrodes, for connecting to any other metal layer. This resistor structure can avoid the unstable resistance when the coated resistor is operated at high frequency, and also avoid the formation untrimmed edges during coating that affects the precision of resistance.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: November 9, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Ying-Jiunn Lai, Chin-Sun Shyu, Chang-Sheng Chen, Uei-Ming Jow
  • Patent number: 7830239
    Abstract: A device to protect against a surge voltage includes a body having a hexahedron shape and filled with a varistor material, a pair of input signal electrodes attached to a first side surface of the body along upward and downward directions, a pair of output signal electrodes attached to a second side surface of the body that faces the first side surface of the body in the upward and downward directions, a ground electrode attached to an upper surface of the body, at least one pair of signal connection electrode plates to connect the input signal electrodes and the output signal electrodes, and a ground plate to be connected to the ground electrode. Thus, the device can protect an electronic circuit from a surge voltage and match an impedance of a transmission line.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: November 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-man Kim, Atsuhisa Ogawa
  • Patent number: 7830240
    Abstract: A multilayer positive temperature coefficient thermistor includes a ceramic body having semiconductor ceramic layers and internal electrodes, the semiconductor ceramic layers being mainly composed of BaTiO3 and containing semiconductor-forming agents, the semiconductor ceramic layers and the internal electrodes being alternately stacked, and the outermost layers of the ceramic body being formed of the semiconductor ceramic layers. The outermost layers serve as protective layers. The semiconductor ceramic layers arranged between the internal electrodes 4a and 4d serve as effective layers. The protective layers contain a semiconductor-forming agent having a larger ionic radius than that of a semiconductor-forming agent contained in the effective layers. The protective layers have a lower porosity than that of the effective layers.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: November 9, 2010
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenjirou Mihara, Atsushi Kishimoto
  • Patent number: 7812289
    Abstract: A ceramic heater according to the present invention includes a heating portion made of ceramics, and a cooling plate portion. In the heating portion, a belt like printed electrode is formed continuously in a spiral shape along a circumferential direction, and in the printed electrode, slits extended in a width direction of the printed electrode are provided. In such a way, a ceramic heater in which uniform heating performance in the heating surface is high can be obtained.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: October 12, 2010
    Assignee: NGK Insulators, Ltd.
    Inventor: Takeru Torigoe
  • Publication number: 20100245030
    Abstract: It is an object to provide processes for the production of thin-film sensors whereby crystals are strongly oriented without cost-adding steps such as heating and variations in electrical properties are small among the obtainable products. A process of producing a thin-film sensor is a process of producing a thin-film sensor that include an insulating substrate and an electrical resistor which is made of a metal and is provided on the insulating substrate, the process including a step of forming the electrical resistor by sputtering the metal while applying a negative direct-current voltage to the insulating substrate.
    Type: Application
    Filed: March 28, 2007
    Publication date: September 30, 2010
    Applicants: MITSUI MINING & SMELTING CO., LTD., TOHOKU UNIVERSITY
    Inventors: Makoto Ikeda, Mitsuhiro Wada, Shinichi Inoue, Minoru Isshiki, Jae-Won Lim, Joon Woon Bae
  • Patent number: 7800021
    Abstract: A heater that may be applied to a substrate. The heater may include a graduating material deposited on at least a portion of a substrate, a resistive material and a thermal barrier dielectric coating. The resistive material may include at least two resistive compositions, wherein the resistivity of the material may be altered by varying the composition in given areas.
    Type: Grant
    Filed: June 30, 2007
    Date of Patent: September 21, 2010
    Assignee: Husky Injection Molding Systems Ltd.
    Inventors: Jim Pilavdzic, Stefan Von Buren
  • Patent number: 7791450
    Abstract: Provided are a ceramic component and a method of manufacturing the ceramic component. The ceramic component includes a previously fired insulation ceramic base, a functional ceramic sheet bonded to the insulation ceramic base by a diffusion bonding layer having an anchoring structure, internal electrodes embedded into the functional ceramic sheet, and external electrodes connected to the internal electrodes. A functional ceramic paste corresponding to the functional ceramic sheet is applied to the insulation ceramic base and is dried to form a functional ceramic film. The functional ceramic film is pressed against the insulation ceramic base to anchor functional ceramic film into the insulation ceramic base for sure attachment. The functional ceramic film is fired to allow functional oxide materials included in the functional ceramic film to permeate the insulation ceramic base by solid diffusion to form the diffusion bonding layer and to change the functional ceramic film into the functional ceramic sheet.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: September 7, 2010
    Assignee: Joinset Co., Ltd.
    Inventors: Kwang-Hwi Choi, Seong-Soo Jo, Sun-Ki Kim
  • Patent number: 7782173
    Abstract: The chip resistor 10 includes a ceramic substrate 11 that is shaped like a rectangular parallelepiped. Mounted on the lower surface of the ceramic substrate 11 are a resistive element 12 that is made mainly of a low-resistance, low-TCR copper-nickel alloy, first and second electrode layers 13, 14 that form a two-layer structure and cover both longitudinal ends of the resistive element 12, and an insulating protective layer 15 for covering the remaining area of the resistive element 12. The resistive element 12 is positioned within a region inside the peripheral border of the lower surface of the ceramic substrate 11. The chip resistor 10 also includes end-face electrodes 17 that are positioned on both longitudinal end faces of the ceramic substrate 11. The second electrode layers 14 and end-face electrodes 17 are covered by plating layers 18-21. This chip resistor 10 is to be face-down mounted with both electrode layers 13, 14 positioned on a wiring pattern 31 of a circuit board 30.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: August 24, 2010
    Assignee: KOA Corporation
    Inventors: Koichi Urano, Yasushi Akahane
  • Patent number: 7782174
    Abstract: Disclosed is a chip resistor 1 that includes a ceramic substrate 2, a pair of bank-raising foundation sections 3 positioned on both longitudinal ends of the lower surface of the ceramic substrate 2, a pair of first electrode layers 4 that cover at least parts of the bank-raising foundation sections 3 and are positioned at a predetermined distance from each other, a resistive element 5 that is made mainly of a copper-nickel alloy to bridge the first electrode layers 4, a pair of second electrode layers 6 that cover the pair of first electrode layers 4, and an insulating protective layer 7 that covers the resistive element 5. Further, end-face electrodes 9 are positioned on both longitudinal end faces of the ceramic substrate 2. The second electrode layers 6 and end-face electrodes 9 are covered with plating layers 10-13. This chip resistor 1 is to be face-down mounted with the first and second electrodes 4, 6 positioned on a wiring pattern 21 of a circuit board 20.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: August 24, 2010
    Assignee: KOA Corporation
    Inventor: Koichi Urano
  • Patent number: 7764873
    Abstract: A radiant electric heating element for use in a toast making appliance comprises a base plate (2) of stainless steel to one or each face of which there is printed a first ceramic track (3) with an electrically conductive track (5) printed on the face thereof remote from the base plate (2), and a second ceramic track (4) is printed upon and surrounds the heating track (5) thus hermetically sealing with the heating track between the two ceramic tracks. Such an element provides adequate radiant heat for efficiently toasting bread while the bread may be in direct contact with the element but is electrically insulated therefrom by the second ceramic track (4). By providing a further ceramic coating (6) on the opposed face of the base plate (2), mechanical integrity is maintained to prevent warping of the element and thus uneven toasting.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: July 27, 2010
    Inventor: Stylianos Panaghe
  • Patent number: 7755467
    Abstract: The chip resistor (1) of the present invention includes a pair of terminal electrodes (4, 5) provided at ends of an insulating substrate (2) in the form of a chip, and a resistor film (3) formed on the upper surface of the insulating substrate (2) for electrical connection to the paired terminal electrodes (4, 5) and formed with a trimming groove (3a) for setting the resistance. The paired terminal electrodes (4, 5) include a lower electrode (4b) formed on the lower surface of the insulating substrate (2). The lower electrode (4b) extends up to a position directly below a narrower portion (8) of the resistor film (3) which has a relatively small width due to the formation of the trimming groove (3a) in the resistor film (3).
    Type: Grant
    Filed: August 2, 2006
    Date of Patent: July 13, 2010
    Assignee: Rohm Co., Ltd.
    Inventor: Torayuki Tsukada
  • Patent number: 7733211
    Abstract: A chip resistor (1) includes a chip substrate (2) a mutually separated terminal electrodes (3, 4) formed on the upper surface of the substrate (2), and a meandering resistor film (5) formed between the two terminal electrodes (3, 4). Each of the terminal electrodes (3, 4) includes an inner edge (3a, 4a) extending diagonally from one side surface (2a) toward the other side surface (2b) of the chip substrate (2). Each of the inner edges (3a, 4a) has a portion closer to the resistor film (5) that is electrically connected to a narrow portion (7, 8) formed integral with the resistor film (5). The narrow portion extends outward from an end (5a, 5b) of the resistor film (5).
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: June 8, 2010
    Assignee: Rohm Co., Ltd.
    Inventor: Masaki Yoneda
  • Patent number: 7724123
    Abstract: A varistor is provided with a varistor element, and an external electrode disposed on the varistor element. The varistor element contains ZnO as a principal ingredient and contains a rare-earth element and Ca. The external electrode is formed by baking on an outer surface of the varistor element and contains Pt. When the external electrode is formed by baking on the varistor element, a compound of the rare-earth element and Pt and a compound of Ca and Pt are formed near an interface between the varistor element and the external electrode, and exist there. The existence of these compounds enhances the bonding strength between the varistor element and the external electrode.
    Type: Grant
    Filed: November 13, 2006
    Date of Patent: May 25, 2010
    Assignee: TDK Corporation
    Inventors: Dai Matsuoka, Yo Saito, Izuru Soma, Hideaki Sone
  • Patent number: 7679485
    Abstract: A multilayer positive temperature coefficient thermistor that has semiconductor ceramic layers containing a BaTiO3-based ceramic material as a primary component, and at least one element selected from the group consisting of Eu, Gd, Tb, Dy, Y, Ho, Er, and Tm as a semiconductor dopant in the range of 0.1 to 0.5 molar parts with respect to 100 molar parts of Ti. The ratio of the Ba site to the Ti site is in the range of 0.998 to 1.006. Accordingly, even when the semiconductor ceramic layers have a low actual-measured sintered density in the range of 65% to 90% of a theoretical sintered density, a multilayer positive temperature coefficient thermistor having a sufficiently high rate of resistance change and a high rising coefficient of resistance at the Curie temperature or more can be realized.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: March 16, 2010
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi Kishimoto, Kenjirou Mihara, Hideaki Niimi
  • Patent number: 7667569
    Abstract: A chip resistor includes: a pair of upper surface electrodes formed at opposing side portions of a rectangular substrate as opposed to each other with respect to a center line of the rectangular substrate extending in a direction connecting the side portions; a resistive element formed on the rectangular substrate to be electrically connected with the upper surface electrode pair; and a pair of end surface electrodes formed on end surfaces of the opposing side portions of the rectangular substrate and electrically connected with the upper surface electrode pair. The chip resistor further includes dummy electrodes formed individually at the opposing side portions of the rectangular substrate at positions corresponding to the upper surface electrode pair in the direction connecting the side portions.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: February 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Takeshi Iseki, Shuji Ariga, Mitsuaki Nakao
  • Patent number: 7667568
    Abstract: A chip resistor (A1) includes a chip-like resistor element (1), two electrodes (31) spaced from each other on the bottom surface (1a) of the resistor element, and an insulation film (21) between the two electrodes. Each electrode (31) has an overlapping portion (31c) which overlaps the insulation film (21) as viewed in the vertical direction.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: February 23, 2010
    Assignee: Rohm Co., Ltd.
    Inventors: Masanori Tanimura, Torayuki Tsukada, Kousaku Tanaka
  • Patent number: 7659806
    Abstract: A chip resistor includes an insulating substrate, a pair of electrodes formed on a main surface of the substrate and a resistor element electrically connected to the electrodes. The paired electrodes are spaced from each other in a first direction. The main surface of the substrate is formed with a raised portion in the form of a plateau which is smaller in size than the substrate in a second direction perpendicular to the first direction. The paired electrodes are formed on the raised portion. The resistor element is equal in size to the raised portion in the second direction.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: February 9, 2010
    Assignee: Rohm Co., Ltd.
    Inventor: Yoshikazu Tamaki
  • Patent number: 7605683
    Abstract: In a monolithic electronic component in which a resistive element is incorporated by forming a resistor film on a terminal electrode, a plating film can be formed on the terminal electrode having the resistor film via electroplating in an efficient manner and with a uniform film thickness. In order to form the terminal electrode, the resistor film is disposed directly on the surface of the component body, and a conductive resin film having a relatively low volume resistivity is disposed over the resistor film. The conductive resin film is preferably adapted to have a specific resistance of less than about 1×10?4 ?·m, on which a plating film having a uniform film thickness can be formed efficiently via electroplating.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: October 20, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takashi Sawada, Kenjiro Hadano
  • Publication number: 20090256670
    Abstract: A thin film resistor structure is disclosed. The resistor structure comprises a resistor film comprising a copper oxide layer and a plurality of metal islands thereon. The copper oxide layer has a top surface comprising a plurality of adjacent nodule-shaped recess regions, in which vacancies are formed between the nodule-shaped recess regions and are arranged in reticulate distribution. The plurality of metal islands is respectively distributed in the vacancies between the nodule-shaped recess regions. A method for fabricating the thin film resistor structure is also disclosed.
    Type: Application
    Filed: June 9, 2008
    Publication date: October 15, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Chung Chen, Hung-Kun Lee, Jung-Chou Oung
  • Patent number: 7595716
    Abstract: To provide an electronic component including a resistor element that can be efficiently produced with a range of resistances, and a method for manufacturing the electronic component, the electronic component includes a pair of terminals, and a resistor element disposed between the terminals. The resistor element includes at least two resistive portions (hereinafter referred to as a first resistive portion and a second resistive portion) that are continuously disposed. The first resistive portion includes a plurality of first dots overlapping one another. The second resistive portion includes a plurality of second dots having a different electric resistance from that of the first dots overlapping one another.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: September 29, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Seiji Goto, Masahiro Kimura
  • Publication number: 20090237200
    Abstract: A chip resistor (1) includes a chip substrate (2) a mutually separated terminal electrodes (3, 4) formed on the upper surface of the substrate (2), and a meandering resistor film (5) formed between the two terminal electrodes (3, 4). Each of the terminal electrodes (3, 4) includes an inner edge (3a, 4a) extending diagonally from one side surface (2a) toward the other side surface (2b) of the chip substrate (2). Each of the inner edges (3a, 4a) has a portion closer to the resistor film (5) that is electrically connected to a narrow portion (7, 8) formed integral with the resistor film (5). The narrow portion extends outward from an end (5a, 5b) of the resistor film (5).
    Type: Application
    Filed: June 20, 2006
    Publication date: September 24, 2009
    Applicant: ROHM CO., LTD.
    Inventor: Masaki Yoneda
  • Publication number: 20090231085
    Abstract: A resistor and design structure including at least one resistor material length in a dielectric, each of the least one resistor material length having a sub-lithographic width are disclosed.
    Type: Application
    Filed: March 12, 2008
    Publication date: September 17, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark C. Hakey, Stephen E. Luce, James S. Nakos
  • Patent number: 7525410
    Abstract: There are provided a point contact array, in which a plurality of point contacts are arranged, each point contact electrically and reversibly controlling conductance between electrodes and being applicable to an arithmetic circuit, a logic circuit, and a memory device, a NOT circuit, and an electronic circuit using the same. A circuit includes a plurality of point contacts each composed of a first electrode made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode made of a conductive substance. The conductance of each point contact is controlled to realize the circuit. Ag2S, Ag2Se, Cu2S, or Cu2Se is preferably used as the compound conductive material. When a semiconductor or insulator material is interposed between the electrodes, a crystal or an amorphous material of GeSx, GeSex, GeTex, or WOx (0<x<100) is preferably used as the semiconductor or insulator material.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: April 28, 2009
    Assignees: Japan Science and Technology Agency, Riken
    Inventors: Masakazu Aono, Tsuyoshi Hasegawa, Kazuya Terabe, Tomonobu Nakayama
  • Publication number: 20090040009
    Abstract: To provide an electronic component including a resistor element that can be efficiently produced with a range of resistances, and a method for manufacturing the electronic component, the electronic component includes a pair of terminals, and a resistor element disposed between the terminals. The resistor element includes at least two resistive portions (hereinafter referred to as a first resistive portion and a second resistive portion) that are continuously disposed. The first resistive portion includes a plurality of first dots overlapping one another. The second resistive portion includes a plurality of second dots having a different electric resistance from that of the first dots overlapping one another.
    Type: Application
    Filed: August 4, 2008
    Publication date: February 12, 2009
    Inventors: Seiji Goto, Masahiro Kimura
  • Publication number: 20090015369
    Abstract: A resistor R1 formed by forming a first resistor layer 5a of 20 nm thickness including a tantalum nitride film at a concentration of nitrogen of less than 30 at % and a second resistor layer of 5 nm thickness including a tantalum nitride film at a concentration of nitrogen of 30 at % or more successively by a reactive DC sputtering method using tantalum as a sputtering target material and using a gas mixture of argon and nitrogen as a sputtering gas, and then fabricating the first and the second resistor layers, in which the resistance change ratio of the resistor can be suppressed to less than 1% even when a thermal load is applied in the interconnection step, by the provision of the upper region at a concentration of nitrogen of 30 at % or more.
    Type: Application
    Filed: July 3, 2008
    Publication date: January 15, 2009
    Inventors: Kenichi TAKEDA, Tsuyoshi Fujiwara, Toshinori Imai
  • Publication number: 20080272879
    Abstract: A chip resistor includes a resistive element (1), an insulation layer (4) formed in a back surface of the flat surface, and two electrodes (3) spaced from each other via the insulation layer. Each electrode (3) makes contact with the insulation layer (4). Each electrode (3) has a lower surface formed with a solder layer (39).
    Type: Application
    Filed: December 18, 2007
    Publication date: November 6, 2008
    Applicant: ROHM CO., LTD.
    Inventor: Torayuki Tsukada
  • Publication number: 20080258862
    Abstract: A resistor layout structure and a manufacture method thereof are provided. The resistor layout structure includes a substrate, a plurality of metals, and a plurality of resistor lumps. The plurality of metals is disposed on the substrate. The plurality of first resistor lumps is disposed on the substrate. The metals are used as a supporting structure during the disposing process. Besides, the metals are interlaced and connected in series connected with the resistor lumps to form the resistor. Therefore, the present invention decreases the resistance variability of the resistor.
    Type: Application
    Filed: May 29, 2007
    Publication date: October 23, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wei-Ting Chen, Chang-Sheng Chen, Chin-Sun Shyu, Chang-Lin Wei
  • Patent number: 7427911
    Abstract: The invention provides an electrical device having improved insulation and reduced partial discharge. The electrical device comprises an electrically conductive resistive element provided on a heat transfer medium for transferring heat from the element. The heat transfer medium includes a layer or body of electrically conductive material and a layer of thermally conductive dielectric material disposed between the element and the electrically conductive material. A continuous film of electrically insulating material, for example a silica over-glaze or polymer encapsulant, is applied around the perimeter of the resistive element to surround the element with the film overlying the edge or edges of the element and the ceramic material adjacent thereto.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: September 23, 2008
    Assignee: Tyco Electronics UK Ltd.
    Inventor: Jonathan Catchpole
  • Patent number: 7394344
    Abstract: A chip resistor includes a chip substrate, a terminal electrode formed on an upper surface of the chip substrate in a region close to the respective end portions, and a resistant film formed in a zigzag-folded shape on the upper surface of the chip substrate between the terminal electrodes. An inner edge of at least one of the terminal electrodes includes a protrusion integrally formed so as to project from a portion close to a side edge of the chip substrate toward the resistant film, for achieving electrical connection between the resistant film and the protrusion. A side edge of the protrusion facing inward farther from the side edge of the chip substrate is inclined such that a front edge of the protrusion has a narrower width.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: July 1, 2008
    Assignee: Rohm Co., Ltd.
    Inventor: Masaki Yoneda
  • Patent number: 7369034
    Abstract: A chip variable resistor which is capable of keeping the resistance at an adjusted value and can be manufactured easily is provided. An insulating substrate is formed with a through-hole capable of receiving a driver, and the upper surface of the insulating substrate is formed with a resistor film surrounding the through-hole. A rotor in the form of a circular plate overlaps the resistor film via a spacer made of an insulating material. The rotor is pressed and held from the outside by a holder made of a metal plate. The spacer is partially cut away so that a contact portion of the rotor is exposed downward for coming into contact with the resistor film. Since the holder surrounds the rotor from the outside, the resilient force of the holder can strongly act on the rotor. Therefore, the resistance can be reliably kept at the adjusted value.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: May 6, 2008
    Assignee: Rohm Co., Ltd.
    Inventor: Shigeru Kambara
  • Patent number: 7352273
    Abstract: The invention relates to a method of making a chip resistor using a material substrate for which are set a plurality of first cutting lines extending in a first direction and a plurality of second cutting lines extending in a second direction perpendicular to the first direction. The method includes an upper electrode forming step A for forming a thick upper conductor layer on the upper surface of the substrate by printing and baking a metal organic paste, a lower electrode forming step B for forming a thick lower conductor layer on the lower surface of the substrate by printing and baking metal organic paste, and a resistor element forming step C for forming a thin resistor layer by depositing a resistor material on the upper surface of the substrate. Preferably, the upper and the lower surfaces of the material substrate are flat.
    Type: Grant
    Filed: May 5, 2006
    Date of Patent: April 1, 2008
    Assignee: Rohm Co., Ltd.
    Inventor: Masanori Tanimura
  • Patent number: 7348873
    Abstract: A multilayer PTC thermistor reliably decreases the resistance by decreasing the thickness of ceramic layers composed of a BaTiO3 semiconductor ceramic and achieves a resistance close to the resistance calculated from the multilayer structure. The thermistor is adjusted to satisfy the conditions 5?X?18 and 4?X·Y?10, wherein X is a thickness (?m) of each ceramic layer disposed between adjacent internal electrodes and Y is a donor content (%) in the barium titanate semiconductor ceramic constituting the ceramic layers, Y being expressed in terms of (number of donor atoms/number of Ti atoms)×100.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: March 25, 2008
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hideaki Niimi, Akira Ando
  • Patent number: 7330099
    Abstract: A chip resistor includes a resistive element (1), an insulation layer (4) formed in a back surface of the flat surface, and two electrodes (3) spaced from each other via the insulation layer. Each electrode (3) makes contact with the insulation layer (4). Each electrode (3) has a lower surface formed with a solder layer (39).
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: February 12, 2008
    Assignee: Rohm Co., Ltd.
    Inventor: Torayuki Tsukada
  • Patent number: 7305754
    Abstract: In manufacturing a chip resistor by dividing a chip resistance substrate which includes an insulator, resistance film formed on a surface of the insulator, and a plurality of conductive strips disposed on the resistance film at fixed intervals, grooves are formed by removing a predetermined width of the resistance film including at least second prescribed severing lines. After forming the grooves, the chip resistance substrate is severed in longitudinal and lateral directions along first prescribed severing lines for dividing the conductive strips into two parts and the second prescribed severing lines perpendicular to the first prescribed severing lines so as to produce discrete chip resistors.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: December 11, 2007
    Assignee: Disco Corporation
    Inventors: Kazuma Sekiya, Toshiaki Takahashi
  • Patent number: 7297902
    Abstract: The present invention provides a window assembly having a transparent panel and a conductive heater grid formed integrally with the transparent panel. The conductive heater grid has a first group of grid lines and a second group of grid lines, with opposing ends of each group being connected to first and second busbars. Grid lines of the second group are spaced between adjacent grid lines of the first group, with the height of the grid lines themselves in the second group being less than the height of the grid lines in the first group.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: November 20, 2007
    Assignee: Exatec, LLC
    Inventor: Keith D. Weiss
  • Patent number: 7283033
    Abstract: An axial leaded over-current protection device comprised of a plurality of PTC devices, a first terminal metal strip, and a second terminal metal strip. One end of the first terminal metal strip diverges into a plurality of electrode strips, and the plurality electrode strips are connected to an electrode layer of each PTC device. The second terminal metal strip is connected to the other electrode layer of each PTC device, i.e., the one not being connected to the first terminal metal strip. Accordingly, the first terminal metal strip and second terminal metal strip are respectively connected to the two electrode layers of each PTC device and become in parallel thereby, so that the resistance of the over-current protection device can be decreased.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: October 16, 2007
    Assignee: Polytronics Technology Corp.
    Inventors: Shau Chew Wang, Yi Nuo Chen
  • Patent number: 7277006
    Abstract: Chip resistor includes the rectangular first substrate made of ceramics and having surfaces, the rectangular second substrate made of ceramics and having surfaces, and a joint layer interposed between the surfaces, and electrodes are formed on two opposing sides of the substrate and resistor is formed between the electrodes. Further, electrodes are formed on two opposing sides of the substrate and resistor is formed between the electrodes.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: October 2, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideo Yokoo
  • Patent number: 7262682
    Abstract: A stress sensor in which the direction and magnitude of a stress being applied to a post bonded to or integrated with an insulating board can be grasped from variation in the resistance of resistor elements being stimulated by application of the stress while suppressing variation in the shape of each resistor. The resistor element comprises a resistor formed, by screen print, between a pair of electrodes for the resistor element, i.e. circuit pattern electrodes, arranged on the surface of the insulating board. The electrode is connected, through a conductor, with a board terminal part arranged at one end of the insulating board. The electrode and the conductor or a print accuracy adjusting member have a constant height from the surface of the insulating board. Arrangement of the conductor, electrode and print accuracy adjusting member is entirely identical or similar for the resistor elements in the vicinity thereof.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: August 28, 2007
    Assignee: Elantech Devices Corporation
    Inventors: Etsuo Ooba, Atsuomi Inukai, Fumiaki Karasawa, Hiroshi Yajima
  • Patent number: 7227443
    Abstract: A fixed resistor network has an insulating substrate, a plurality of film resistors arranged on a top surface of the insulating substrate, terminal electrodes formed for the film resistors on each lengthwise sidewall of the insulating substrate at a given pitch along the sidewall, and recesses provided between the terminal electrodes. The occurrence of solder bridges between the terminal electrodes during solder mounting and the occurrence of chipping in the terminal-electrode-forming areas between the recesses on the lengthwise sidewall are both reduced by making the width of the recesses along the lengthwise sidewall either 0.44 to 0.48 times or 0.525 to 0.625 times the pitch.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: June 5, 2007
    Assignee: Rohm Co., Ltd.
    Inventor: Takahiro Kuriyama
  • Patent number: 7224258
    Abstract: The present invention is directed to a thick film patterned resistor on a substrate and to a method of forming it. The method involves providing a substrate with opposed surfaces, where one surface is coated with a layer of a resistor composition. A photoresist is applied over the layer of the resistor composition, and a desired pattern in the photoresist is formed, where the pattern leaves certain regions of the resistor composition layer uncovered by the photoresist. The resistor composition layer which is uncovered by the photoresist is etched under conditions effective to leave a mass of loosely bound resistor particles at regions of the resistor composition which are not covered by photoresist. The mass of resistor particles is then removed from the substrate to produce a thick film patterned resistor on the substrate.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: May 29, 2007
    Assignee: OhmCraft, Inc.
    Inventors: Timothy S. Barge, Franklyn M. Collins
  • Patent number: 7221253
    Abstract: A fusible resistor and method of fabricating the same is provided. The fusible resistor has a very low resistance of 20 to 470 m?. by depositing thin films as a fusible element made of a material with low resistivity such as copper having a temperature coefficient of over 2,000 ppm/° C. The fusible resistor comprises a resistor body, a fusible element layer formed to surround the resistor body, caps formed to surround ends of the fusible element layer, lead wires attached to the caps, and an insulating layer for insulating the fusible element layer and the caps from outside. The thus-fabricated fusible resistor performs all functions of a use without generating excessive heat.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: May 22, 2007
    Assignee: Smart Electronics Inc.
    Inventors: Young Sun Kim, Doo Won Kang, Gyu Jin Ahn, Jin Seok Noh