Terminal Coated On Patents (Class 338/309)
  • Patent number: 11443877
    Abstract: A strain sensor resistor includes: a resistive element (thin-film strain-resistive layer) formed nearly at the center of an upper surface of an insulation substrate to be a base; and front surface electrodes layered and formed on either end part of the resistive element and electrically connected to the resistive element. The entire upper part of the resistive element and a part of the front surface electrodes are covered by a protective film (protective coating). Moreover, back surface electrodes electrically connected to the front surface electrodes are formed on either lower end part of the insulation substrate, and end surface electrodes are formed on either longitudinal end surface of the insulation substrate. The strain sensor resistor has a tip shape solder mountable on a circuit board etc. using the back surface electrodes.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: September 13, 2022
    Assignee: KOA Corporation
    Inventors: Homare Kaneko, Natsumi Shiobara, Yasushi Hiroshima
  • Patent number: 11373787
    Abstract: The invention relates to a production method for an electrical resistance element (for example a shunt) with the following steps: —providing a resistance alloy in powder form, and—forming the resistance element from the powdered resistance material. The invention also relates to a correspondingly produced resistance element.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: June 28, 2022
    Assignees: Isabellenhuette Heusler GmbH & Co. KG, Schunk Sintermetalltechnik GmbH
    Inventors: Jan Marien, Jens Hartmann, Petra Schmidt, Andreas Baum, Phillip Prinz, Steffen Burk, Ingolf Langer, Alexander Witt, Joerg Ziesche, Sieglinde Mueller
  • Patent number: 11282621
    Abstract: A resistor according to the present disclosure includes an insulated substrate, a resistive layer formed of a resistance body material and a bonding layer for bonding the insulated substrate and the resistive layer, wherein the resistor is configured so that a ratio of a sheet resistance of the bonding layer to a sheet resistance of the resistive layer is 100 or more.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: March 22, 2022
    Assignee: KOA CORPORATION
    Inventors: Shuhei Matsubara, Keishi Nakamura
  • Patent number: 11009529
    Abstract: A high-voltage sensing device providing full galvanic isolation between a high-voltage domain and a low-voltage domain, wherein the circuit topology of the device resembles that of a Wheatstone bridge, the Wheatstone bridge employing at least one voltage-controlled semiconductor resistor, wherein the circuit also comprises a reference source connected directly to the Wheatstone bridge and the device comprises a number of shielding structures to electrically isolate the high-voltage domain from the low-voltage domain.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: May 18, 2021
    Assignee: X-FAB SEMICONDUCTOR FOUNDRIES GMBH
    Inventors: Klaus Heinrich, Hartmut Liebing, Andreas Roth, Stefan Eisenbrandt, Andreas Ott, Bruno Boury
  • Patent number: 10966287
    Abstract: An inventive thin-film radiative structure is provided that includes a thin nanocomposite radiative film deposited on a substrate, the thin-film including a mix of finely dispersed phases formed by elements Mo, Si, C, O in the following atomic percentage terms: Mo from 10 to 20%, Si from 15 to 30%, C from 15 to 60%, O from 0 to 20%, and one or a combination of elements Ti, Zr, Hf, Cr, Si, Al, and B in percentage terms of 0-30%. The thin-film radiative structure has an emissivity of more than 0.7 for wavelengths 2-20 ?m at temperatures above 500° C., and a sheet resistance of between 10 and 150 Ohm/sq. The radiative film may be used as a thermoresistive element in thin-film infra-red thermal emitters and infra-red heaters, and in nondispersive infrared sensors (NDIR) and photo-acoustic gas sensors, and as the radiative element in IR signaling devices.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: March 30, 2021
    Inventors: Igor Romanov, Aleksandr Kropachev, Terje Skotheim
  • Patent number: 10964461
    Abstract: A resistor element includes a base substrate having a first surface and a second surface, a resistive layer having a first surface disposed on the second surface of the base substrate, a second surface opposing the first surface of the resistive layer, and first to fourth sides connecting the first surface of the resistive layer to the second surface of the resistive layer, and internal electrodes spaced apart from each other on the second surface of the base substrate. The first and second sides of the resistive layer face each other in a direction in which the internal electrodes are spaced apart, and the third and fourth sides of the resistive layer connect the first and second sides. With the second surface of the base substrate, an angle between each of the third and fourth sides is greater than an angle between each of the first and second sides.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: March 30, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yeon Hee Shin, Ji Sook Yoon, Kwang Hyun Park
  • Patent number: 10892071
    Abstract: A thin film resistor element is provided with a tantalum nitride (TaN) layer on an upper surface of a substrate, a tantalum pentoxide (Ta2O5) layer disposed on the tantalum nitride layer, and two electrode layers separately disposed on the tantalum pentoxide layer or on both ends of the tantalum nitride layer and the tantalum pentoxide layer. The thin film resistor element of the present invention can reduce the oxidation rate of the resistor layer to maintain a constant resistance value at high temperatures generated during use.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: January 12, 2021
    Assignee: VIKING TECH CORPORATION
    Inventors: Cheng-Chung Chiu, Chi-Yu Lu
  • Patent number: 10786864
    Abstract: In manufacturing method of shunt resistor according to the present invention, at least one of first and second conductors that is thicker than a resistance alloy plate member includes a joining surface abutted to the resistance alloy plate member with their edges on one side in a plate-thickness direction being aligned with each other, a first inclined surface that is gradually located on one side in the plate-thickness direction from the joining surface toward the side opposite to the resistance alloy plate member in the plate-surface direction, and a first plate surface extending to the side opposite to the resistance alloy plate member in the plate-surface direction from the first inclined surface. Electron beams or laser is emitted to the joining surfaces of the conductor having the larger thickness and the resistance alloy plate member from one side in the plate-thickness direction to weld the joining surfaces.
    Type: Grant
    Filed: November 24, 2016
    Date of Patent: September 29, 2020
    Assignee: Suncall Corporation
    Inventors: Shojiro Wakabayashi, Hiroya Kobayakawa
  • Patent number: 10763017
    Abstract: An object of the present disclosure is to provide a metal plate resistor that is capable of reducing a resistance value and a TCR. A metal plate resistor according to the present disclosure includes: a resistor body that includes a metal plate having an upper surface and a lower surface that are spaced apart from each other in a thickness direction; a pair of electrodes that include a metal having a low electrical resistivity and a high TCR in comparison with this resistor body, the pair of electrodes being formed in both ends of the lower surface of the resistor body; and an internal electrode that is formed on the upper surface of the resistor body. The internal electrode includes a metal having a low electrical resistivity in comparison with the resistor body.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: September 1, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Yasuharu Kinoshita
  • Patent number: 10741331
    Abstract: A composite electronic component includes a capacitor and a resistor stacked in a height direction. The capacitor includes a capacitor body, and first and second external electrodes. The resistor includes a base portion, a resistor, first and second upper surface conductors, first and second lower surface conductors, first connecting conductors, and second connecting conductors. An upper surface of the base portion of the resistor faces a lower surface of the capacitor body of the capacitor, and the first upper surface conductor and the first external electrode are electrically connected, and the second upper surface conductor and the second external electrode are electrically connected.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: August 11, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa
  • Patent number: 10622122
    Abstract: An object of the present disclosure is to provide a chip resistor capable of suppressing degradation of long-term reliability, and a method for producing the chip resistor. The chip resistor of the present disclosure includes resistance member formed of metal, and a pair of electrodes respectively formed on both ends of first main surface of resistance member. The chip resistor further includes first protective film formed on second main surface located on a rear side of first main surface of resistance member, second protective film formed on first main surface of resistance member and between the pair of electrodes, and a third protective film formed on a side surface parallel to a direction of a current flowing between the pair of electrodes of resistance member. The side surface of resistance member is provided with a protrusion that protrudes outward when viewed along the current flowing direction.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: April 14, 2020
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Yasuharu Kinoshita, Takaaki Tamura
  • Patent number: 10622125
    Abstract: A strain gauge includes a substrate having a surface, a resistor pattern provided on the surface of the substrate, and an adjusting part. The resistor pattern has a pair of terminals, and grid lines coupled to each other in series and forming a zigzag pattern coupled between the pair of terminals. The adjusting part is provided on the zigzag pattern, and includes trim resistors coupled in parallel to one of the grid lines. The trim resistors are arranged at intervals along a direction in which the one of the grid lines of the zigzag pattern extends, and have mutually different lengths along the one of the grid lines of the zigzag pattern.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: April 14, 2020
    Assignee: NMB Technologies Corporation
    Inventor: Satoshi Ogawa
  • Patent number: 10504746
    Abstract: A method for processing a semiconductor substrate is described herein. The method described herein includes generating fluorine radicals and ions, delivering the fluorine radicals through an ion blocker to a processing region, and removing one or more portions of a gate structure to expose one or more portions of a gate dielectric material disposed thereunder. The gate structure includes at least two ceramic or metal layers, and the gate dielectric material is made of a high-k dielectric material. A substrate having the gate structure and gate dielectric material formed thereon is disposed in the processing region, and the temperature of the substrate is maintained at about 60 degrees Celsius or higher. By etching the gate structure using fluorine radicals at a temperature greater or equal to 60 degrees Celsius, the at least two ceramic or metal layers have a flat cross sectional profile.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: December 10, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Zhenjiang Cui, Xing Zhong, Jie Liu, Linlin Wang
  • Patent number: 10496581
    Abstract: Some embodiments include apparatus and methods using circuits to receive an input signal, generate an equalized signal, provide the equalized signal to a node, amplify the equalized signal, and generate digital input information from the equalized signal. A delay circuit, including delay elements, is provided to apply a time delay to the digital input information and generate digital output information. A selector in the delay circuit provides feedback information from an output node of one of the delay elements. An adjust circuit, including switches on circuit paths coupled to the node, is provided to control the switches based on the feedback information.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: December 3, 2019
    Assignee: Intel Corporation
    Inventors: Charlie Changhong Lin, Harry Muljono
  • Patent number: 10375765
    Abstract: A 3-dimensional printed load cell part can include a part body formed of fused thermoplastic polymer particles, and a plurality of strain sensors separately formed of a matrix of conductive particles interlocked with a matrix of fused thermoplastic polymer particles. The plurality of strain sensors can have a first electrical contact at a first end and a second electrical contact at a second end. The particles of the plurality of strain sensors can be continuously fused to the particles of the part body.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: August 6, 2019
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sterling Chaffins, Cassady Roop, Kevin P. DeKam
  • Patent number: 10290401
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: May 14, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Masaki Yoneda
  • Patent number: 10269491
    Abstract: A ceramic electronic component includes an electronic component body, an inner electrode, and an outer electrode. The outer electrode includes a fired electrode layer and first and second plated layers. The fired electrode layer is disposed on the electronic component body. The first plated layer is disposed on the fired electrode layer. The thickness of the first plated layer is about 3 ?m to about 8 ?m, for example. The first plated layer contains nickel. The second plated layer is disposed on the first plated layer. The thickness of the second plated layer is about 0.025 ?m to about 1 ?m, for example. The second plated layer contains lead.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: April 23, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Kodama, Seiji Katsuta
  • Patent number: 10242774
    Abstract: A chip resistance element includes a base substrate having a first surface and a second surface opposing each other, two sides connecting the first surface and the second surface to each other, and two end surfaces connecting the first surface and the second surface to each other; a resistive layer disposed on the second surface; and a first terminal, a second terminal, and a third terminal disposed to be respectively connected to the resistive layer and to be separated from each other on the second surface. The third terminal having a second surface portion disposed between the first terminal and the second terminal on the second surface and a side portion connected to and disposed on one of the two sides of the base substrate.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: March 26, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jung Min Nam, Doo Ho Yoo, Young Key Kim
  • Patent number: 10209150
    Abstract: There is provided a strain gauge having both reduced size and symmetry. The strain gauge includes at least four grid resistor connected to each other in series, and at least three trim resistors each connected to a series circuit in parallel, the series circuit being constituted by two grid resistors adjacent to each other (R1,R2; R2,R3; R3,R4) of the at least four grid resistors. The at least four grid resistors have resistance values different from one another.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: February 19, 2019
    Assignee: MINEBEA MITSUMI INC.
    Inventor: Dohaku Inamori
  • Patent number: 10211279
    Abstract: A resistor structure is provided that contains curved resistor elements. The resistor structure is embedded within an interconnect dielectric material and the resistivity of an electrical conducting resistive material of the resistor structure can be tuned to a desired resistivity during the manufacturing of the resistor structure. Notably, an electrical conducting metallic structure having a concave outermost surface is provided in a dielectric material layer. A doped metallic insulator layer is formed on the concave outermost surface of the metallic structure. A controlled surface treatment process is then performed to an upper portion of the doped metallic insulator layer to convert the upper portion of the doped metallic insulator layer into an electrical conducting resistive material. An interconnect dielectric material can then be formed to embed the entirety of the remaining doped metallic insulator layer and the electrical conducting resistive material.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: February 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Daniel C. Edelstein, Chih-Chao Yang
  • Patent number: 10102948
    Abstract: A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: October 16, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Kenichi Harada, Masaki Yoneda
  • Patent number: 10083779
    Abstract: A chip resistor includes a resistor board, a first electrode, a second electrode and an insulating layer. The second electrode is offset from the first electrode in a lateral direction perpendicular to the thickness direction of the resistor board. The obverse surface of the resistor board includes a first region in contact with the first electrode, a second region in contact with the second electrode and an intermediate region in contact with the insulating layer. The intermediate region is disposed between the first region and the second region in the lateral direction. The first electrode includes a first underlying layer and a first plating layer. The first underlying layer is disposed between the first plating layer and the insulating layer in the thickness direction of the resistor board.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: September 25, 2018
    Assignee: ROHM CO., LTD.
    Inventor: Masaki Yoneda
  • Patent number: 10074464
    Abstract: There is provided a chip resistor suitable for power detection. The chip resistor includes a resistor having a resistor lower surface and a resistor upper surface which face mutually opposite sides in a thickness direction, a pair of resistor first side surfaces spaced apart from each other in a first direction perpendicular to the thickness direction, and a pair of resistor second side surfaces spaced apart from each other in a second direction perpendicular to both the thickness direction and the first direction, a first electrode formed along one resistor first side surface, and a second electrode formed along the other resistor first side surface, and spaced apart from the first electrode.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: September 11, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Kentaro Naka, Masaki Yoneda
  • Patent number: 10037990
    Abstract: A semiconductor device includes an interconnect layer on an inter-layer dielectric (ILD) structure. The ILD structure includes: first contacts, extending through the ILD structure, electrically connected to corresponding first components located in a floor structure underlying the ILD structure; at least one second component located within the ILD structure and spaced from a surface of the ILD structure (in a direction perpendicular to a plane of the ILD structure) a distance which is less than a thickness of the ILD structure; and second contacts directly contacting corresponding first regions of the at least one second component. The interconnect layer includes: first metallization segments which directly contact corresponding ones of the first contacts; and second metallization segments located over a second region of the at least one second component, a width of the second metallization segments being less than a width of the first metallization segments.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: July 31, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Shan Wang, Shun-Yi Lee
  • Patent number: 10037837
    Abstract: In this resistor, a heat sink (Al member) (23) and the other surface (11b) of a ceramic substrate (11) are joined together using an Al—Si-based brazing filler material. The Al—Si-based brazing filler material has a melting point in a range of approximately 600° C. to 700° C. When the heat sink (23) and the ceramic substrate (11) are joined together using the Al—Si-based brazing filler material, it is possible to prevent the derogation of the heat resistance and thermal deterioration during joining at the same time.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: July 31, 2018
    Assignee: MITSUBISHI MATERIALS CORPORATION
    Inventors: Toshiyuki Nagase, Hiroya Ishizuka
  • Patent number: 10006820
    Abstract: A strain-responsive sensor incorporating a strain-sensitive element is disclosed. The strain-sensitive element includes a matched-pair of resistive structures disposed on opposite sides of a substrate. One resistive structure of the matched pair is coupled to a crossover, either a physical crossover or a soft crossover, such that current within the resistive structures of the matched pair flows in the same direction.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: June 26, 2018
    Assignee: Apple Inc.
    Inventors: Michael Vosgueritchian, Sinan Filiz, John Stephen Smith, Anshuman Bhuyan, James E. Pedder, Vikram Garg
  • Patent number: 9795039
    Abstract: A method of making an electronic device may include forming at least one circuit layer that includes solder pads on a substrate and forming at least one liquid crystal polymer (LCP) solder mask having mask openings therein. The method may also include forming at least one thin film resistor on the LCP solder mask and coupling the at least one LCP solder mask to the substrate so that the at least one thin film resistor is coupled to the at least one circuit layer and so that the solder pads are aligned with the mask openings.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: October 17, 2017
    Assignee: HARRIS CORPORATION
    Inventor: Louis Joseph Rendek, Jr.
  • Patent number: 9761355
    Abstract: A resistance assembly for a mobile device and a manufacturing method thereof are disclosed. The resistance assembly for a mobile device in accordance with an embodiment of the present invention includes: a substrate having a circuit formed thereon; first to third pads laminated and separated from one another on the substrate; first to third terminals connected to the first to third pads, respectively; and first and second resistors formed between the first and second terminals and between the second and third terminals, respectively, and serially connected to each other and configured to adjust electric current flowed into the circuit.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: September 12, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jea-Hoon Lee, Woo-Jin Choi, Young-Key Kim
  • Patent number: 9754705
    Abstract: A resistor includes: a base substrate; a resistance layer disposed on one surface of the base substrate; first and second electrode layers disposed to be spaced apart from each other and covering portions of the resistance layer; and a third electrode layer disposed between the first and second electrode layers to be spaced apart from the first and second electrode layers and covering a portion of the resistance layer.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: September 5, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hae In Kim, Jung Min Nam, Jea Hoon Lee, Young Key Kim
  • Patent number: 9668348
    Abstract: A multi-terminal electronic component includes: a base material; a resistance layer disposed on a surface of the base material; a first terminal and a second terminal disposed to be spaced apart from each other while covering portions of the resistance layer, respectively; and a third terminal disposed between the first terminal and the second terminal and covering a portion of the resistance layer, wherein first and second side surfaces of the base material opposing each other are exposed from the first through third terminals.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: May 30, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hoon Lee, Jung Min Nam, Young Key Kim, Hae In Kim
  • Patent number: 9502284
    Abstract: An integrated circuit with a metal thin film resistor with an overlying etch stop layer. A process for forming a metal thin film resistor in an integrated circuit with the addition of one lithography step.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: November 22, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Abbas Ali, Eric Beach
  • Patent number: 9437352
    Abstract: Provided is a resistor for current detection, wherein connection failure etc. due to electro-migration is prevented from being generated in state that the resistor is mounted on a mounting board. The resistor has a resistance body (11) and electrodes (12). The electrode (12) includes first electrode portion (12a) connected to the resistance body (11) and second electrode portion (12b) formed on the first electrode portion (12a). The second electrode portion (12b) consists of material having higher resistivity than the first electrode portion (12a) and solder, which is used for mounting the resistor on the mounting board.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: September 6, 2016
    Assignee: KOA CORPORATION
    Inventors: Kenji Kameko, Koichi Hirasawa
  • Patent number: 9412517
    Abstract: An electronic part that includes an electronic part main body and an external electrode on the surface of the electronic part main body. The external electrode includes at least one alloy layer selected from among a Cu—Ni alloy layer and a Cu—Mn alloy layer, and a Sn-containing layer on the outer side of the alloy layer. The Sn-containing layer is the outermost layer of the external electrode. The Sn-containing layer is in contact with the alloy layer.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: August 9, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hidekiyo Takaoka, Kosuke Nakano, Yutaka Ota, Kenichi Kawasaki
  • Patent number: 9401358
    Abstract: A semiconductor device structure having at least one thin-film resistor structure is provided. Through the metal plug(s) or metal wirings located on different layers, a plurality of stripe segments of the thin-film resistor structure is electrically connected to ensure the thin-film resistor structure with the predetermined resistance and less averting areas in the layout design.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: July 26, 2016
    Assignee: United Microelectronics Corp.
    Inventors: Ching-Wen Hung, Chih-Sen Huang, Yi-Wei Chen
  • Patent number: 9368279
    Abstract: An electronic part that includes an electronic part main body and an external electrode on the surface of the electronic part main body. The external electrode includes at least one alloy layer selected from among a Cu—Ni alloy layer and a Cu—Mn alloy layer, and a Sn-containing layer on the outer side of the alloy layer. The Sn-containing layer is the outermost layer of the external electrode. The Sn-containing layer is in contact with the alloy layer.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: June 14, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hidekiyo Takaoka, Kosuke Nakano, Yutaka Ota, Kenichi Kawasaki
  • Patent number: 9336931
    Abstract: The disclosure provides a chip resistor including: a substrate, two first electrodes, two second electrodes, a resistive layer, at least one protection layer and at least one coating layer. The protection layer covers part of the two first electrodes, and includes at least two overlay sides and at least one overlay plane. The coating layer covers the at least two overlay sides, the at least one overlay plane, and part of the two first electrodes and the two second electrodes. The chip resistor uses the two overlay sides and the overplay plane to extend a distance between the two first electrodes and the outside. Therefore, it is difficult for the airborne sulfur, sulfides and sulfur-containing compounds to enter and react with the two first electrodes. Thus, the chip resistor can resist corrosion of harmful substances such as sulfur, sulfides and sulfur-containing compounds or halogens on the electrodes.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: May 10, 2016
    Assignee: YAGEO CORPORATION
    Inventors: Dong-Mou Tsai, Tsai-Hu Chen, Sheng-Li Hsiao, Yung-Han Liu, Jen-Fu Ho
  • Patent number: 9245672
    Abstract: An object of the disclosure is to provide a chip resistor without causing the disconnection in atmosphere of sulfidizing gas and without precipitating silver sulfide on its surface. The chip resistor of the present disclosure includes a resistor layer disposed on a top surface of a substrate; a first upper electrode layer disposed at both sides of the resistor layer and being electrically connected to the resistor layer; and a second upper electrode layer disposed on the first upper electrode layer and including between 75% by weight and 85% by weight (inclusive) of silver particles with an average particle diameter ranging from 0.3 um to 2 um, between 1% by weight and 10% by weight (inclusive) of carbon, and a resin.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: January 26, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takashi Ohbayashi, Seigo Shiraishi, Kazunori Sakai
  • Patent number: 9240439
    Abstract: A semiconductor device includes a first etching stopper film and a second etching stopper film that are formed to be spaced apart from one another on a first inter-layer insulating film; a metal thin film resistor formed to extend over the first and second etching stopper films; a second inter-layer insulating film formed on the first inter-layer insulating film to cover the first and second etching stopper films and the metal thin film resistor; a first contact hole formed in the second inter-layer insulating film to extend from a surface of the second inter-layer insulating film onto the first etching stopper film by penetrating through the metal thin film resistor; and a second contact hole formed in the second inter-layer insulating film to extend from a surface of the second inter-layer insulating film onto the second etching stopper film by penetrating through the metal thin film resistor.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: January 19, 2016
    Assignee: ROHM CO., LTD.
    Inventors: Ryoutaro Yagi, Satoshi Kageyama
  • Patent number: 9177701
    Abstract: A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: November 3, 2015
    Assignee: ROHM CO., LTD.
    Inventors: Kenichi Harada, Masaki Yoneda
  • Patent number: 9171839
    Abstract: An integrated circuit includes a transistor. The transistor includes a first gate dielectric structure over a substrate, a work-function layer over the first gate dielectric structure, a conductive layer over the work-function layer, and a source/drain (S/D) region adjacent to each sidewall of the first gate dielectric structure. Additionally, the integrated circuit includes a resistor structure. The resistor structure further includes a first doped semiconductor layer over the substrate, wherein a top surface of the resistor structure is substantially planar with a top surface of the transistor.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: October 27, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chan-Hong Chern, Fu-Lung Hsueh
  • Patent number: 9144151
    Abstract: A method comprises providing a voltage switchable dielectric material having a characteristic voltage, exposing the voltage switchable dielectric material to a source of ions associated with an electrically conductive material, and creating a voltage difference between the source and the voltage switchable dielectric material that is greater than the characteristic voltage. Electrical current is allowed to flow from the voltage switchable dielectric material, and the electrically conductive material is deposited on the voltage switchable dielectric material. A body comprises a voltage switchable dielectric material and a conductive material deposited on the voltage switchable dielectric material using an electrochemical process. In some cases, the conductive material is deposited using electroplating.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: September 22, 2015
    Assignee: LITTELFUSE, INC.
    Inventor: Lex Kosowsky
  • Patent number: 9114356
    Abstract: A bipolar ionization device in which fiberglass is used as the dielectric. In one embodiment, a fiberglass board is used, with the anode on one side of the board and the cathode on the other side of the board. A number of flat boards can be stacked, with spacing between them to allow air flow to scavenge ions, with stanchions providing both mounting and electrical connections to the ionization devices. In another embodiment, a fiberglass tube is used, with the cathode inside the tube and the anode outside the tube.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: August 25, 2015
    Assignee: Clean Air Group, Inc.
    Inventor: Hal Ross Gurman
  • Patent number: 8994491
    Abstract: There are provided a chip resistor and a method of manufacturing the same. The chip resistor includes a ceramic substrate; an adhesion portion formed on a surface of the ceramic substrate; and a resistor formed on the adhesion portion, wherein the adhesion portion includes at least one of copper (Cu), nickel (Ni), and copper-nickel (Cu—Ni).
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: March 31, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yong Min Kim, Jung Il Kim, Ichiro Tanaka, Young Tae Kim, Heun Ku Kang
  • Patent number: 8957756
    Abstract: A chip resistor includes an insulating substrate, top terminal electrodes formed on top surface of the substrate using silver-based cermet, bottom electrodes, resistive element that is situated between the top terminal electrodes and overlaps them partially, an optional internal protective coating that covers resistive element completely or partially, an external protective coating that covers completely the internal protection coating and partially covers top terminal electrodes, a plated layer of nickel that covers face sides of the substrate, top and bottom electrodes, and overlaps partially external protective coating, finishing plated layer that covers nickel layer. The overlap of nickel layer and external protective layer possesses a sealing property because of metallization of the edges of external protective layer prior to the nickel plating process.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: February 17, 2015
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Michael Belman, Leonid Akhtman
  • Patent number: 8854175
    Abstract: A chip resistor device includes an insulating substrate, two indented patterns, and a resistor unit. The insulating substrate has opposite first and second surfaces. The first surface has two opposite edges and two electrode forming regions adjacent to the two opposite edges, respectively. The indented patterns are respectively formed in the electrode forming regions of the first surface and indented from the first surface. The resistor unit includes two contact electrodes respectively formed on the electrode forming regions of the first surface and filled into the indented patterns, and a resistor formed on the first surface between the two contact electrodes and electrically contacting the contact electrodes.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: October 7, 2014
    Assignee: Ralec Electronic Corporation
    Inventor: Wan-Ping Wang
  • Patent number: 8810355
    Abstract: The present disclosure relates to a thin film resistor that is formed on a substrate along with other semiconductor devices to form all or part of an electronic circuit. The thin film resistor includes a resistor segment that is formed over the substrate and a protective cap that is formed over the resistor segment. The protective cap is provided to keep at least a portion of the resistor segment from oxidizing during fabrication of the thin film resistor and other components that are provided on the semiconductor substrate. As such, no oxide layer is formed between the resistor segment and the protective cap. Contacts for the thin film resistor may be provided at various locations on the protective cap, and as such, are not provided solely over a portion of the resistor segment that is covered with an oxide layer.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: August 19, 2014
    Assignee: Cree, Inc.
    Inventors: Van Mieczkowski, Jason Gurganus
  • Patent number: 8779887
    Abstract: A resistor device includes a resistor plate and an electrode structure. The electrode structure includes an electrode layer and an auxiliary layer. The electrode layer is disposed at a first face of the resistor plate and includes a first portion and a second portion overlying a first side and a second side of the resistor plate, respectively, and a current path is conducted between the first portion and the second portion through the resistor plate. The auxiliary layer is disposed at a second face of the resistor plate and includes at least a first block and a second block overlying the first side of the resistor plate, and at least a third block overlying the second side of the resistor plate, wherein the first, second and third blocks of the auxiliary layer are separated from one another so that any current flow among the blocks is blocked.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: July 15, 2014
    Assignee: Cyntec Co., Ltd.
    Inventors: Ta-Wen Lo, Yen-Ting Lin
  • Patent number: 8754742
    Abstract: A multilayer ceramic substrate includes a ceramic laminated body including a plurality of ceramic layers stacked on each other, a resistor, and a resistor connecting conductor with a portion overlapping the resistor and an overcoat layer that covers the resistor located on a principal surface of the ceramic laminated body. An overcoat layer is made relatively thick during firing, thereby making cracks less likely to be caused, and after the firing step, the thickness of the overcoat layer is reduced by physically scraping down the surface of the overcoat layer, thereby reducing the trimming time. In the overcoat layer, a region that covers a portion in which a resistor overlaps a resistor connecting conductor is thicker than a region that covers the other portion.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: June 17, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yusuke Otsuka, Yuichi Iida, Kazuo Kishida, Takahiro Takada
  • Patent number: 8749342
    Abstract: A copper foil with an electric resistance film in which a film with higher electrical resistivity than the metal foil is provided on the metal foil, wherein a plurality of electric resistance films with different electric resistance is arranged in parallel on the same metal foil. With conventionally used built-in resistor elements, one resistor element is configured of one type of substance on the copper foil. Nevertheless, when actually mounting the resistor elements, the circuit design tolerance can be increased and the number of man-hours can be reduced with two resistor elements and further with a plurality of resistor elements compared to a case with one resistor element. This invention aims to provide a metal foil with a built-in resistor element comprising two or more types of resistor elements on one metal foil.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: June 10, 2014
    Assignee: JX Nippon Mining & Metals Corporation
    Inventors: Shigeo Ohsaka, Toshio Kurosawa, Takashi Natsume
  • Patent number: 8698593
    Abstract: There is provided a chip resistor including a ceramic substrate; a first resistance layer formed on the ceramic substrate and including a first conductive metal and a first glass; and a second resistance layer formed on the first resistance layer, including a second conductive metal and a second glass, and having a smaller content of glass than the first resistance layer, thereby obtaining relatively low resistance and a relatively small temperature coefficient of resistance (TCR).
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: April 15, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jang Ho Park, Young Key Kim, Ki Won Suh, Jang Seok Yun, Jin Man Han, Sung Jun Kim