Substituting Specified Bit Combinations For Other Prescribed Bit Combinations Patents (Class 341/55)
  • Patent number: 7240358
    Abstract: A media object is scheduled for transmission between a server and a client. The media object is partitioned into segments of blocks, wherein each block is a unit of media for which a client will wait to receive an entire block before playing out the block, and wherein each segment includes an integer number of blocks. One or more channels on which to serve each segment are determined, and a rate at which to serve each segment is determined. Additionally, a schedule pair for each channel is determined. The schedule pair includes a time at which the client may start receiving on the channel and a time at which the client may stop receiving on the channel.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: July 3, 2007
    Assignee: Digital Fountain, Inc.
    Inventors: Gavin Horn, Michael G. Luby, Jens Rasmussen, Per Knudsgaard, Soren Lassen
  • Patent number: 7230550
    Abstract: A system (100) and method (200) of combining codewords is provided. The system can include a splitter (120) for splitting a first codeword (110) into a most significant bits part MSP (112) and a least significant bits part LSP (114), a combiner (130) for combining the MSP of the first codeword with a second codeword to produce a first group (132), and a concatenator (140) for concatenating the first group with the LSP to produce a second group (134), and multiplexing the first group with the second group to produce a multiplexed codeword (150). Bit-errors in the LSP correspond to decoding errors only in a codeword associated with the LSP, and not to decoding errors in other codewords.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: June 12, 2007
    Assignee: Motorola, Inc.
    Inventors: Udar Mittal, James P. Ashley
  • Patent number: 7221292
    Abstract: A circuit for producing a data bit inversion flag comprises a first summed-current production unit for producing a first summed current, whose amplitude is proportional to the number of different data bits in two adjacent data words in a data burst, a second summed-current production unit for producing a second summed current, whose amplitude is proportional to the number of identical data bits in the two adjacent data words, and a current comparator comparing the first with the second summed current and producing a data bit inversion flag if the first summed current is greater than the second summed current.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: May 22, 2007
    Assignee: Infineon Technologies AG
    Inventor: Thomas Hein
  • Patent number: 7199730
    Abstract: A character string processing apparatus converting a character string encoded by a first encoding method to a second encoding method selected from a plurality of encoding methods is disclosed. The character string processing apparatus includes an encoding method determination part that selects the encoding methods, obtains, with respect to each selected encoding method, at least one of the number information and the position information of one or more replacement codes at the time of converting the character string to the selected encoding method, and determines the second encoding method based on at least one of the number information and the position information.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: April 3, 2007
    Assignee: Ricoh Company, Ltd.
    Inventor: Toru Matsuda
  • Patent number: 7158057
    Abstract: An unpartitioned high-speed 8B/10B encoder and corresponding methods use only one edge or level of the clock signal per clock cycle to encode a set of 8B to a corresponding set of 10B data, and thus is not limited to a 50% clock duty cycle. The encoder includes an unpartitioned encoding circuit that receives 8B data and a special character signal and generates 10B intermediate data, a disparity control that receives the 8B data and the special character sign in parallel with that information being received by the encoding circuit, and also receives a clock signal, and generates two control signals; and logic circuitry that receives the intermediate output data and the two control signals and generates the 10B output data. The encoder may be embodied in a high-speed encoding system in which the processing speed of the encoder is greater than 250 MHz.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: January 2, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Iqbal Hussain Zaidi
  • Patent number: 7148824
    Abstract: A method of detecting the encoding utilized in an electronic document includes testing the text strings to determine whether the electronic document contains only text strings having legal numeric codes. A statistical analysis of the text strings is then conducted to provide a mapping of legally coded candidates. The legally coded candidates are ranked and combined with an expected ranking of legally coded candidates to provide a most probable character mapping.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: December 12, 2006
    Assignee: Xerox Corporation
    Inventors: Gilbert B. Porter, III, Mirelsa Fontanes-PĂ©rez, William Soon Hock Tay
  • Patent number: 7142612
    Abstract: A system transmits data on a multi-conductor signal path, which produces a current flow based on the value of the data transmitted. The system reduces changes in current flow between successive data transmissions by encoding data values represented by sets of N bits to produce corresponding sets of M symbols. Each set of M symbols represents multiple bits and each set of M symbols is selected to produce a current flow within a predetermined range of current flows. The sets of M symbols are transmitted across the multi-conductor signal path.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: November 28, 2006
    Assignee: Rambus, Inc.
    Inventors: Mark A. Horowitz, Scott C. Best, William F. Stonecypher
  • Patent number: 7120666
    Abstract: In a network having transaction acceleration, for an accelerated transaction, a client directs a request to a client-side transaction handler that forwards the request to a server-side transaction handler, which in turn provides the request, or a representation thereof, to a server for responding to the request. The server sends the response to the server-side transaction handler, which forwards the response to the client-side transaction handler, which in turn provides the response to the client. Transactions are accelerated by the transaction handlers by storing segments of data used in the transactions in persistent segment storage accessible to the server-side transaction handler and in persistent segment storage accessible to the client-side transaction handler.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: October 10, 2006
    Assignee: Riverbed Technology, Inc.
    Inventors: Steven McCanne, Michael J. Demmer
  • Patent number: 7113114
    Abstract: Disclosed are a method and device of converting data words into code words. This method inserts 2p p guided bits before inputting each set of data words, performs a pre-defined operation, and generates 2p data sequences with different guided bits. It chooses q data sequences from the 2p data sequences for coding, performs a run length limited (RLL) coding with a coding rate m/n, and generates q (d, k) constrained code word sequences. Finally, an optimal (d, k) constrained code word sequence is selected from the q (d, k) constrained code word sequences. The device reduces the circuitry of the RLL coding applied guided scrambling without losing the control of direct current and low frequency components.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: September 26, 2006
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Po Ma, Yung-Chi Yang, Che-Kuo Hsu
  • Patent number: 7072971
    Abstract: Multiple files a served using a server coupled to a data network. A plurality of files is determined, wherein a file includes an integer number of blocks, and wherein each block includes at least one input symbol. For each file, an indication of at least one channel on which to serve the file is determined, and, for each file, a rate at which to serve the file is determined. Also, a schedule for processing the blocks is determined, and output symbols for the blocks are generated according to the schedule. The output symbols are transmitted on the corresponding at least one channel, wherein the files are concurrently served at their corresponding rates.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: July 4, 2006
    Assignee: Digital Foundation, Inc.
    Inventors: Soren Lassen, Gavin Horn, Jeffrey J. Persch, Armin Haken, Michael G. Luby
  • Patent number: 7064683
    Abstract: An encoder apparatus is provided, which includes an upper encoder and first and second lower encoders. The upper encoder has an upper encoded output and a corresponding upper running disparity. The first and second lower encoders have respective first and second lower encoded outputs. The first lower encoder generates the first lower encoded output assuming the upper running disparity has a first state. The second lower encoder generates the second lower encoded output assuming the upper running disparity has a second, different state. A multiplexer multiplexes the first and second lower encoded outputs based on the upper running disparity.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: June 20, 2006
    Assignee: Seagate Technology LLC
    Inventor: Judy L. Westby
  • Patent number: 7061408
    Abstract: An encoder for encoding a data word with a plurality of bits, wherein the data word is transmittable in parallel on a data bus, wherein one bit line is provided for each bit and wherein each bit may have one of two logical states, including a means for examining the data word in order to determine whether a first number of bits of the data word with a first logical state deviates from a second number of bits of the data word with a second logical state by more than a predetermined threshold, a means for changing the state of a bit of the data word in order to create an encoded data word in case the predetermined threshold is exceeded by the data word, and a means for detecting auxiliary information referring to the changed bit.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: June 13, 2006
    Assignee: Infineon Technologies AG
    Inventor: Peter Poechmueller
  • Patent number: 7039106
    Abstract: A method includes receiving an original string of bits where each of the bits represents one of two possible logic levels. The string of bits also carries information. A new string is formed, based on the original string, which contains all of the information of the original string by using fewer bits of one of the logic levels.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: May 2, 2006
    Assignee: Intel Corporation
    Inventor: Rongzhen Yang
  • Patent number: 7020281
    Abstract: A method for determining a result of a group operation performed an integral number of times on a selected element of the group, the method comprises the steps of representing the integral number as a binary vector; initializing an intermediate element to the group identity element; selecting successive bits, beginning with a left most bit, of the vector. For each of the selected bits; performing the group operation on the intermediate element to derive a new intermediate element; replacing the intermediate element with the new intermediate element; performing the group operation on the intermediate element and an element, selected from the group consisting of: the group element if the selected bit is a one; and an inverse element of the group element if the selected bit is a zero; replacing the intermediate element with the new intermediate element.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: March 28, 2006
    Assignee: Certicom Corp.
    Inventors: Ashok Vadekar, Robert J. Lambert
  • Patent number: 6999516
    Abstract: A technique for emulating differential signaling is disclosed. In one exemplary embodiment, the technique is realized by encoding a plurality of input signals so as to generate a plurality of encoded signals having a spatial run length of N, wherein N is an integer having a value of at least two. Each of the plurality of encoded signals is then transmitted over a transmission medium so as to provide a respective plurality of transmitted encoded signals. Each of the plurality of transmitted encoded signals is then compared with at least N neighboring others of the plurality of transmitted encoded signals so as to recover a representation of each of the plurality of encoded signals. Each of the plurality of recovered encoded signals is then decoded so as to generate a plurality of decoded signals representing the plurality of input signals.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: February 14, 2006
    Assignee: Rambus Inc.
    Inventor: Suresh Rajan
  • Patent number: 6933863
    Abstract: A process for transmitting data on a bus, minimizing the switching activity, involves converting the data between a first format and a second format used for transmission of the data. The conversion between said first format and said second format entails the swapping of position of respective bits within a cluster comprising a given number of bits, the swap operation being implementable according to different variants, the maximum number of said variants being equal to the factorial of the aforesaid given number. Each of said variants is identified by a respective pattern. Among the aforesaid patterns, an optimal pattern is selected which minimizes the switching activity at the moment of transmission of data on the bus. The data are then transmitted on the bus using the second format generated using said optimal pattern.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: August 23, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giuseppe Visalli, Francesco Pappalardo
  • Patent number: 6909384
    Abstract: Data destined for a client is compressed at a server in a manner that produces a compressed data string that can be searched in its compressed state. The server constructs a code table that assigns codes from a standard code set (e.g., ASCII code set) that are normally unused to selected character pairs in the data string (e.g., the most frequently occurring character pairs). During compression, the selected character pairs are replaced with the corresponding codes. Identifiers are inserted into the compressed data string to separate substrings. To search the compressed data string at the client, a search query is compressed and compared to the compressed substrings. The substring identifiers are used to quickly locate each successive compressed substring. When a match is found, the matching substring is decompressed by replacing the code in the compressed substring with the corresponding character pair in the code table.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: June 21, 2005
    Assignee: Microsoft Corporation
    Inventors: James Armand Baldwin, Peter T. Barrett
  • Patent number: 6848083
    Abstract: A data input method and device is provided that allows a user to input data to a computer by means of bending his/her five band digits in a specified manner representing a keyboard character intended for input to the computer system. The bending of the user's five hand digits will then cause wrist muscle movements, which can be then sensed by a piezoelectric element in the data input device. In response, the piezoelectric element generates a corresponding electrical signal, which is then converted into binary form and transmitted via cable or wireless link to the computer system. Inside the computer system, the CPU searches through a predefined character-mapping table to find the character corresponding to the received signal from the data input device.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: January 25, 2005
    Inventor: Hung-Lien Shen
  • Patent number: 6844832
    Abstract: An input module (30) notifies a module manager (21) of the output data format of the input module, and the module manager (21) generates a first data conversion module (31) based on the notification and joins the data conversion module to the end of a pipeline. The data conversion module (31) notifies the module manager (21) of the output data format of the data conversion module, and the module manager (21) generates a second data conversion module (32) based on the notification and joins the data conversion module to the end of the pipeline. The operation is repeated as many times as the number of multiplexing stages of multiplexed input data and an output module is joined to the termination position of the pipeline.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: January 18, 2005
    Assignee: Yamaha Corporation
    Inventor: Yuji Koike
  • Patent number: 6844834
    Abstract: The present invention provides a processor including a bit-shift circuit for inputting pieces of data held sequentially in a main register and an auxiliary register, shifting the piece of data bit after bit in accordance with a pointer and a bit count and outputting the shifted data by execution of an unpacking instruction specifying the bit count; a mask circuit for masking data output by the bit-shift circuit in accordance with the pointer and the bit count in the execution of the unpacking instruction; and a pointer-updating circuit for updating the value of the pointer by the bit count in the execution of the unpacking instruction.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: January 18, 2005
    Assignee: Sony Corporation
    Inventors: Satoshi Maruya, Hiroshi Iwasaki
  • Patent number: 6831575
    Abstract: The Word-Aligned Hybrid (WAH) bitmap compression method and data structure is a relatively efficient method for searching and performing logical, counting, and pattern location operations upon large datasets. The technique is comprised of a data structure and methods that are optimized for computational efficiency by using the WAH compression method, which typically takes advantage of the target computing system's native word length. WAH is particularly apropos to infrequently varying databases, including those found in the on-line analytical processing (OLAP) industry, due to the increased computational efficiency of the WAH compressed bitmap index. Some commercial database products already include some version of a bitmap index, which could possibly be replaced by the WAH bitmap compression techniques for potentially increased operation speed, as well as increased efficiencies in constructing compressed bitmaps.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: December 14, 2004
    Assignee: The Regents of the University of California
    Inventors: Kesheng Wu, Arie Shoshani, Ekow Otoo
  • Publication number: 20040201505
    Abstract: A process for transmitting data on a bus, minimizing the switching activity, involves converting the data between a first format and a second format used for transmission of the data. The conversion between said first format and said second format entails the swapping of position of respective bits within a cluster comprising a given number of bits, the swap operation being implementable according to different variants, the maximum number of said variants being equal to the factorial of the aforesaid given number. Each of said variants is identified by a respective pattern. Among the aforesaid patterns, an optimal pattern is selected which minimizes the switching activity at the moment of transmission of data on the bus. The data are then transmitted on the bus using the second format generated using said optimal pattern.
    Type: Application
    Filed: July 9, 2003
    Publication date: October 14, 2004
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giuseppe Visalli, Francesco Pappalardo
  • Patent number: 6791481
    Abstract: A combination CD-ROM and MP3 recorder/player playing a CD-ROM decodes 16-bit ISO standard code words into an audio wave form converts this wave form to sound while encoding and digitizing the wave form into 24-bit MP3 format digital data. To conserve power the MP3 data is buffered in a solid state memory, preferably of the FLASH or DRAM type, before being written to a hard disk. Both reading of the CD/ROM and encoding the read contents as MP3 data, and interchange of MP3 data with other recorder/players, can be accomplished at greater than real-time play rates, permitting that, most typically, some 1200+ musical works can transferred expediently.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: September 14, 2004
    Assignee: Echo Mobile Music, LLC
    Inventors: William Christopher Altare, Anton N. Handal
  • Patent number: 6768818
    Abstract: A data compression method and system that include the substitution of a substring of data characters located at a first position in a stream of data characters with a substitution code. The substitution code includes a reference to a previous position in the stream of data characters at which is located a substring of data characters that matches the substring of data characters which are being substituted located at the first position. The substitution code also includes an indication of the size of the substituted substring. The reference in the substitution code is a backwards offset to the previous position relative to the first position. According to a further aspect, Huffman encoding can be applied to the backward offsets, the substring lengths, the consecutive literal character lengths, and the literal characters themselves to reduce the data requirement size.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: July 27, 2004
    Assignee: Navteq North America, LLC
    Inventors: Matthew Friederich, James A. Meek
  • Patent number: 6737992
    Abstract: In one aspect, replacing padding characters from a body of a GIOP message with paddding character replacement control sequences compresses the message before transmission. In another aspect of the invention, replacing paddding character replacement control sequences with padding characters in the body of a compressed GIOP message decompresses the message upon receipt. In a further aspect, replacing repetitive strings of characters in the body of a GIOP message with repetitive replacement control sequences compresses the GIOP message before transmitting. In yet a further aspect, replacing repetitive replacement control sequences with repetitive sequences of values in the body of GIOP message for control sequences upon receipt of the message decompresses the message.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: May 18, 2004
    Assignee: PrismTech Limited
    Inventor: Johannes M. Wolthuis
  • Patent number: 6696990
    Abstract: A binary encoding circuit is for converting at least first and second binary input signals into an output code that includes at least first and second binary output signals. The circuit may include at least one first selection circuit and at least one second selection circuit that are interconnected and comprise transistors that can be activated/deactivated, i.e. made to conduct/not conduct, according to the binary input signals. The circuit makes it possible to generate a binary code that represents the binary number of the binary input signals that are simultaneously asserted. The encoding circuit can act as a static counter, for example.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: February 24, 2004
    Assignee: STMicroelectronics S.r.l.
    Inventor: Luigi Pascucci
  • Patent number: 6674373
    Abstract: A system and method for decompressing data read from a storage medium include a multiple stage pipeline process for substantially simultaneously processing at least two bytes of data in parallel. The process includes a first stage for receiving literal reference data and history reference data converted from history references to corresponding addresses, and directing data to subsequent stages. A second stage in communication with the first stage has multiple parallel buffers for selectively storing data and/or addresses provided from the first stage. A third stage in communication with the first and second stages has parallel literal buffers and parallel history buffers for selectively storing literal references and a predetermined number of bytes of previously processed uncompressed data, respectively. A fourth stage in communication with the third stage stores uncompressed data and provides the uncompressed data to an output channel in addition to updating the history buffers.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: January 6, 2004
    Assignee: Storage Technology Corporation
    Inventors: Larry D. Jones, Doug Solfermoser
  • Patent number: 6653957
    Abstract: Improvement in the transmission of Boundary Scan Test mode data may be achieved through the assignment of boundary scan test mode traffic to selected bit patterns that facilitate clock recovery and frame alignment in the serial channel. The encoding of boundary scan test traffic as such may be achieved through either multiplexed transmission to the serializer/deserializer (SERDES) alongside a regular channel encoder or incorporated into the channel encoder.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: November 25, 2003
    Assignee: Agilent Technologies, Inc.
    Inventors: Sylvia Patterson, Jeff Rearick
  • Publication number: 20030193422
    Abstract: A system for displaying patent data in multiple encodings includes a client computer (10) connected to the Internet, an application server (12), and a database server (13). The database server is used for storing patent data downloaded by the client computer. The client computer comprises application software (22) for downloading patent data via the Internet, for sending a request to access patent data in the central database server, and for displaying patent data in the form of Unicode strings on the client computer. The application server comprises a data processing interface (31) for interconversion of binary digits and Unicode strings. A related method includes: (a) sending patent data required by a user to the application server in the form of binary digits; (b) converting the binary digits into Unicode strings; and (c) sending the patent data in the form of Unicode strings to the client computer for display.
    Type: Application
    Filed: October 23, 2002
    Publication date: October 16, 2003
    Inventors: Chung-I Lee, Caiyang Luo, Xiumin Duan
  • Patent number: 6611214
    Abstract: An apparatus comprising a one or more memory circuits and an uncompress circuit. The one or more memory circuits may be configured to (a) store (i) a number of compressed code words and (ii) a number of delta words and (b) provide random access to the compressed code words in response to an address. The compressed code words may be losslessly compressed in response to (i) a number of uncompressed code words and (ii) the delta words. The delta words generally comprise bit strings that may be configured to minimize a size of the one or more memory circuits when deleted from the uncompressed code words. The uncompress circuit may be configured to losslessly uncompress the compressed code words in response to the delta words.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: August 26, 2003
    Assignee: LSI Logic Corporation
    Inventor: Daniel Watkins
  • Publication number: 20030146857
    Abstract: An input module (30) notifies a module manager (21) of the output data format of the input module, and the module manager (21) generates a first data conversion module (31) based on the notification and joins the data conversion module to the end of a pipeline. The data conversion module (31) notifies the module manager (21) of the output data format of the data conversion module, and the module manager (21) generates a second data conversion module (32) based on the notification and joins the data conversion module to the end of the pipeline. The operation is repeated as many times as the number of multiplexing stages of multiplexed input data and an output module is joined to the termination position of the pipeline.
    Type: Application
    Filed: May 24, 2002
    Publication date: August 7, 2003
    Applicant: Yamaha Corporation
    Inventor: Yuji Koike
  • Publication number: 20030141993
    Abstract: Data destined for a client is compressed at a server in a manner that produces a compressed data string that can be searched in its compressed state. The server constructs a code table that assigns codes from a standard code set (e.g., ASCII code set) that are normally unused to selected character pairs in the data string (e.g., the most frequently occurring character pairs). During compression, the selected character pairs are replaced with the corresponding codes. Identifiers are inserted into the compressed data string to separate substrings. To search the compressed data string at the client, a search query is compressed and compared to the compressed substrings. The substring identifiers are used to quickly locate each successive compressed substring. When a match is found, the matching substring is decompressed by replacing the code in the compressed substring with the corresponding character pair in the code table.
    Type: Application
    Filed: January 31, 2002
    Publication date: July 31, 2003
    Inventors: James Armand Baldwin, Peter T. Barrett
  • Publication number: 20030122693
    Abstract: A binary encoding circuit is for converting at least first and second binary input signals into an output code that includes at least first and second binary output signals. The circuit may include at least one first selection circuit and at least one second selection circuit that are interconnected and comprise transistors that can be activated/deactivated, i.e. made to conduct/not conduct, according to the binary input signals. The circuit makes it possible to generate a binary code that represents the binary number of the binary input signals that are simultaneously asserted. The encoding circuit can act as a static counter, for example.
    Type: Application
    Filed: December 20, 2002
    Publication date: July 3, 2003
    Applicant: STMicroelectronics S.r.I.
    Inventor: Luigi Pascucci
  • Publication number: 20030117301
    Abstract: In a method of data transmission according to one embodiment of the invention, signals on adjacent conductive paths pass through different sequences of inversions and regenerations. In an apparatus according to one embodiment of the invention, two sets of parallel transmission lines include series of inverting and non-inverting buffers having different sequences.
    Type: Application
    Filed: December 20, 2001
    Publication date: June 26, 2003
    Inventors: Yvon Savaria, Yves Blaquiere
  • Patent number: 6578044
    Abstract: A database system wherein one or more entry databases store a plurality of entries. Each entry is of a given type that defines the fields of the entry. Each field contains or identifies an object with associated attributes or data. The type of each entry may further define behavior in the form of methods the entry can implement. An entry type which is a subtype of another inherits all fields and behavior of its super-type, and contains additional fields and/or defines new/modified behavior. Entries may be expressed in a Java™ programming language. The database system may further employ a search engine which allows queries to be made upon entries in the database. In one implementation, the queries include a read operation, a take operation, and a notify operation. Each query request includes a command indicating the type of operation, and a template which is an entry object having some or all of its fields set to specific values that must be matched exactly.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: June 10, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert W. Scheifler, Kenneth C.R.C. Arnold, James H. Waldo
  • Patent number: 6570509
    Abstract: In a data transmitter having a data encoder, an encoder mode is detected. Thereafter, an excluded codeword output by the encoder operating in the encoder mode is identified. Next, a selected bit in the excluded codeword caused to have a predetermined value to produce a non-excluded codeword. Finally, the excluded codeword is substituted with the non-excluded codeword, wherein the non-excluded codeword is selected to mitigate effects of a decoding error in a receiver associated with the excluded codeword.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: May 27, 2003
    Assignee: Motorola, Inc.
    Inventors: Mark D. Hetherington, Lee Michael Proctor
  • Patent number: 6571230
    Abstract: Given an input sequence of data, a motif is a repeating pattern. The data could be a sequence of characters or sets of characters or even real values. In the first two cases, the number of motifs could potentially be exponential in the size of the input sequence and in the third case there could be uncountably infinite number of motifs. By suitably defining the notion of maximality and redundancy for any sequence with n characters, there exists only a linear (or no more than 3n) number of special motifs and every other motif can be generated from these irredundant motifs.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: May 27, 2003
    Assignee: International Business Machines Corporation
    Inventor: Laxmi P. Parida
  • Publication number: 20030090398
    Abstract: A system and method that efficiently compresses data sets that contain one or more repetitive data values. Substitute symbols represent repeated data sequences in the compressed data output. Data sequences that terminate with one or more of a particular value are specially processed by storing their substitute symbols separately from the general substitute symbol dictionary so that they are able to be more efficiently accessed. Substitute symbols for contiguous data sequences that consist of those particular values are also stored separately. The preferred embodiment specially processes data sequences that contain data bytes equal to zero.
    Type: Application
    Filed: February 19, 2002
    Publication date: May 15, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Nenad Rijavec
  • Patent number: 6538584
    Abstract: In some embodiments, the invention involves a circuit including a first set of conductors to carry a current bit set and last bit set circuitry to hold and provide a last bit set. The circuit also includes drivers coupled to interconnect conductors to provide signals from the drivers to the interconnect conductors and an encoder to receive the last bit set and the current bit set and determine whether to provide the current bit set or an encoded version of the current bit set to the drivers.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: March 25, 2003
    Assignee: Intel Corporation
    Inventors: Shekhar Y. Borkar, Matthew B. Haycock, Stephen R. Mooney, Aaron K. Martin, Joseph T. Kennedy
  • Patent number: 6525678
    Abstract: A programmable logic device (PLD) can be configured using configuration data stored on a memory. The configuration data is compressed using a compression algorithm before being stored on the memory. When the PLD is to be configured, the compressed configuration data is read from the memory, decompressed, then loaded onto the PLD.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: February 25, 2003
    Assignee: Altera Corporation
    Inventors: Kerry S. Veenstra, Boon Jin Ang
  • Publication number: 20020190878
    Abstract: An encoder uses an input file of data and a key to produce an output symbol. An output symbol with key I is generated by determining a weight, W(I), for the output symbol to be generated, selecting W(I) of the input symbols associated with the output symbol according to a function of I, and generating the output symbol's value B(I) from a predetermined value function F(I) of the selected W(I) input symbols. An encoder can be called repeatedly to generate multiple output symbols. The output symbols are generally independent of each other, and an unbounded number (subject to the resolution of I) can be generated, if needed. A decoder receives some or all of the output symbols generated. The number of output symbols needed to decode an input file is equal to, or slightly greater than, the number of input symbols comprising the file, assuming that input symbols and output symbols represent the same number of bits of data.
    Type: Application
    Filed: February 14, 2002
    Publication date: December 19, 2002
    Applicant: DIGITAL FOUNTAIN, INC.
    Inventor: Michael G. Luby
  • Publication number: 20020175841
    Abstract: An input module (30) notifies a module manager (21) of the output data format of the input module, and the module manager (21) generates a first data conversion module (31) based on the notification and joins the data conversion module to the end of a pipeline. The data conversion module (31) notifies the module manager (21) of the output data format of the data conversion module, and the module manager (21) generates a second data conversion module (32) based on the notification and joins the data conversion module to the end of the pipeline. The operation is repeated as many times as the number of multiplexing stages of multiplexed input data and an output module is joined to the termination position of the pipeline.
    Type: Application
    Filed: May 23, 2002
    Publication date: November 28, 2002
    Applicant: Yamaha Corporation
    Inventor: Yuji Koike
  • Publication number: 20020171567
    Abstract: A combination CD-ROM and MP3 recorder/player playing a CD-ROM decodes 16-bit ISO standard code words into an audio wave form converts this wave form to sound while encoding and digitizing the wave form into 24-bit MP3 format digital data. To conserve power the MP3 data is buffered in a solid state memory, preferably of the FLASH or DRAM type, before being written to a hard disk. Both reading of the CD/ROM and encoding the read contents as MP3 data, and interchange of MP3 data with other recorder/players, can be accomplished at greater than real-time play rates, permitting that, most typically, some 1200+ musical works can transferred expediently.
    Type: Application
    Filed: May 18, 2001
    Publication date: November 21, 2002
    Inventors: William Christopher Altare, Anton N. Handal
  • Patent number: 6437714
    Abstract: A device and method for performing channel encoding using a frame structure having a termination effect in a recursive systemic encoder for a communication system. The channel encoding device having: an inserter for inserting at least one predefined bit in an input data bit stream at a predetermined position; and a channel encoder for encoding the bit-inserted data bit stream.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: August 20, 2002
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Jae-Yoel Kim, Chang-Soo Park, Hee-Won Kang, Jun-Jin Kong, Jong-Seon No, Kyeong-Cheol Yang
  • Patent number: 6411223
    Abstract: Output symbols are generated using input symbols and basis elements. A plurality of basis elements are generated. Each basis element is generated from a predetermined function of associated input symbols associated with the basis element. For each output symbol, a set of associated basis elements associated with the output symbol is determined, and a set of direct associated input symbols directly associated with the output symbol is determined. For each output symbol, the output symbol is generated from a predetermined function of the associated basis elements and the associated input symbols.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: June 25, 2002
    Assignee: Digital Fountain, Inc.
    Inventors: Armin Haken, Michael G. Luby, Gavin Horn, Diane Hernek, John Byers, Michael Mitzenmacher
  • Patent number: 6408076
    Abstract: In order to descramble sections of scrambled data interleaved with sections of unscrambled data in a transport stream of broadcast video data, while leaving the sections with the original timing relationship in the transport stream, a common data flow path (1-5) is provided both for sections of scrambled data and sections of unscrambled data and signal path loops (6,7; 8,9) including cipher means (62,64) to enable the descrambling of scrambled data, and a control state machine for controlling the flow of data through said common data flow path and said signal path loops to enable passage of unscrambled data sections and descrambling of scrambled data sections, while maintaining the desired relative positions of the data sections.
    Type: Grant
    Filed: March 3, 1998
    Date of Patent: June 18, 2002
    Assignee: LSI Logic Corporation
    Inventor: Simon Bewick
  • Patent number: 6408382
    Abstract: An improved manifold array (ManArray) architecture addresses the problem of configurable application-specific instruction set optimization and instruction memory reduction using an instruction abbreviation process thereby further optimizing the general ManArray architecture for application to high-volume and portable battery-powered type of products. In the ManArray abbreviation process a standard 32-bit ManArray instruction is reduced to a smaller length instruction format, such as 14-bits. An application is first programmed using the full ManArray instruction set using the native 32-bit instructions. After the application program is completed and verified, an instruction-abbreviation tool analyzes the 32-bit application program and generates the abbreviated program using the abbreviated instructions. This instruction abbreviation process allows different program-reduction optimizations tailored for each application program. This process develops an optimized instruction set for the intended application.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: June 18, 2002
    Assignee: Bops, Inc.
    Inventors: Gerald G. Pechanek, Charles W. Kurak, Jr., Larry D. Larsen
  • Patent number: 6400287
    Abstract: A data structure for specifying the types of constants whose character values are to be converted to Unicode; for specifying which code page or pages are used for specifying the character encodings used in the source program for writing the character strings to be converted to Unicode; and that can be used to perform conversions from SBCS, mixed SBCS/DBCS, and pure DBCS character strings to Unicode. A syntax suitable for specifying character data conversion from SBCS, mixed SBCS/DBCS, and pure DBCS representation to Unicode utilizes an extension to the conventional constant subtype notation. In converting the nominal value data to Unicode, currently relevant SBCS and DBCS code pages are used, as specified by three levels or scopes derived from either global options, from local AOPTIONS statement specifications, or from constant-specific modifiers. Global code page specifications apply to the entire source program.
    Type: Grant
    Filed: July 10, 2000
    Date of Patent: June 4, 2002
    Assignee: International Business Machines Corporation
    Inventor: John R. Ehrman
  • Patent number: 6380873
    Abstract: A method for reducing radio frequency interference from a high frequency serial bus by scrambling data signals and reducing the repetition of control signals. Beginning and ending control signals are provided with meaningless signals provided therebetween.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: April 30, 2002
    Assignee: Quantum Corporation
    Inventors: Anthony L. Priborsky, Knut S. Grimsrud, John Brooks
  • Patent number: 6373409
    Abstract: A method and computer program product are provided for implementing text conversion table compression. For implementing text conversion table compression, a character sequence is loaded from a full-size conversion table. The character sequence is checked for one of plurality of character patterns. Responsive to identifying one of the plurality of character patterns, the character sequence is compressed into a compressed conversion table for the identified one character pattern. Responsive to failing to identify one of the plurality of character patterns, the character sequence is copied into the compressed conversion table. The character sequence from the full-size conversion table is checked for one of the plurality of character patterns including a repeating character sequence, a ramping character sequence, and a repeating high byte character sequence.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: April 16, 2002
    Assignee: International Business Machines Corporation
    Inventors: Christopher Robert Smith, James Lee Wright