To Or From Variable Length Codes Patents (Class 341/67)
  • Patent number: 8089379
    Abstract: Techniques, apparatus and systems are described for performing variable length decoding. In one aspect, a variable length decoding apparatus includes a first computation unit to determine whether a symbol corresponding to an input data is included in an upper group or a lower group of a variable length code tree. Responsive to the determination, when the symbol corresponding to the input data is included in the lower group, the first computation unit detects look-up table information corresponding to a subgroup that includes the symbol corresponding to the input data within the lower group that includes multiple subgroups. The variable length decoding apparatus includes a second computation unit to detect the symbol corresponding to the input data by searching a look-up table corresponding to the look-up table information when the look-up table information is received from the first computation unit.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: January 3, 2012
    Assignees: Core Logic, Inc., SNU R&DB Foundation
    Inventors: Ki Wook Yoon, Venkata Krishna Prasad Arava, Ki Young Choi, Man Hwee Jo, Hyouk Joong Lee
  • Patent number: 8078793
    Abstract: A non-volatile memory device stores configuration variables for use by a computer firmware. The variable is initially stored in the memory device in a manner that minimizes the number of bits used to store the variable that are in the updated state. When a request is received to change the initial value of the variable to an updated value, the value is changed in place by changing only the bits used to store the variable from an erased state to an updated state, by only setting the invert flag, by setting the invert flag and by changing one or more of the bits of the variable from the erased state to the updated state, or by storing the updated value of the variable in a new location in the memory device.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: December 13, 2011
    Assignee: American Megatrends, Inc.
    Inventor: Sergiy B. Yakovlev
  • Patent number: 8077063
    Abstract: An input bit stream is received and zone statistics such as zones count, zones center bit positions, and zones lengths are determined, where a zone is a set of non-transitioning bits in the input bit stream. Beginning and ending bit positions for each zone are determined simultaneously, and each beginning bit position is associated with an ending bit position. Zone statistics are calculated using the determined beginning and appropriate ending bit positions.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: December 13, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ankit Pal, Girraj K. Agrawal, Asif Iqbal
  • Patent number: 8072359
    Abstract: An object of the present invention is to provide a binary arithmetic coding device that allows real-time processing with a higher image quality. At a timing at which a ternary data string for a target bit is outputted, an updated coding range width and an updated range width of less probability are outputted. For that reason, while a binary conversion unit (32) and an f value retention processor (33) convert the ternary data string into a binary data string to output a coded bit, a binary arithmetic re-normalization unit (31) is allowed to perform a processing of binary arithmetic coding for the next bit.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: December 6, 2011
    Assignee: NTT Electronics Corporation
    Inventors: Shigeru Kasuya, Norihiko Nagai
  • Patent number: 8072358
    Abstract: A variable length decoder that decodes a variable length code to output data including a run and a level, the variable length decoder includes a memory that stores an output format of a run and a level according to a prefix for specifying an area which is generated by dividing a run-level plane based on the run; a extraction circuit that extracts the prefix, run computation data, and level computation data from the variable length code; and an output circuit that accesses the memory based on the prefix and outputs the data based on the run computation data and the level computation data.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: December 6, 2011
    Assignee: Fujitsu Limited
    Inventors: Taro Hagiya, Xuan Fu
  • Publication number: 20110291866
    Abstract: A variable-length decoding device includes a data determination unit which determines whether or not each of component values decoded by a variable-length decoding unit is a specific value; a data buffer that holds only a component value which is not the specific value; a last valid data determination unit which determines component values other than the last one of the component values not the specific value in a block; a flag buffer which holds flags each having a corresponding component value among the component values from the component value at the beginning of the block to the last component value and indicating whether or not the corresponding component value is the specific value; a flag buffer control unit which sets the flags; a data buffer control unit which controls writing in the data buffer; and a selecting unit which selects either zero or a coefficient read from the data buffer.
    Type: Application
    Filed: August 11, 2011
    Publication date: December 1, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Hideki KUROKI, Takeshi FURUTA
  • Patent number: 8068043
    Abstract: A method and apparatus of a digital signal processor for coding of a significant map. The method for coding of a significant map includes carrying out a scan of at least a portion of a block of transform coefficients; calculating runs of zeros of the scanned data; and coding runs of zeros with variable length coding.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: November 29, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Vivienne Sze, Madhukar Budagavi
  • Patent number: 8054206
    Abstract: A decoding method includes: inputting control information including first and second codec identifiers identifying first and second codecs corresponding to first and second material data, respectively, and first and second time information representing start times of decoding of the first and second material data, respectively; loading corresponding to the first codec identifier the first codec into the first decode processing unit; starting in the first decode processing unit corresponding to the first time information decoding of the first material data; and loading corresponding to the second codec identifier the second codec into the second decode processing unit.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: November 8, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Makoto Honda
  • Publication number: 20110267208
    Abstract: A method for encoding an input sequence of symbols to produce a bitstream and a method of decoding the bitstream to generate a reconstructed binary sequence. Encoding employs an encoding tree having primary codewords associated with leaf nodes and secondary codewords associated with internal nodes. A flush event may cause output of secondary codewords. A context model is used to select an encoding tree corresponding to an estimated probability at the encoder. The same context model is used by the decoder to select a decoding tree. The decoder interleaves bits from decoded bit sequences associated with different estimated probabilities based on the context model.
    Type: Application
    Filed: July 12, 2011
    Publication date: November 3, 2011
    Applicant: RESEARCH IN MOTION LIMITED
    Inventors: Gergely Ferenc Korodi, Dake He
  • Patent number: 8049648
    Abstract: A high-rate constrained code is provided to encode/decode channel data. A transformer translates binary channel data into an arbitrary alphabet size. The transformer selects an indicator word and makes forbidden prefix substitutions in the data to be transformed. A finite-state encoder imposes some user-defined constraint on the transformed data before the data is transferred to the channel. The high-rate constrained coding technique may be used to produce high-rate DC-limited and run-length-limited codes. The high-rate code can be used in tandem with error-correcting codes.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: November 1, 2011
    Assignee: Marvell International Ltd.
    Inventor: Panu Chaichanavong
  • Publication number: 20110260894
    Abstract: An entropy decoder and method for decoding code words with an indication of associated probability for each code word. The decoder may include an input buffer in communication with a branch node block, the branch node block in communication with a leaf node block. The input buffer operable to receive code words and the indication of associated probability. The branch node block comprising one or more branch node lookup tables and branch node control logic. The branch node control logic operable to process a code word in the input buffer using a selected table from the one or more branch node lookup tables to obtain leaf node information and a bit count of a code word size, the branch control logic further operable to refresh the input buffer to replace the bit count of the code word size and to make the leaf node information and the table selection available to the leaf node block. The leaf node block may include one or more leaf node lookup tables and leaf node control logic.
    Type: Application
    Filed: April 22, 2011
    Publication date: October 27, 2011
    Inventors: Weicheng Joseph Ku, Paul Daniel Imthurn
  • Patent number: 8044830
    Abstract: A method of processing a signal is disclosed. The present invention includes receiving a maximum number of band and a code value of at least one section length, calculating a bit number corresponding to the code value of the at least one section length using the maximum number of the band, and obtaining the section length information by decoding the code value of the section length based on the bit number. A method of processing a signal is disclosed. The present invention includes receiving factor information of a current frame, receiving flag information indicating whether a coding mode of the factor information is an absolute value mode or a relative value mode, and obtaining factor data of the current frame using factor data of a previous frame and the received factor information based on the flag information.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: October 25, 2011
    Assignee: LG Electronics Inc.
    Inventors: Sung Yong Yoon, Hee Suk Pang, Dong Soo Kim, Hyun Kook Lee, Jae Hyun Lim
  • Patent number: 8044831
    Abstract: The invention provides a decoding apparatus which guarantees a decoding speed of a predetermined unit. To this end, the decoding apparatus includes a shifter which detects a start bit of a codeword from coded data, a table which stores decode values of a plurality of symbol data at one address, a table which is used to store a shift amount of the shifter, a table which generates a data length of the decode values of the plurality of symbol data, a decoder which is used to generate an address of the first table from the coded data, a decoder which is used to generate an address of the second and third tables from the coded data, and a packer which couples or separates the decoded values of the plurality of symbol data to data for the predetermined fixed number of bits.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: October 25, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuji Hara, Hisashi Ishikawa
  • Patent number: 8038074
    Abstract: A system and method of compression is disclosed that includes the generation of position codes based on positions of individual codes. Individual codes having the same value are adjacent in the position code and are separated by a spacer code. The position codes can be generated from individual codes in increasing value or decreasing value of the individual codes. The position code can be prefixed by a maximum value of the individual codes or prefixed by a total number of the individual codes. The individual codes can be representative of an audio or a video data stream.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: October 18, 2011
    Assignee: Essex PA, L.L.C.
    Inventor: Donald M. Monro
  • Publication number: 20110248872
    Abstract: Devices and methods for entropy decoding a bitstream of encoded data by extracting a plurality of encoded subsequences from a payload field of the bitstream for parallel decoding on a set of parallel entropy decoders. The method includes dividing the payload of concatenated encoded subsequences into segments using a distribution function and distributing the segments amongst the set of parallel entropy decoders to balance the computational load among the parallel entropy decoders. The received bitstream includes auxiliary information inserted by the encoder to enable the decoder to entropy decode segments that begin with a portion of an encoded subsequence.
    Type: Application
    Filed: April 13, 2010
    Publication date: October 13, 2011
    Inventors: Gergely Ferenc KORODI, Dake HE, En-Hui YANG, Gaelle Christine MARTIN-COCHER
  • Publication number: 20110248873
    Abstract: A method and system for entropy coding can comprise, in response to detecting a first symbol combination comprising first run information indicating a first number of contiguous zero coefficients is greater than a cut-off-run value, assigning a first codeword to a first symbol combination, wherein the first codeword comprises an escape code from a first-level VLC table; and in response to a second symbol combination comprising second run information indicating a second number of contiguous zero coefficients is less than or equal to the cut-off-run value, assigning a second codeword to the second symbol combination, wherein the second codeword is from the first-level VLC table. The system and method can further comprise collecting coding statistics for a set of candidate symbol combinations and adjusting a mapping between codewords of the first-level VLC table and a subset of the set of candidate symbol combinations based on the coding statistics.
    Type: Application
    Filed: December 28, 2010
    Publication date: October 13, 2011
    Applicant: QUALCOMM Incorporated
    Inventors: Marta Karczewicz, Xianglin Wang
  • Publication number: 20110235719
    Abstract: The disclosure relates to a method for treating digital data, including a quantification step of calculating, in a space of dimension d, at least one vector index I1 for at least some of the vectors 1, the vectors 1 forming input data descriptors. The method is characterised in that the vector index I1 corresponds to the number of vectors preceding the vector 1 in the reverse lexicographic order, without involving a step of determining all of the vectors.
    Type: Application
    Filed: May 27, 2009
    Publication date: September 29, 2011
    Inventors: Marc Antonini, Leonardo Hidd Fonteles
  • Patent number: 8018359
    Abstract: Various embodiments are provided to reduce a processing time taken when plural bit lengths each assigned to plural strings are converted into plural codes. In one exemplary embodiment, in response to input of the plurality of bit lengths, a number of strings assigned each of the bit lengths, a bit length assigned to each of the strings, and a sequence number of each string in a group of strings assigned each of the bit lengths are recorded. A plurality of base codes are generated on the basis of the numbers of the strings recorded by the recording unit, the base codes each being a code used as a base for codes having the same one of the bit lengths. A plurality of codes is generated by performing in parallel a plurality of processes respectively for the plurality of strings.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Makoto Ogawa, Tadayuki Okada, Kiyoshi Takemura, Nobuyoshi Tanaka
  • Patent number: 8014453
    Abstract: A method, a codebook, and a Base Station (BS) for precoding are provided. The precoding method includes: obtaining a total uplink power of a User Equipment (UE); if the total uplink power is greater than ¾ of a rated total transmit power of antennas, selecting a codeword from a first codebook with imbalanced power between layers; otherwise, selecting a codeword from the first codebook and a second codebook with balanced power between layers, so as for precoding data to be transmitted according to the selected codeword. Thus, a loss of an antenna performance at a high signal-to-noise ratio is reduced, and the loss of the power amplification of the antenna is reduced if the transmit power of the antenna is restricted.
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: September 6, 2011
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yongxing Zhou, Qiang Wu
  • Patent number: 8009069
    Abstract: The invention is related to a method and a device for encoding of a bit sequence. Said method comprises generating, for each run of Ones comprised in the bit sequence, a unary representation of length of the respective run of Ones, generating a first sequence by concatenating the generated unary representations of lengths of runs of Ones, generating, for each run of Zeroes comprised in the bit sequence, a unary representation of the length of the respective run of Zeroes, generating a second sequence by concatenating the generated unary representations of lengths of runs of Zeroes, and bit plane encoding the generated first and second sequence of unary representations. In most cases, overall entropy of bit planes of unary representations of run lengths is smaller than entropy of the bit sequence. Thus, more compact encoding can be achieved.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: August 30, 2011
    Assignee: Thomson Licensing
    Inventors: Qu Qing Chen, Zhi Bo Chen, Kang Ying Cai, Jun Teng
  • Publication number: 20110206131
    Abstract: An encoder stage, and corresponding encoded bitstream and decoder. The encoder stage comprises: a variable length encoder for encoding an input signal; and a counter configured to dynamically detect an observed frequency at which different symbols are found to occur within each of a plurality of predetermined portions of the input signal, prior to the symbols of each respective portion being encoded by the variable length encoder. The variable length encoder is configured to encode the symbols of each portion using variable length coding performed in dependence on the observed frequencies detected within the respective portion of the input signal, to generate an encoded bitstream comprising the encoded symbols along with an additional element indicating information regarding the observed frequencies detected for each portion, and to output the encoded bitstream to at least one of a storage medium and a transmission medium for supply to a decoder.
    Type: Application
    Filed: July 16, 2010
    Publication date: August 25, 2011
    Inventors: Renat Vafin, Lazar Bivolarsky, Mattias Nilsson, Soren Vang Andersen
  • Patent number: 8004432
    Abstract: A time-of-flight measuring device for performing a hardware-based high-speed data compression process before transferring the data from a signal recorder to a data processor is provided. A time-series digital signal recorded by a signal recorder is converted to a plurality of time-series digital signals by being divided into a bit string including baseline information and a bit string not including the baseline information. Then, the time-series digital signal consisting of a bit string not including the baseline information is compressed by run-length encoding, such as zero length encoding or switched run-length encoding. Subsequently, static Huffman coding is performed on each of the time-series digital signals to reduce the data amount.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: August 23, 2011
    Assignee: Shimadzu Corporation
    Inventor: Eizo Kawato
  • Patent number: 8004431
    Abstract: Methods and systems for parsing and decoding compressed data are provided. Random segments of the compressed data may be decompressed and positioned appropriately in the corresponding uncompressed data set. The methods and systems utilize variable to fixed length (VF) coding techniques. For some applications, the VF coding techniques may be implemented within media encoders, decoders, or combined encoder-decoders (CODECs).
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: August 23, 2011
    Assignee: QUALCOMM Incorporated
    Inventor: Yuriy Reznik
  • Patent number: 7999705
    Abstract: A character data set is compressed with a compression algorithm module of a computer system to generate one or more streams of encoded values. The compression module is configured to compress the character data set with an base-n range encoder to generate one or more streams of encoded values with UTF-8 or UTF-16. A code points mapper assigns the encoded values to code points in a Unicode format. A UTF encoder encodes the streams of assigned encoded values.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: August 16, 2011
    Assignee: Red Hat, Inc.
    Inventor: James Paul Schneider
  • Publication number: 20110193729
    Abstract: An information processing apparatus for converting fixed-length codes into variable-length codes comprises: an input unit configured to obtain each of the fixed-length codes as an input code; a determination unit configured to determine a fixed length encoding method of the input code; a conversion unit configured to perform variable length encoding, by using a first variable length encoding method, on the input code encoded by a first fixed length encoding method, and perform variable length encoding, by using a second variable length encoding method, on the input code encoded by a second fixed length encoding method; and an output unit configured to output a variable-length code obtained by the conversion unit.
    Type: Application
    Filed: January 14, 2011
    Publication date: August 11, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Jumpei Ashida
  • Patent number: 7994948
    Abstract: Provided is a table generation method of decoding a variable-length code. The table generation method includes receiving a variable-length code table and a search width N, generating a K-ary tree from the variable-length code table and the search width N, and generating an N-bit code table from the K-ary tree.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: August 9, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seung Hyun Cho, Moo Kyoung Chung, Kyung Su Kim, Jae Jin Lee, Jun Young Lee, Seong Mo Park, Nak Woong Eum
  • Patent number: 7994949
    Abstract: A character data set is compressed with a compression algorithm module of a computer system to generate one or more streams of encoded values. The compression module is configured to compress the character data set with an entropy encoder to generate one or more streams of encoded values with UTF-8 or UTF-16. A code points mapper assigns the encoded values to code points in a Unicode format. A UTF encoder encodes the streams of assigned encoded values.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: August 9, 2011
    Assignee: Red Hat, Inc.
    Inventor: James Paul Schneider
  • Publication number: 20110176646
    Abstract: An input bit stream is received and zone statistics such as zones count, zones center bit positions, and zones lengths are determined, where a zone is a set of non-transitioning bits in the input bit stream. Beginning and ending bit positions for each zone are determined simultaneously, and each beginning bit position is associated with an ending bit position. Zone statistics are calculated using the determined beginning and appropriate ending bit positions.
    Type: Application
    Filed: January 18, 2010
    Publication date: July 21, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Ankit PAL, Girraj K. Agrawal, Asif Iqbal
  • Publication number: 20110169670
    Abstract: Apparatus having corresponding methods and tangible computer-readable media comprise: an input module to receive a bitstream representing data words encoded according to a variable-length code; a peek module to select a peek block comprising a predetermined number of consecutive bits in the bitstream; and a decoder to provide a plurality of the data words based on the peek block.
    Type: Application
    Filed: August 18, 2009
    Publication date: July 14, 2011
    Inventors: Dayin Gou, Shuguang Gong
  • Patent number: 7978103
    Abstract: To provide a code amount estimating device which can perform, at high speed and with high precision, estimation of code amount obtained after arithmetic coding. The code amount estimating device includes a context index calculation unit which calculates a context index of a binary symbol included in binary data, and an estimate code amount calculation unit which calculates an estimate code amount for the binary data based on symbol occurrence probability information stored in association with the calculated context index and on a held probability interval range. The estimate code amount calculation unit estimates the code amount for the binary data according to code amount information indicating an association between (i) a combination of a binary symbol string including one or more binary symbols, symbol occurrence probability information, and a probability interval range and (ii) an estimate code amount for the binary symbol string.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: July 12, 2011
    Assignee: Panasonic Corporation
    Inventors: Yukinaga Seki, Takuma Chiba, Kenjiro Tsuda, Tatsuro Juri
  • Patent number: 7970223
    Abstract: A variable-length encoder that feeds a Coded Block Pattern (CBP) as an input symbol to variable-length code output part. Coded symbol memory supplies CBPs in neighboring blocks as coding map table reference information to coding map table provider. Coding map table provider determines a coding map table used in coding of the CBP, based on these CBPs in the neighboring blocks, and provides a coding map table H4 to variable-length code output part. Variable-length coding table provider feeds a variable-length coding table to variable-length code output part. Then the coding target CBP is subjected to variable-length coding, and the resultant is outputted as coded data. This allows information source coding of coding symbols to be performed efficiently according to the coding condition and the property of image.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: June 28, 2011
    Assignee: NTT DoCoMo, Inc.
    Inventors: Kazuo Sugimoto, Satoru Adachi, Sadaatsu Kato, Minoru Etoh, Mitsuru Kobayashi, Hiroyuki Yamaguchi
  • Publication number: 20110150097
    Abstract: The invention relates to a method for encoding of a bit amount of a data section and to a corresponding decoding method. Furthermore, the invention relates to encoding, decoding, transmission and/or storage of audio and/or video data wherein said method for encoding of a bit amount of a data section and/or said corresponding decoding method are used in processing of the audio and/or video data. Said method for encoding of a bit amount of a data section comprises the steps of encoding said bit amount indicating integer as a first number of equally valued bits followed by a stop bit of different value wherein said first number equals said bit amount increased by a threshold value. Using said method, quotients of values larger than a threshold can be encoded using unary as well as binary code wherein quotients of values smaller than the threshold can be encoded in unary code.
    Type: Application
    Filed: June 25, 2009
    Publication date: June 23, 2011
    Inventor: Johannes Boehm
  • Publication number: 20110150351
    Abstract: Parallelization of decoding of a data stream encoded with a variable length code includes determining one or more markers, each of which indicates a position within the encoded data stream. The determined markers are included into the encoded data stream together with the encoded data. At the decoder side, the markers are parsed from the encoded data stream and based on the extracted markers. The encoded data is separated into partitions, which are decoded separately and in parallel.
    Type: Application
    Filed: February 9, 2010
    Publication date: June 23, 2011
    Applicant: STMICROELECTRONICS Pvt. Ltd.
    Inventors: Surinder Pal SINGH, Aneesh Bhasin, Kaushik Saha
  • Patent number: 7965206
    Abstract: An apparatus and a method of lossless coding and decoding are provided. The apparatus to perform lossless coding may selectively perform an arithmetic coding scheme or a Huffman coding scheme with respect to a symbol. The apparatus to perform lossless coding may generate a bitstream including a first coding bit, generated according to the Huffman coding scheme. Such bitstream may include a reserved bit for the arithmetic coding scheme.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: June 21, 2011
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Ki Hyun Choo, Konstantin Osipov, Boris Kudryashov
  • Patent number: 7965207
    Abstract: Large integers may be stored according to byte-stable variable-length encoding systems and methods, eliminating the need to store many leading-zero bits in large integers. Such a byte-stable variable-length integer encoding scheme may represent identical sequences of numbers in a consistent byte pattern within a byte stream, preserving the redundancy of the data and allowing for improved compression rates.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: June 21, 2011
    Assignee: SEOmoz, Inc.
    Inventor: Benjamin Cappel Hendrickson
  • Patent number: 7956773
    Abstract: Provided is a bit stream processor using a reduced table lookup. The bit stream processor includes a bit stream exclusive register in a general purpose register in order to process data of a variable length effectively. Additionally, the bit stream processor an instruction of a table lookup method to which a prefix method is applied and a bit stream exclusive instruction in order to reduce an entire memory size.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: June 7, 2011
    Assignees: Electronics and Telecommunications Research Institute, Kwangwoon University Industry-Academic Collaboration Foundation
    Inventors: Se-Wan Heo, Seong-Won Lee, Jung-Hee Suk, Tae-Moon Roh, Jong-Dae Kim
  • Patent number: 7956774
    Abstract: An image coding apparatus provides a run-length encoding unit RLE1 that subjects quantized coefficients which are obtained by quantizing frequency components of an image signal to a variable length coding process by using a run value Run that indicates the number of successive zero coefficients and a level value Lev that indicates a value of a non-zero coefficient following the zero coefficients. The run-length encoding unit RLE1 includes a reordering unit Lreodr for reordering level values Lev; a variable length coder LVLC for coding reordered level values ROLev by using a code table that is selected according to the value of a quantization parameter QP; a reordering unit Rreodr for reordering run values Run from high frequency component of the quantized coefficients to low frequency component; and a variable length coder RVLC for coding reordered run values RORun by using a code table that is selected according to the number of already-processed run values.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: June 7, 2011
    Assignee: Panasonic Corporation
    Inventors: Shinya Kadono, Satoshi Kondo, Makoto Hagai, Kiyofumi Abe
  • Patent number: 7956785
    Abstract: The present invention relates to a digital to analog converter, to a return-to-zero digital to analog converter with improved wideband characteristics by enabling a return-to-zero output without separate clock and controller, and a converting method thereof. Since the return-to-zero digital to analog converter and the converting method thereof are capable of outputting an RZ output without directly providing a clock signal to an analog circuit by configuring a switch for generating a zero point signal and a differential pipeline for providing a differential signal to control the switch according to input digital data using a differential structure, the converter can provide wideband characteristics and high dynamic performance.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: June 7, 2011
    Assignee: Chung-Ang University Industry-Academy Cooperation Foundation
    Inventors: Kwang-Hyun Baek, Hong Chang Yeoh, Jae-Hun Jung, Yun-Hwan Jung, Joon Hyun Baek
  • Patent number: 7948406
    Abstract: A method for encoding a sequence of integers includes identifying a contiguous sub-sequence in the sequence of integers wherein the sub-sequence includes interrelated integers having a same prefix when being variable length encoded and an independent last integer. A code for the contiguous sub-sequence is formed using a code for an indication of the number of interrelated integers in the contiguous subsequence, a code of a prefix indication, and the suffixes of variable length codes of the integers in the contiguous sub-sequence. In doing so, a single prefix is sufficient instead of n individual prefixes.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: May 24, 2011
    Assignee: Thomson Licensing
    Inventors: Qu Qing Chen, Zhi Bo Chen, Jun Teng
  • Publication number: 20110102208
    Abstract: Provided is an encoding apparatus including an encoding unit that converts, based on a first conversion rule group according to which a total value for a base-K symbol sequence is X and a second conversion rule group according to which the total value for the base-K symbol sequence is ?X among conversion rule groups for converting an L-bit bit sequence into the base-K symbol sequence (K>2) of N/2 symbol, an M-bit (M?2*L) bit sequence into the base-K symbol sequence of N symbols. When converting the M-bit bit sequence into the base-K symbol sequence of N symbols, the encoding unit converts a first-half N/2 symbol based on the first conversion rule group and converts a second-half N/2 symbol based on the second conversion rule group.
    Type: Application
    Filed: October 21, 2010
    Publication date: May 5, 2011
    Applicant: Sony Corporation
    Inventor: Toru Terashima
  • Patent number: 7936290
    Abstract: A data compressor for compressing a data signal and a corresponding data decompressor are disclosed. The data compressor comprises: compression circuitry for compressing said data signal using a plurality of variable length compression codes; a digital code select signal generator for generating a digital code select signal from an indicator signal indicative of a preferred compression distribution, a frequency of said digital code select signal being higher than a frequency of said indicator signal and an average value of said digital code select signal corresponding to an average value of said indicator signal; said compression circuitry being responsive to said digital code select signal to select between one of said plurality of compression codes in dependence upon a current value of said digital code select signal and to compress said data signal using said selected compression code.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: May 3, 2011
    Assignee: ARM Limited
    Inventors: Martinus Cornelis Wezelenburg, Jeremy Piers Davies
  • Publication number: 20110084859
    Abstract: A data modulation apparatus includes: insertion means for inserting information bits into data at a predetermined interval; conversion means for converting the data into which the information bits are inserted into an RLL code based on a modulation table that has a variable-length conversion rule; setting means for setting a control section that is used for calculating a value of the information bit; and determination means for determining the value of the information bit inserted into the control section that is different from a calculation target by calculating the code of the control section.
    Type: Application
    Filed: September 21, 2010
    Publication date: April 14, 2011
    Applicant: Sony Corporation
    Inventor: Toshiyuki NAKAGAWA
  • Publication number: 20110085537
    Abstract: Techniques for encoding a phase adjustment for a feedback signal in a closed-loop transmit diversity system. In an aspect, codewords for the phase adjustments are chosen according to a variable-length prefix code. The prefix code aspect allows the codewords to be transmitted in sequence on the feedback channel without being separated by “commas” or demarcation symbols. The variable-length aspect provides a variety of coarse and fine phase adjustment quantization step sizes to accommodate multiple different channel scenarios. In an aspect, the length of the codewords may be further optimized according to the Huffman encoding algorithm.
    Type: Application
    Filed: October 8, 2009
    Publication date: April 14, 2011
    Applicant: QUALCOMM Incorporated
    Inventors: Ming-Chang Tsai, Ann Tsuey Jiuan Wu, Hailiang Cai
  • Publication number: 20110084858
    Abstract: An encoding apparatus includes a unit that calculates a plurality of normalized values by dividing input values in an input signal by either a normalization coefficient that is closest to a maximum value of absolute values of the input values or a normalization coefficient that is closest to the maximum value from among normalization coefficients that are larger than the maximum value; a unit that generates a plurality of quantized values by quantizing the plurality of normalized values; a unit that stores a code table in which the smaller the probability of occurrence of the plurality of quantized values, the longer the code length of a variable-length code allocated to the plurality of quantized values; and a unit that outputs, when the plurality of quantized values are all zero, a variable-length code allocated to a combination of a plurality of quantized values in accordance with the code table.
    Type: Application
    Filed: August 30, 2010
    Publication date: April 14, 2011
    Inventors: Shiro SUZUKI, Yuuki Matsumura, Yasuhiro Toguri, Yuuji Maeda
  • Patent number: 7924843
    Abstract: Methods, apparatus and computer readable code for compression, encoding and decoding of units of data such as packets are disclosed. In some embodiments, methods, apparatus and computer readable code for transmitting and/or receiving the data packets (for example, transmitting from a sending location to a receiving location where packets are received) are provided. For at least some packets, a dictionary is determined from a respective group of packets, including a first set of historical packets and excluding a second set of historical packet. Each target packet is encoded and/or compressed and/or decoded using the respective dictionary. Optionally, the respective group of packet includes the actual target packet to be encoded and/or compressed and/or decoded.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: April 12, 2011
    Assignee: Ramot at Tel Aviv University Ltd.
    Inventors: Yossi Matias, Raanan Refua
  • Patent number: 7924179
    Abstract: To provide a decoding device that compactly stores prefix related information therein compatible to variable-length codes used in various systems. The decoding device includes a register file in which a prefix common portion and a word length of the prefix common portion, prefix individual portions and word lengths of the prefix individual portions, word lengths of suffixes, and an input bit sequence are stored, a bit matching unit that determines a prefix included in the input bit sequence from prefixes generated from the prefix common portion and the prefix individual portions, a codeword computation unit that computes the word length of a codeword included in the input bit sequence using the respective word lengths of the prefix common portion, a prefix individual portion, and a suffix corresponding to the determined prefix, and an index computation unit that computes an index in a symbol table using the respective word lengths of the corresponding suffix and the codeword.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: April 12, 2011
    Assignee: NEC Corporation
    Inventor: Takahiro Kumura
  • Patent number: 7926007
    Abstract: A writing apparatus includes a unit storing writing data, a unit which acquires pattern information on patterns defined in the data, a unit which generates a table where each pattern information corresponds to a number of times each pattern information is used, for each predetermined region, a unit which generates a Huffman tree, based on the table, a unit which generates another table where each pattern information corresponds to a variable length binary code generated by encoding each pattern information such that the larger the number of times each pattern information is used, the smaller a value of the code, based on the tree, a unit which produces converted data, which is defined by the data, in the region into a predetermined format using the code, based on the other table, and a unit which writes the patterns defined, onto a workpiece, based on the converted data in the region.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: April 12, 2011
    Assignee: NuFlare Technology, Inc.
    Inventor: Hayato Shibata
  • Patent number: 7924180
    Abstract: A decoder for decoding an input bit stream into a plurality of symbols is provided. The decoder includes an extractor, a length generator, a base selector, and a processing unit. The extractor receives the input bit stream and extracts a code with a predetermined codeword length therefrom. The length generator receives the extracted code and determines a first codeword length corresponding to a symbol according to the extracted code and a base table. The base selector determines a codeword base corresponding to the first codeword length according to the base table. The processing unit generates the symbol corresponding to the extracted code according to the codeword base, an offset table and the first codeword length.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: April 12, 2011
    Assignee: Mediatek Inc.
    Inventor: Yung-Chang Chang
  • Publication number: 20110080308
    Abstract: A variable length code decoding device for decoding variable length code data, including: a table memory that stores a plurality of decoding process tables having a reference relationship therein; and a decoding control unit that sequentially selects the decoding process tables according to the decoded data to control a process of decoding the variable length code data, wherein when referring to the decoding process table to perform an initial decoding of the variable length code data, the initial decoding process is conducted by a longer bit length to be clipped from the variable length code data for referring to the decoding process table than the bit length used when referring to the other portions of the decoding process table.
    Type: Application
    Filed: December 6, 2010
    Publication date: April 7, 2011
    Inventors: Hiroaki NAKATA, Fumitaka Izuhara, Kazushi Akie, Takafumi Yuasa
  • Patent number: 7920629
    Abstract: Transform coefficients of sample blocks of a macroblock of a video picture are encoded by adaptively encoding a combination, the number of non-zero coefficients before the trailing one coefficients and the number of trailing one coefficients. The transform coefficients may be further encoded by adaptively encoding one or more of the signs of the trailing one coefficients, the level measures of the interposed in the non-zero coefficients. Adaptive encoding of the number and trailing one coefficients may be performed in view of one or more neighboring sample blocks, whereas adaptive encoding of level measure may be performed in view of quantization parameters of a macroblock and previously encoded level measures. Decoding may be performed in an inverse manner.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: April 5, 2011
    Assignee: RealNetworks, Inc.
    Inventors: Gisle Bjontegaard, Karl O. Lillevold