Synchronizing Means Patents (Class 345/213)
  • Patent number: 9035925
    Abstract: Disclosed is a technique, in which when driving chips are used in which control units are respectively merged in driving devices, all modes of the other driving chips are simultaneously converted into a fail safe mode when one driving chip detects a non-signal state. A circuit for controlling a non-signal of a flat panel display device includes a plurality of driving chips. When detecting a non-signal state that the normal signal (LVDS) is not inputted from an outside, each of the plurality of driving chips simultaneously changes potentials of non-signal detection pads of its own driving chip and another driving chip so that all the driving chips are operated in the fail safe mode.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: May 19, 2015
    Assignee: SILICON WORKS CO., LTD.
    Inventors: Byung-Min Kim, Young-Gi Kim, Dong-Yun Jeong, Joon-Ho Na
  • Publication number: 20150130781
    Abstract: A three-dimensional image display apparatus includes a display panel configured to display an image and including gate lines, data lines, and pixels connected to the gate lines and the data lines, a data driver configured to drive the data lines, a gate driver configured to drive the gate lines, a lens panel configured to refract light of the image displayed by the display panel, a lens driver configured to drive the lens panel, a lens controller configured to control the lens driver, and a timing controller configured to control the data driver, the gate driver, and the lens driver in response to an image signal and a control signal. The lens controller and the timing controller are mounted on the same control board.
    Type: Application
    Filed: June 9, 2014
    Publication date: May 14, 2015
    Inventors: Sung Woo LEE, Il-Joo KIM, Jae-Hyun PARK, Dong-Ki LEE, Jeesu PARK
  • Publication number: 20150130784
    Abstract: A method of driving a display device includes a writing operation and a reading operation. The writing operation includes writing first to Mth frame data in a first frame memory during first to Mth frame periods. The reading operation includes reading (L?M)th and (L?M+1)th frame data among the first to Mth frame data from the first frame memory during an Lth frame period. M may be three or more, and L may be an integer ranging from (M+1) to (2M?1). The frame data read from the first frame memory corresponds to an image to be displayed. Reading and writing operations are further performed for remaining ones of the frame memories.
    Type: Application
    Filed: October 9, 2014
    Publication date: May 14, 2015
    Inventors: Jung-Taek KIM, Kyoung-Ho LIM, Jae-Hoon LEE, Woo-Seok JANG
  • Publication number: 20150130786
    Abstract: The timing controller determines the number of data lanes (11, 12, 13), which are used to transfer data, based on information in relation to an amount of data to be transferred during a predetermined time period. Out of the plurality of data lanes (11, 12, 13), the determined number of data lane(s) (11, 12, 13) are used to transfer data. Further, a data lane(s) (11, 12, 13) which is not used in the data transfer is deactivated.
    Type: Application
    Filed: January 21, 2015
    Publication date: May 14, 2015
    Inventors: Kohji SAITOH, Masaki UEHATA, Asahi YAMATO
  • Publication number: 20150130783
    Abstract: A display unit includes a display panel and a drive circuit, the display panel including pixels, each pixel including a light emitting element and a pixel circuit, wherein the pixel circuit includes a first transistor being configured to sample a voltage of a signal line, a second transistor being configured to control a current applied to the light emitting element, a third transistor being connected to the source of the second transistor, and a holding capacitor configured to hold the voltage sampled by the first transistor, the drive circuit being configured to, when pixel rows are grouped into units, sequentially perform correction of adjusting a gate-to-source voltage of the second transistor to be close to a threshold voltage of the second transistor for each of the units, being configured to sequentially output a fixed voltage to a source of the second transistor before performing the correction.
    Type: Application
    Filed: October 7, 2014
    Publication date: May 14, 2015
    Inventor: Naobumi Toyomura
  • Publication number: 20150130782
    Abstract: A display device includes: a display panel comprising a plurality of pixels coupled to a plurality of gate lines and a plurality of data lines, respectively; a gate driver configured to drive the plurality of gate lines; a data driver configured to drive the plurality of data lines; and a timing controller configured to control the gate driver and the data driver and to provide the data driver with a data signal generated by compressing an image signal received from an external device, wherein the timing controller is configured to compress the image signal according to a first compression scheme and a second compression scheme to generate a first compression signal and a second compression signal, respectively, and wherein the timing controller is configured to select whichever one, from among the first compression signal and the second compression signal, that has a relatively narrower bit width as the data signal.
    Type: Application
    Filed: June 11, 2014
    Publication date: May 14, 2015
    Inventor: Tadashi Amino
  • Publication number: 20150130785
    Abstract: Disclosed is an organic light-emitting display device and operating method thereof that may include an organic light-emitting diode, a first transistor controlled by a sensing signal and connected to a data line, a second transistor controlled by a scanning signal and connected to the data line, and a driving transistor having first to third nodes, wherein a reference voltage is applied to the first node through the first transistor, a data voltage is applied to the second node through the second transistor, and the third node is connected to a driving voltage line.
    Type: Application
    Filed: October 23, 2014
    Publication date: May 14, 2015
    Inventors: HunKi SHIN, BumSik KIM
  • Publication number: 20150130862
    Abstract: Low power consumption is realized focusing on the refresh interval of a low leakage display panel. Display systems and microcomputers are described herein. One embodiment of a display system includes a display driver. The driver receives an enable signal from the outside, stops the display operation of an internal circuit in an inactive state of the enable signal, and resumes the display operation of the internal circuit in an active state. Instead of the enable signal, a command supplied from the outside may be used. When resuming the display operation, the display driver performs control to make the start timing of the display operation earlier for a circuit that requires a long time for activation. A microcomputer that outputs an enable signal or a command controls the output or the output stop of display data according to the state of the enable signal or the command.
    Type: Application
    Filed: November 4, 2014
    Publication date: May 14, 2015
    Inventor: Kei MIYAZAWA
  • Publication number: 20150123964
    Abstract: An organic light emitting diode (OLED) display and driving method thereof are disclosed. One inventive aspect includes a plurality of pixels, a scan driver, first and second power generation unit and a data driver. The scan driver supplies a first scan signal to odd-numbered scan lines during a first period and a second scan signal to even-numbered scan lines during a second period. The first and second power generation units set the pixels in a non-emission state during at least one frame of the first and second periods. The data driver supplies a data signal to data lines synchronous to the first and second scan signal.
    Type: Application
    Filed: November 4, 2014
    Publication date: May 7, 2015
    Inventors: Jae-Hoon LEE, Jae-Woo SONG
  • Publication number: 20150123963
    Abstract: A display driving device and a method for driving a display are provided. The display driving device includes a host and a driving chip. The host transmits an image data and a synchronization signal. The driving chip receives the image data and the synchronization signal and drives a display panel to display frames. The driving chip includes a storage unit, a driving module, and a control circuit. The storage unit stores the image data. The driving module drives the display panel to display the frames according to the image data from the host and a timing generator frequency of the driving module. The control circuit detects a target frequency of the synchronization signal and the timing generator frequency of the driving module, compares the target frequency and the timing generator frequency, outputs an adjustment value according to the comparison result, and adjusts the timing generator frequency of driving module.
    Type: Application
    Filed: December 20, 2013
    Publication date: May 7, 2015
    Applicant: Novatek Microelectronics Corp.
    Inventors: Wen-Pin Tsai, Jen-Chung Chang
  • Publication number: 20150116307
    Abstract: A method of differently producing driving clock signals for a shift register of a gate lines driving circuit of a Liquid Crystal Display (LCD), the method includes the steps of determining whether an ambient temperature is greater than or not in comparison to a predetermined threshold temperature; in response to the determining indicating that the ambient temperature is greater, using a first ON voltage and a first charge canceling method; and in response to the determining indicating that the ambient temperature is not greater, using a second ON voltage and a second charge canceling method, where the second ON voltage is different from the first ON voltage and where the second charge canceling method is different from the first charge canceling method. The second charge canceling method may have a shorter duration than that of the first charge canceling method. The second ON voltage may be greater than the first ON voltage.
    Type: Application
    Filed: June 2, 2014
    Publication date: April 30, 2015
    Applicant: Samsung Display Co., LTD.
    Inventors: Yun-Tae KIM, Du-Hyun KIM, Eun-Suk KIM, Hoe-Mi KIM, Jin-Gwan JANG, Bong-Chool JEON
  • Publication number: 20150116306
    Abstract: A method of refreshing a memory array for a driving circuit includes generating a word-line scanning signal corresponding to a word-line of a memory array, and turning on a plurality of memory cells corresponding to the word-line of the memory array according to the word-line scanning signal to refresh the plurality of memory cells corresponding to the word-line of the memory array, wherein the memory has a first number of bit-lines and a second number of word-lines.
    Type: Application
    Filed: December 20, 2013
    Publication date: April 30, 2015
    Applicant: Sitronix Technology Corp.
    Inventors: Chung-Hsin Su, Tsun-Sen Lin
  • Publication number: 20150116380
    Abstract: The embodiments discussed herein relate to systems, methods, and apparatus for synchronizing a pulse width modulation (PWM) dimming clock signal with a frame rate signal, line sync signal, and/or a horizontal sync signal of a display device. The PWM dimming clock signal can be generated by a synchronization block having a programmable offset/delay. The programmable offset/delay can control the offset or phase difference between an input and an output clock signal of the synchronization block. Depending on the clock rate of PWM dimming and/or panel resolution, the phase/offset delay can be adjusted to achieve the optimum front of screen performance. Additionally, an input clock generator/missing pulse detection block can output a programmed clock signal to the synchronization block in case of a missing external clock, or insert a pulse when there is a missing pulse detected, thereby providing an un-interrupted input clock signal to the PWM generator.
    Type: Application
    Filed: September 30, 2014
    Publication date: April 30, 2015
    Inventors: Asif HUSSAIN, Andrew P. AITKEN, Manisha P. PANDYA
  • Patent number: 9019258
    Abstract: Provided is a display device including a pixel array forming by arranging a plurality of pixels whose display grayscale are controlled according to a pixel signal written, a signal line drive unit that outputs a pixel signal, to a plurality of signal lines, with a polarity according to a polarity signal, a scan line drive unit that drives the plurality of signal lines and performs a writing of the pixel signal output to the signal line into the pixels, a polarity signal generation unit that generates the polarity signal instructing the polarity of the pixel signal to be reversed, and supplies the result to the signal line drive unit, and a frame cycle set unit that generates the vertical start pulse in such a manner that a period of the number of vertical clocks that is not a multiple of the N is one frame period.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: April 28, 2015
    Assignee: Japan Display West Inc.
    Inventor: Kunio Enami
  • Publication number: 20150109284
    Abstract: The apparatus for driving LED display includes a system control unit having a synchronization signal generator configured to generate a synchronization start signal and a plurality of phase locked loop circuits. Each of the phase locked loop circuits includes a divider coupled to the voltage controlled oscillator and configured to change the sequence of dividing ratios over a modulation period, a sigma delta modulator configured to generate a sequence of random numbers to the divider, and a spread spectrum modulation depth controller coupled to the sigma delta modulator and configured to receive the synchronization start signal from the synchronization signal generator. Upon receipt of the synchronization start signal, the spread spectrum modulation depth controller starts a spread spectrum modulation.
    Type: Application
    Filed: October 17, 2013
    Publication date: April 23, 2015
    Applicant: SCT Technology, Ltd.
    Inventors: Eric LI, Shean-Yih CHIOU, Shang-Kuan TANG, Xinchao PENG
  • Patent number: 9013380
    Abstract: An organic light emitting display is provided. The organic light emitting display includes a display unit coupled to scan lines and data lines and including pixels configured to receive first and second power sources, and a DC-DC converter for generating the first and second power sources. The DC-DC converter includes first and second power source generating units for generating the first and second power sources from an input power source and for outputting the first and second power sources to first and second output ends, a controller for controlling driving of the first and second power source generating units, and first and second short sensing units for outputting first and second short sensing signals to the controller when voltages of the first and/or second output ends are greater than or equal to corresponding first and second reference voltages.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: April 21, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jeong-Min Seo, Sung-Cheon Park
  • Patent number: 9013468
    Abstract: A display device includes a data driver for applying a data signal to a data line; a gate driver for applying a gate signal to a gate line; a level shifter for shifting a voltage level of a signal applied to the gate driver; and a signal controller for controlling the data driver, the level shifter, and the gate driver, wherein when a signal exchange between the data driver and the signal controller has an abnormality, the signal controller maintains a control signal applied to the level shifter in an off level.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: April 21, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung-Uk Choi, Seon Hye Kim, Sang Hyun Lee, Jeong Bong Lee
  • Publication number: 20150103068
    Abstract: A method of driving a display panel is disclosed. In one aspect, the display panel includes a plurality of pixels arranged in odd and even rows and a plurality of odd and even gate lines respectively connected to the pixels of the corresponding odd and even rows. The method includes outputting odd gate signals to the odd numbered gate lines during two consecutive subframes and outputting even gate signals to the even numbered gate lines during two consecutive subframes. A frame is divided into two subframes.
    Type: Application
    Filed: October 9, 2014
    Publication date: April 16, 2015
    Inventors: Jung-Won KIM, Joon-Chul GOH, Hong-Soo KIM
  • Publication number: 20150103067
    Abstract: A display device includes a panel displaying an image using image data and including a common electrode to which a common voltage is applied; a timing controller providing the image data to the panel and outputting a correction voltage corresponding to the image data; and a power supply unit generating a compensation voltage using a panel common voltage and the correction voltage and providing the compensation voltage to the panel, wherein the panel common voltage is a voltage measuring the common voltage applied to the panel.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 16, 2015
    Inventors: Jung-Hoon WOO, Young-Ho KIM, Min-Ki KIM, Hwan-Joo LEE
  • Patent number: 9007355
    Abstract: An OLED device is disclosed that enhances display quality by minimizing capacitance deviation between data lines of the OLED device. The capacitance deviation may be minimized by utilizing an expansion portion of a power line of the OLED device. The capacitance deviation may also by minimized by utilizing an overlap pattern that overlaps a plurality of the data lines.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: April 14, 2015
    Assignee: LG Display Co., Ltd.
    Inventors: Byeong Uk Gang, Seung Tae Kim, Ji Eun Lee, Hong Suk Kim
  • Patent number: 9007358
    Abstract: When an image signal suitable for performing automatic adjustment of an effective image area and a dot clock is not output, the adjustment may be unsuccessfully performed. An effective image area detector detects an effective image area and determines whether an image in the effective image area is a blank image. If a synchronization signal detector determines that there exists a synchronization signal and if the effective image area detector determines that the image is not a blank image, a controller adjusts an area captured as image data by an input signal processor.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: April 14, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masahiro Funada
  • Patent number: 9007357
    Abstract: A method of deserializing signals output from a master can include generating an indication signal based on occurrence of a first signal pattern input via a data line during a first period and occurrence of a second signal pattern input via a clock line during the first period and enabling a deserializer in response to the indication signal and deserializing serialized video data input via the data line during a second period following the first period, in response to a clock signal input via the clock line during the second period. Related circuits are also disclosed.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: April 14, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Jin Park, Jong-Seon Kim, Jae-Youl Lee, Chang-Min Kim
  • Publication number: 20150097824
    Abstract: A semiconductor device includes a plurality of thin film transistors of a single channel formed on an insulating substrate, and a buffer circuit including an outputting stage; a first inputting stage; a second inputting stage; a seventh thin film transistor; and an eighth thin film transistor.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 9, 2015
    Inventor: Seiichiro Jinta
  • Publication number: 20150097823
    Abstract: A flat panel display includes a signal generator to generate data signals to respective data lines via an output terminal or to generate a control signal for controlling switches. The signal generator includes a first voltage supply unit to supply, to the output terminal, a voltage of a first voltage sources, a voltage stabilizing unit to raise or drop the voltage supplied to the output terminal, and a second voltage supply unit to supply, to the output terminal, a voltage from a second voltage source, after the voltage of the output terminal is raised or dropped.
    Type: Application
    Filed: September 29, 2014
    Publication date: April 9, 2015
    Inventor: Byeong-Doo KANG
  • Patent number: 9001097
    Abstract: Systems, methods, and devices for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve setting pixels of the electronic display to a first gray level and measuring a luminance difference between light and dark areas of a mura artifact on the electronic display. A value of an operating parameter of the electronic display may be adjusted while monitoring the luminance difference measurement. A value of the operating parameter that causes the luminance difference measurement to be within a specified range of acceptable luminance difference measurement values may be stored in the electronic display.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: April 7, 2015
    Assignee: Apple Inc.
    Inventors: Ahmad Al-Dahle, David A. Stronks, Hopil Bae
  • Patent number: 9001105
    Abstract: An organic light emitting display includes a display unit including pixels coupled to scan lines, first control lines, second control lines, and data lines, a control line driver configured to supply a first control signal and a second control signal to the pixels through the first control lines and the second control lines, a first power source driver for applying a first power to the pixels of the display unit, and a second power source driver for applying a second power to the pixels of the display unit. At least one of the first power or the second power is applied to the pixels of the display unit as voltage values having different levels during one frame. The first and second control signals and the first and second powers are concurrently provided to all of the pixels of the display unit.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: April 7, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Myeon Han, Baek-Woon Lee, Si-Duk Sung, In-Hwan Ji
  • Patent number: 9001104
    Abstract: A shift register circuit includes plural stages of shift registers. Each stage of shift register includes a pull-up circuit, a first driving circuit and a voltage-stabilizing circuit. The pull-up circuit is used for charging a first node. The first driving circuit is electrically connected with the first node. According to a voltage level of the first node, a corresponding control signal is outputted from an output terminal of the first driving circuit. The voltage-stabilizing circuit is electrically connected with the output terminal of the first driving circuit for stabilizing the control signal from the first driving circuit. Some circuits of some other shift registers are controlled according to the control signal.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: April 7, 2015
    Assignee: Au Optronics Corp.
    Inventors: Kuan-Yu Chen, Wei-Cheng Lin
  • Patent number: 8988404
    Abstract: A display device includes a display panel including data lines, a source driver positioned at one side of the display panel, and a timing controller which sequentially stores digital video data in a plurality of line memories, starts to generate an output data enable signal in conformity with a first writing start timing of a last line memory of the line memories, adjusts a pulse width of the output data enable signal of each horizontal pixel line based on a previously determined charge time graph, reads out the digital video data from the line memories in synchronization with rising edges of the output data enable signal, and generates a source output enable signal having the same pulse width each time each line memory finishes reading out the data.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: March 24, 2015
    Assignee: LG Display Co., Ltd.
    Inventors: Yonghwa Park, Daeseok Oh
  • Patent number: 8982114
    Abstract: A display device includes a first-stage output circuit adapted to perform output to a first-stage output signal line as an endmost output signal line out of a plurality of output signal lines disposed in parallel to each other, and the first-stage output circuit includes a start signal line to which a start signal for applying a conducting potential sequentially to the plurality of output signal lines is applied, a first clock signal line to which a first clock signal is applied, a second clock signal line to which a second clock signal is applied, a first transistor having a source to which the first-stage output signal line is connected, and a drain to which the first clock signal line is connected, and a second transistor having a gate to which the start signal line is connected.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: March 17, 2015
    Assignee: Japan Display Inc.
    Inventors: Hiroyuki Abe, Masahiro Maki, Takayuki Suzuki
  • Patent number: 8982112
    Abstract: Embodiments may be directed to a display panel includes a base substrate including a display region having a plurality of pixels and a non-display region adjacent to the display region, a connecting line in the non-display region and including at least a first input pad, a second input pad, and an output pad, and an insulating layer on the connecting line. The insulating layer includes at least one first contact hole exposing at least a portion of the first input pad, at least one second contact hole exposing at least a portion of the second input pad, and at least one third contact hole between the first contact hole and the second contact hole. A first contact electrode, a second contact electrode, and a dummy contact electrode are disposed at the first, second and third contact holes, respectively.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: March 17, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung Gyu Kim, Jae Mo Jung
  • Patent number: 8982115
    Abstract: A liquid crystal display device discharges residual charge within the liquid crystal display panel. The liquid crystal display device comprises pixels defined by gate lines and data lines intersecting with each other and switching elements for driving the plurality of pixels; a level shifter comprising a first transistor connected between a gate-on voltage terminal and an output terminal and a second transistor connected between a gate-off voltage terminal and the output terminal to selectively output either the gate-on voltage or gate-off voltage to the plurality of gate lines; and a discharge circuit forming a discharge path connecting the gate-off voltage terminal and the ground terminal. The second transistor is turned on during the power-on of the liquid crystal display panel to apply the gate-off voltage. The discharge circuit is turned on to discharge the residual charge of the liquid crystal display panel through the discharge path.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: March 17, 2015
    Assignee: LG Display Co., Ltd.
    Inventors: ChangYong Sung, SungJoon Moon, SeYeon Kim, SeongHun Choi
  • Publication number: 20150070345
    Abstract: An electronic apparatus system is provided. The electronic apparatus system includes a register, a display mode computation unit, a display device and a control circuit. The register stores image information having a data input refresh frequency. The display mode computation unit generates a display mode control signal by computation based on an image characteristic categorization of the image information. The display device includes a display panel having a plurality of pixel units. The control circuit controls a display mode and a drive mode of the display panel according to the display mode control signal to further adjust a display refresh frequency of the display panel.
    Type: Application
    Filed: November 18, 2014
    Publication date: March 12, 2015
    Inventor: Hung-Ta Liu
  • Patent number: 8976089
    Abstract: The display device including a pixel circuit has a first line, a transistor, a light emitting element, and a second line. The transistor is located between the second line and an electrode of the light emitting element. Either the first line or the second line is wired in a region that overlaps a light emitting region of the light emitting element in a lamination direction of layers. The second line intersects the first line outside of the light emitting region and overlaps a non-light emitting region of the light emitting element.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: March 10, 2015
    Assignee: Sony Corporation
    Inventors: Yukihito Iida, Akitsuna Takagi, Katsuhide Uchino
  • Patent number: 8976082
    Abstract: A synchronizing method and a system for marks on electronic maps and a recording medium using the same are provided. In the present synchronizing method, an input signal is received by a first electronic device, so as to draw a mark on the electronic map displayed thereon. The mark is then converted into positioning information of a plurality of positioning points on the electronic map and transmitted to a second electronic device via a wireless transmission network, wherein the positioning information is used for drawing the positioning points on the electronic map displayed on the second electronic device so as to reconstruct the mark. Accordingly, the mark on the electronic map of both communication ends can be synchronized.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: March 10, 2015
    Assignee: HTC Corporation
    Inventor: Yu-Cheng Lee
  • Publication number: 20150062112
    Abstract: To control the state of an input signal and output signal of a sequential circuit in order to prevent a malfunction of an electronic circuit. An electronic circuit includes a sequential circuit and a control circuit. A first signal, a second signal, and a third signal are input to the sequential circuit as a start signal, a clock signal, and a reset signal, respectively. The sequential circuit outputs, as an output signal, a fourth signal whose state is set in accordance with the state of the inputted first signal, second signal, and third signal. The control circuit controls the state of the third signal input to the sequential circuit.
    Type: Application
    Filed: October 23, 2014
    Publication date: March 5, 2015
    Inventors: Atsushi Umezaki, Hajime Kimura
  • Publication number: 20150062111
    Abstract: In one embodiment, the converter is configured to receive a first sync signal from a display driver and to convert the first sync signal into a second sync signal. The second sync signal is for controlling image sensing.
    Type: Application
    Filed: August 4, 2014
    Publication date: March 5, 2015
    Inventors: Jong-Ho ROH, Jae-Sop KONG
  • Publication number: 20150062110
    Abstract: The present invention relates to a source driver of a display apparatus, and relates to a source driver for display apparatus insensitive to power noise, which forcibly decides an internal operation state as normality in a specific period including a power noise generation period and operates insensitively to the power noise. Accordingly, the display apparatus can normally output an image voltage even though power noise occurs.
    Type: Application
    Filed: March 15, 2013
    Publication date: March 5, 2015
    Inventors: Kwang Il Oh, Yun Tack Han, Jung II Seo, Yong Ik Jung, Hyun Kyu Jeon
  • Patent number: 8970458
    Abstract: There is provided an organic light emitting display capable of minimizing noise. A method of driving the organic light emitting display includes setting pixels included in horizontal blocks into a non-emission state, the pixels charging voltages corresponding data signals, the pixels starting to emit light at different times in units of the horizontal blocks, and emitting light from the pixels according to the charging voltages.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: March 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Naoaki Komiya, Jang-Doo Lee
  • Patent number: 8970576
    Abstract: A novel driving method is provided in which source line inverting drive or dot inverting drive is performed for a case of driving a plurality of source lines by one D/A converter circuit in a source signal line driver circuit of an active matrix image display drive that corresponds to digital image signal input. In a first driving method of the present invention, two systems of grey-scale electric power supply lines are supplied to a source signal line driver circuit in order to obtain output having differing polarities from a D/A converter circuit, switches for connecting to the two systems of grey-scale electric power supply lines are prepared in each D/A converter circuit, the grey-scale electric power supply lines connected to each D/A converter circuit are switched in accordance with a control signal input to the switches, and source line inverting drive or dot inverting drive are performed.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: March 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Patent number: 8972811
    Abstract: A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: March 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Sik Kang, Jae-Goo Lee
  • Publication number: 20150054818
    Abstract: A method of driving a display panel is provided. The method includes displaying a first image on at least one odd-numbered horizontal line of the display panel along a first direction and a second direction during a first period of a frame period and displaying a second image on at least one even-numbered horizontal line of the display panel along the first direction and second direction during a second period of the frame period.
    Type: Application
    Filed: January 28, 2014
    Publication date: February 26, 2015
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Eui-Myeong Cho, Ki-Hyun Pyun, Eun-Kyung Kim, Hee-Jeong Seo, Jong-Young Yun
  • Patent number: 8963909
    Abstract: In a data driving method for driving a display panel, a data driving circuit, and a display apparatus, the data driving method includes receiving a digital driving voltage and an analog driving voltage. The analog driving voltage is switched, after the digital driving voltage is received and a specific driving time elapses. A digital data signal is converted to an analog data signal using the analog driving voltage. The analog data signal is output to a data line of the display panel.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: February 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Young-Hee Choi
  • Publication number: 20150042637
    Abstract: A source driver and an operation method thereof are provided. The operation method includes following steps. A data signal is provided to the source driver. The operating current of the source driver is reduced to an abnormal operating level in period from the source driver is reset to before a pixel data of the source driver is appeared in the data signal. The operation current of the source driver is restored to a normal operating level when the pixel data of the source driver is appeared in the data signal.
    Type: Application
    Filed: September 23, 2013
    Publication date: February 12, 2015
    Applicant: Novatek Microelectronics Corp.
    Inventors: Li-Tang Lin, Chia-Hung Lin, Pei-Ye Wang
  • Publication number: 20150042638
    Abstract: A stage circuit includes a first driver, a second driver, a first output unit, a second output unit and a controller. The first driver controls voltages of first and second nodes, according to a first power source, a third power source, a start signal or a carry signal of a previous stage input to a first input terminal, and a clock signal supplied to a second input terminal. The second driver controls voltages of third and fourth nodes, according to voltages of the first power source, the third power source, the first input terminal and the first and second nodes. The first output unit outputs a carry signal to a first output terminal, according to voltages of the first power source, the second input terminal and the third and fourth nodes. The second output unit outputs a scan signal to a second output terminal, according to voltages of the second power source, the second input terminal and the third and fourth nodes. The controller is electrically coupled to the first output terminal and the second driver.
    Type: Application
    Filed: August 11, 2014
    Publication date: February 12, 2015
    Inventors: Oh-Kyong Kwon, Yeong-Keun Kwon, Jong-Hee Kim, Ji-Sun Kim, Jae-Keun Lim, Chong-Chul Chai
  • Patent number: 8952995
    Abstract: It is an object to reduce power consumption of a display device which can perform multi-gray scale display and to suppress deterioration of an element included in the display device. The usage of a display device includes a first initialization period in which the gray scale level of an entire pixel portion is converted into a first gray scale level and a second initialization period in which the gray scale level of an entire pixel portion is converted into a second gray scale level. In the first initialization period, scanning of a plurality of signals and weighting of a holding period of each signal are performed. Therefore, the small number of scanning of signals can realize voltage application for an appropriate time with respect to each of a plurality of gray scale storage display elements included in the display device.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsushi Umezaki, Toshikazu Kondo
  • Publication number: 20150035815
    Abstract: In one or more example embodiments, a display controller includes a stable pixel writing period in one horizontal period in a display device, the stable pixel writing period being a period during which a voltage outputted from a gate driver is at a high level. The display controller also includes a first stable pixel writing period determination circuit which determines, by using a reference signal independent from the frame rate in the display device, the stable pixel writing period during which the voltage is at the high level. Thus, the display controller can be provided in which, regardless of whether and how the frame rate is changed, the stable pixel writing period can be of a target length.
    Type: Application
    Filed: October 20, 2014
    Publication date: February 5, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Toshihiro YANAGI, Takuji MIYAMOTO, Atsuhito MURAI
  • Publication number: 20150035819
    Abstract: A liquid crystal display includes a signal controller to generate a plurality of start pulse signals based on a plurality of eye blinking signals during a predetermined mode of operation. The start pulse signals are generated in a manner different from a vertical synchronization signal. The start signals may be generated to have an irregular spacing which corresponds to the blinking signals, which may be different from a constant spacing used during display of moving images. The predetermined mode may be a still image mode.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Inventors: Ah-Reum KIM, Ja Kyoung JIN, Joon-Chul GOH, Gi Geun KIM, Yun Ki BAEK
  • Patent number: 8947419
    Abstract: In one embodiment of the present application, a display controller is capable of changing a refresh rate, indicative of how often a screen displayed on a display device having a plurality of pixels is switched, between a low refresh rate of 40 Hz and a normal refresh rate of 60 Hz and generates (i) a dot clock (reference clock) serving as a timing signal indicative of a timing of operation in the display device, (ii) video data indicative of an image to be displayed on the screen, (iii) Hsync for defining a horizontal period of a display on the screen, and (vi) Vsync for defining a vertical period of the display on the screen, so as to supply the dot clock, the video data, Hsync, and Vsync to the display device, wherein the display controller includes a dot clock generation circuit for generating the reference clock whose frequency is constant without depending on a change of the refresh rate.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: February 3, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Yanagi, Takuji Miyamoto, Atsuhito Murai
  • Patent number: 8947440
    Abstract: A display device includes an image signal processing unit to output a high-speed image signal with the aid of an image interpolation unit outputting a low-speed image signal. The display device includes an image signal processing unit to receive a primitive image signal having a first frequency and to output a 4× image signal having a second frequency. The second frequency is four times the first frequency. The display device includes a display panel displaying an image corresponding to the 4× image signal. The primitive image signal includes an (n?1)-th frame (where n is a natural number) and an n-th frame. The image signal processing unit includes a first image interpolation unit and second image interpolation unit, which receive the (n?1)-th frame and the n-th frame and output a 2× image signal including at least one interpolated frame.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: February 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hee-Jin Choi, Sang-Soo Kim, Dong-Won Park, Po-Yun Park, Bong-Hyun You, Dong-Gyun Ra
  • Patent number: 8947415
    Abstract: A display system includes a plurality of light emitting units configured to float in a fluid medium such that each light emitting unit is movable, each light emitting unit including a light emitting element configured to selectively emit light, a communication element operable to receive instruction data to control operation of the light emitting element; and a power element configured to provide power to at least the light emitting element, and an image capture element configured to receive light emitted by at least one light emitting unit and to generate image data based on the light received and a controller configured to generate the instruction data based at least on a comparison of the image data to a desired image and transmit the instruction data to the communication element to control the light emitting element such that the display system provides the desired image.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: February 3, 2015
    Assignee: Green Display LLC
    Inventors: Craig P. Mowry, Jesper K. Thomsen