Computer Graphic Processing System Patents (Class 345/501)
  • Patent number: 11361400
    Abstract: A primitive that triggers performance of a graphics operation for the entirety of a tile is included in the sequence of primitives for a sequence of rendering tiles being provided to subsequent stages of the graphics processing pipeline for processing at least one tile in advance of the tile to which the primitive that is to trigger a graphics processing operation for the entirety of the tile relates. If, subsequent to the starting of the processing of the primitive that performs a processing operation for the entirety of the tile, it is determined that no other primitives will be processed for the tile, at least one of the subsequent processing stages of the graphics processing pipeline is caused to stop performing processing in respect of the primitive that performs a processing operation for the entirety of the tile.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: June 14, 2022
    Assignee: Arm Limited
    Inventors: Per Kristian Kjoll, Ole Magnus Ruud
  • Patent number: 11363326
    Abstract: In a digital contents receiver for receiving transmitted digital contents, the digital contents include at least component information indicating an element which constitutes a program of the contents. When the component information indicates that the received digital contents are a 3D component, it is determined whether a display part corresponds to display of the 3D component. If the display part corresponds to display of the 3D component, the received digital contents are displayed in 3D.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: June 14, 2022
    Assignee: Maxell, Ltd.
    Inventors: Sadao Tsuruga, Satoshi Otsuka
  • Patent number: 11355043
    Abstract: Embodiments relate to a display device including pixels arranged in rows and columns, where duty cycles of the pixels are dynamically programmed according to eye tracking information. For a display frame, the display device may determine a gaze region and a non-gaze region based on the eye tracking information. A control circuit of the display device controls a first subset of pixels in the gaze region to operate with a first duty cycle and controls a second subset of pixels in the non-gaze region to operate with a second duty cycle greater than the first duty cycle. The first subset of pixels emits light with greater brightness than the second subset of pixels.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: June 7, 2022
    Assignee: Facebook Technologies, LLC
    Inventors: Min Hyuk Choi, Wenhao Qiao, Donghee Nam, Wonjae Choi, Zhiming Zhuang
  • Patent number: 11354771
    Abstract: Methods, systems, and computer-readable storage media for providing a simulated graph processing accelerator representative of a hardware-based graph processing accelerator, the simulated graph processing accelerator including a controller component, a set of producer components, and a final merge component; triggering execution of the simulated graph processing accelerator as a simulation of processing of a graph for one or more of breadth-first search (BFS), single source shortest path (SSSP), weakly connected components (WCC), sparse matrix-vector multiplication (SpMV), and PageRank (PR), execution including: generating request streams from each producer component, merging request streams to provide a merged request stream, inputting the merged request stream to a memory simulator, and processing, by the memory simulator, the merged request stream to simulate handling of requests in memory.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: June 7, 2022
    Assignee: SAP SE
    Inventors: Jonas Dann, Daniel Ritter
  • Patent number: 11348514
    Abstract: A display apparatus including: image renderer including light-emitting diodes that are to be employed as sub-pixels of image renderer; liquid-crystal device including liquid-crystal structure and control circuit, wherein liquid-crystal structure is arranged in front of light-emitting diodes of image renderer, wherein liquid-crystal structure is to be electrically controlled, via control circuit, to shift light emanating from light-emitting diode to target positions on image plane according to shifting sequence in repeated manner; and processor(s) configured to render output sequence of output image frames via image renderer, wherein shift in light emanating from light-emitting diode to target positions causes resolution of output image frames to appear higher than display resolution of image renderer.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: May 31, 2022
    Assignee: Varjo Technologies Oy
    Inventors: Klaus Melakari, Oiva Arvo Oskari Sahlsten
  • Patent number: 11336878
    Abstract: An image projecting apparatus including an optical output unit for projecting and image, a camera, a plurality of sensors, and a processor is disclosed. The processor is configured to: identify, based on sensing data received through the plurality of sensors, a distance between each of the plurality of sensors and a projection surface, provide, based on a difference between the identified distances being greater than or equal to a pre-set threshold value, a user interface configured to guide a direction adjustment of the image projecting apparatus, and identify, based on a difference between the identified distances being less than the pre-set threshold value, a shape of a projected image by photographing, using the camera, an image projected to the projection surface, and control the optical output unit to project an image corrected based on the identified shape.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: May 17, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seungil Yoon, Joonhyun Yang, Eunseok Choi
  • Patent number: 11314674
    Abstract: DMA architectures capable of performing multi-level multi-striding and determining multiple memory addresses in parallel are described. In one aspect, a DMA system includes one or more hardware DMA threads. Each DMA thread includes a request generator configured to generate, during each parallel memory address computation cycle, m memory addresses for a multi-dimensional tensor in parallel and, for each memory address, a respective request for a memory system to perform a memory operation. The request generator includes m memory address units that each include a step tracker configured to generate, for each dimension of the tensor, a respective step index value for the dimension and, based on the respective step index value, a respective stride offset value for the dimension. Each memory address unit includes a memory address computation element configured to generate a memory address for a tensor element and transmit the request to perform the memory operation.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: April 26, 2022
    Assignee: Google LLC
    Inventors: Mark William Gottscho, Matthew William Ashcraft, Thomas Norrie, Oliver Edward Bowen
  • Patent number: 11315212
    Abstract: An image processing apparatus for executing partial processes on each of plural image-section data items, corresponding to plural image sections obtained by dividing an input image into partial regions, in each object of an object group in which plural objects for executing image processing is connected in a directed acyclic graph form, the image processing apparatus includes a processor configured to: assign dependency relationships to the partial processes between the objects; assign a priority to a partial process of an object arranged in a terminal stage of the object group; assign, as a priority of a partial process of an object arranged at a pre-stage side which has at least one partial process that is connected at a post-stage side and that has the dependency relationship assigned, a largest value of the priority; and execute a partial process having become executable according to the dependency relationship, according to the priority.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: April 26, 2022
    Assignees: FUJIFILM Business Innovation Corp., FUJIFILM CORPORATION
    Inventors: Takashi Nagao, Kazuyuki Itagaki
  • Patent number: 11315909
    Abstract: A display comprises a transparent polymer support, an array of light emitters embedded in the support, and a redistribution layer. Each light emitter comprises electrode contacts that are substantially coplanar with a back surface of the support and emits light through a front surface of the support opposite the back surface when provided with power through the electrode contacts. The redistribution layer comprises a dielectric layer that is disposed on and in contact with the support back surface and distribution contacts that extend through the dielectric layer. Each of the distribution contacts is electrically connected to an electrode contact and is at least partially exposed.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: April 26, 2022
    Assignee: X Display Company Technology Limited
    Inventors: Christopher Andrew Bower, Matthew Alexander Meitl, Glenn Arne Rinne, Justin Walker Brown, Ronald S. Cok
  • Patent number: 11308687
    Abstract: A device can receive an identification of an environmental model associated with a user navigating a website and receive an identification of an item model associated with an item requested by the user to be shown in connection with the environmental model on a client device. The environmental model could be a body model of the user or of another force like wind. The item model models how the item would move in connection with the environmental model. The device identifies movement associated with the environmental model and generates, based on the environmental model and the item model, frames each having respective data of the item as it would move on the environmental model according to the movement to yield movement key attributes. The device transmits the movement key attributes to the client device for rendering using a client device rendering engine.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 19, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Nancy Yi Liang, Matthew Keith Miller, Gabriel J. Zimmerman, Jennifer M. Lin
  • Patent number: 11307439
    Abstract: Display panel and display device are provided. The display panel includes a first substrate, a second substrate, and a plurality of pixel units. Each pixel unit includes a heating element, a reflective layer, a resonant cavity, and a phase-change material layer sequentially disposed on the first substrate, and a liquid crystal cell. The display panel also includes first signal lines extending along a row direction, second signal lines extending along the column direction, and a driving circuit in correspondence to each pixel unit. The driving circuit includes a first driving module and a second driving module that are connected to a same first signal line and a same second signal line. The first driving module drives the heating element to control the state of the phase-change material layer, and the second driving module controls the deflection of liquid crystal molecules in the liquid crystal cell.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: April 19, 2022
    Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Feng Lu, Qijun Yao, Yang Zeng
  • Patent number: 11308900
    Abstract: In a display apparatus, a liquid-crystal structure, arranged in front of an image renderer, is controlled to shift light of a given sub-pixel to target positions according to a shifting sequence in a repeated manner, while output image frames are displayed. To generate a given output image frame, a given target position to which the light is to be shifted is determined based on the shifting sequence. An input colour value of the given sub-pixel provided in a given input image frame is then adjusted to generate an output colour value of the given sub-pixel for the given output image frame, based on an output colour value of at least one other sub-pixel whose light overlaps with the given target position during display of a previous output image frame, and a retention coefficient between a colour of the at least one other sub-pixel and a colour of the given sub-pixel.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: April 19, 2022
    Assignee: Varjo Technologies Oy
    Inventors: Mikko Strandborg, Klaus Melakari, Ville Miettinen
  • Patent number: 11307410
    Abstract: A display apparatus including pose-tracking means; image renderer per eye; liquid-crystal device including liquid-crystal structure and control circuit; and processor. Processor is configured to: process pose-tracking data to determine user's head pose; detect if rate at which head pose is changing is below predefined threshold rate; if yes, switch on lock mode, select head pose for session of lock mode, and generate output image frames according to head pose during session; if no, generate output image frames according to corresponding head poses of user using pose-tracking data; and display output image frames, whilst shifting light emanating to from pixels of image renderer to multiple positions (P1-P9) in sequential and repeated manner, said shifting causes resolution of output image frames to appear higher than display resolution of image renderer.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: April 19, 2022
    Assignee: Varjo Technologies Oy
    Inventors: Mikko Strandborg, Ville Miettinen, Klaus Melakari
  • Patent number: 11303687
    Abstract: In a streaming application environment, input generated in a remote device may be synchronized with rendered content generated by a virtual streaming application in the streaming application environment in part by using frame refresh events passed between the remote device and the streaming application environment to enable the streaming application environment to effectively track a frame refresh rate of the remote device such that input events received from the remote device may be injected into the virtual streaming application at appropriate frame intervals.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: April 12, 2022
    Assignee: GOOGLE LLC
    Inventors: Chuo-Ling Chang, Ping-Hao Wu
  • Patent number: 11301952
    Abstract: Systems and methods for determining a foreground application and at least one background application from multiple graphics applications executing within an execution environment are disclosed. Pixel data rendered by the foreground application may be displayed in the execution environment while a rendering thread of the background application may be paused.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: April 12, 2022
    Assignee: Intel Corporation
    Inventors: Tao Zhao, John C. Weast, Brett P. Wang
  • Patent number: 11282785
    Abstract: A package includes a device die, and an encapsulating material encapsulating the device die therein. The encapsulating material has a top surface coplanar with a top surface of the device die. A coil extends from the top surface to a bottom surface of the encapsulating material, and the device die is in the region encircled by the coil. At least one dielectric layer is formed over the encapsulating material and the coil. A plurality of redistribution lines is in the at least one dielectric layer. The coil is electrically coupled to the device die through the plurality of redistribution lines.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: March 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chiang-Jui Chu, Chung-Shi Liu, Hao-Yi Tsai, Ming Hung Tseng, Hung-Yi Kuo
  • Patent number: 11272116
    Abstract: A photographing method of an electronic device is provided. The electronic device includes a display screen. In some embodiments, display screen displays an icon of a first application. In those embodiments, display screen displays a user interface of the first application in response to an operation on the icon, where the user interface includes a photographing button. The display screen also displays a photographing preview interface of a second application in response to an operation on the photographing button, where the second application is a camera application, and the photographing preview interface is used to display an image collected by the camera. When ambient light meets a photographing condition, the electronic device automatically photographs the image collected by the camera.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: March 8, 2022
    Assignee: HONOR DEVICE CO., LTD.
    Inventors: Xin Ding, Chen Dong, Hongwei Hu, Yongtao Jiang, Wenmei Gao
  • Patent number: 11262839
    Abstract: A method for updating information for a graphics pipeline including executing in the first frame period an application on a CPU to generate primitives of a scene for a first video frame. Gaze tracking information is received in a second frame period for an eye of a user. In the second frame period a landing point on an HMD display is predicted at the CPU based at least on the gaze tracking information. A late update of the predicted landing point to a buffer accessible by the GPU is performed in the second frame period. Shader operations are performed in the GPU in the second frame period to generate pixel data based on the primitives and based on the predicted landing point, wherein the pixel data is stored into a frame buffer. The pixel data is scanned out in the third frame period from the frame buffer to the HMD.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: March 1, 2022
    Assignee: Sony Interactive Entertainment Inc.
    Inventors: Andrew Young, Javier Fernandez Rico
  • Patent number: 11263725
    Abstract: An apparatus and method are described for a non-uniform rasterizer. For example, one embodiment of an apparatus comprises: a graphics processor to process graphics data and render images using the graphics data; and a non-uniform rasterizer within the graphics processor to determine different resolutions to be used for different regions of an image, the non-uniform rasterizer to receive a plurality of polygons to be rasterized and to responsively rasterize the polygons in accordance with the different resolutions.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: March 1, 2022
    Assignee: INTEL CORPORATION
    Inventors: Tomas G. Akenine-Moller, Robert M. Toth, Bjorn Johnsson, Jon N. Hasselgren
  • Patent number: 11244492
    Abstract: In one embodiment, a computing system may receive a number of texels organized into a texel array including a number of sub-arrays. The system may determine a number of texel subsets with the texels in each subset having a same position within their respective sub-arrays. The system may store the texel subsets into a number of buffer blocks, respectively, with each buffer block storing one texel subset. The system may retrieve a sampling texel array from the buffer blocks for parallelly determining pixel values of a number of sampling points. Each texel of the sampling texel array may be retrieved from a different buffer block.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: February 8, 2022
    Assignee: Facebook Technologies, LLC.
    Inventor: Larry Seiler
  • Patent number: 11245906
    Abstract: Video decoding innovations for multithreading implementations and graphics processor unit (“GPU”) implementations are described. For example, for multithreaded decoding, a decoder uses innovations in the areas of layered data structures, picture extent discovery, a picture command queue, and/or task scheduling for multithreading. Or, for a GPU implementation, a decoder uses innovations in the areas of inverse transforms, inverse quantization, fractional interpolation, intra prediction using waves, loop filtering using waves, memory usage and/or performance-adaptive loop filtering. Innovations are also described in the areas of error handling and recovery, determination of neighbor availability for operations such as context modeling and intra prediction, CABAC decoding, computation of collocated information for direct mode macroblocks in B slices, reduction of memory consumption, implementation of trick play modes, and picture dropping for quality adjustment.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: February 8, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Daniel Dinu, Juan Carlos Arevalo Baeza, Barry Friemel, William Chen
  • Patent number: 11244647
    Abstract: An image processing device includes a memory that stores a program and a processor that executes the program stored in the memory to perform a process. The process includes obtaining input image data that is generated by combining, in a horizontal direction, an effective display area of first image data and an effective display area obtained by expanding an effective display area of second image data in the vertical direction, the vertical size of the second image data being smaller than the vertical size of the first image data; and generating second output image data corresponding to the second image data by reducing the vertical size of second intermediate image data among first intermediate image data and the second intermediate image data, which are obtained by dividing the input image data in the horizontal direction, based on the vertical size of the effective display area of the second image data.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: February 8, 2022
    Assignee: SOCIONEXT INC.
    Inventors: Nobutaka Yamagishi, Manuel Haj-Saleh, Martin Maier
  • Patent number: 11243904
    Abstract: A method and apparatus for scheduling instructions of a shader program for a graphics processing unit (GPU) with a fixed number of registers. The method and apparatus include computing, via a processing unit (PU), a liveness-based register usage across all basic blocks in the shader program, computing, via the PU, the range of numbers of waves of a plurality of registers for the shader program, assessing the impact of available post-register allocation optimizations, computing, via the PU, the scoring data based on number of waves of the plurality of registers, and computing, via the PU, the number of waves for execution for the plurality of registers.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: February 8, 2022
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Robert A. Gottlieb, Christopher L. Reeve, Michael John Bedy
  • Patent number: 11231800
    Abstract: A touch substrate includes a base, a plurality of touch electrodes arranged in an array on the base, and a plurality of signal lines disposed on a side of the plurality of touch electrodes proximate to or away from the base. The plurality of signal lines include a plurality of touch lines and a plurality of dummy touch lines. At least one of the plurality of touch electrodes is coupled to at least one of the plurality of touch lines. The at least one touch line is configured to transmit touch signals. The at least one touch electrode is coupled to at least one of the plurality of dummy touch lines.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: January 25, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinguo Wu, Fengguo Wang, Zhixuan Guo, Hong Liu, Bo Ma, Yu Feng, Shicheng Song
  • Patent number: 11222395
    Abstract: Techniques that facilitate matrix factorization associated with graphics processing units are provided. In one example, a computer-implemented method is provided. The computer-implemented method can comprise loading, by a graphics processing unit operatively coupled to a processor, item features from a data matrix into a shared memory. The data matrix can be a matrix based on one or more user features and item features. The computer-implemented method can further comprise tiling and aggregating, by the graphics processing unit, outer products of the data matrix tiles to generate an aggregate value and approximating, by the graphics processing unit, an update to a user feature of the data matrix based on the aggregate value and the loaded item features.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: January 11, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shiyu Chang, Liana L. Fong, Wei Tan
  • Patent number: 11222392
    Abstract: An apparatus to facilitate compute optimization is disclosed. The apparatus includes a memory device including a first integrated circuit (IC) including a plurality of memory channels and a second IC including a plurality of processing units, each coupled to a memory channel in the plurality of memory channels.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: January 11, 2022
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Narayan Srinivasa, Feng Chen, Joydeep Ray, Ben J. Ashbaugh, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajkishore Barik, Sara S. Baghsorkhi, Justin E. Gottschlich, Altug Koker, Nadathur Rajagopalan Satish, Farshad Akhbari, Dukhwan Kim, Wenyin Fu, Travis T. Schluessler, Josh B. Mastronarde, Linda L. Hurd, John H. Feit, Jeffery S. Boles, Adam T. Lake, Karthik Vaidyanathan, Devan Burke, Subramaniam Maiyuran, Abhishek R. Appu
  • Patent number: 11217005
    Abstract: Embodiments are disclosed for efficiently rendering vector graphics in a single rendering pass on tile-based GPUs. In particular, in one or more embodiments, the disclosed systems and methods comprise receiving at least one segment of a vector-based object to be rendered, generating, by a central processing unit (CPU) of a computing device, a representation of the at least one segment, the representation including a plurality of primitives, including a plurality of coverage primitives and a plurality of color primitives, generating, by a graphics processing unit (GPU) of the computing device, a plurality of fragments based at least on the representation of the at least one segment, and rendering, by the GPU of the computing device, the plurality of fragments in a single pass using a rendering state machine.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: January 4, 2022
    Assignee: Adobe Inc.
    Inventors: Harish Kumar, Himanshu Aggarwal, Akshit Verma
  • Patent number: 11218421
    Abstract: Methods and systems for migrating resources of a virtual private cloud across public cloud environments are described. The method performed by server system includes discovering a plurality of resources associated with a source cloud via an application programming interface (API) of the source cloud and generating resource models associated with the plurality of resources based, at least in part, on the discovered resources of the source cloud. The resource models include information of the plurality of resources and relationships between the plurality of resources. The method includes storing the resource models associated with the source cloud in a database and migrating the plurality of resources of the source cloud to a different region of the source cloud or a target cloud based, at least in part, on the resource models associated with the plurality of resources.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: January 4, 2022
    Assignee: Wanclouds Inc.
    Inventors: Faiz M. Khan, Maimoona Iqbal, Danyal Khan
  • Patent number: 11210759
    Abstract: Methods, systems, and computer-readable media for placement optimization for virtualized graphics processing are disclosed. A provider network comprises a plurality of instance locations for physical compute instances and a plurality of graphics processing unit (GPU) locations for physical GPUs. A GPU location for a physical GPU or an instance location for a physical compute instance is selected in the provider network. The GPU location or instance location is selected based at least in part on one or more placement criteria. A virtual compute instance with attached virtual GPU is provisioned. The virtual compute instance is implemented using the physical compute instance in the instance location, and the virtual GPU is implemented using the physical GPU in the GPU location. The physical GPU is accessible to the physical compute instance over a network. An application is executed using the virtual GPU on the virtual compute instance.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: December 28, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Nicholas Patrick Wilt, Ashutosh Tambe
  • Patent number: 11200866
    Abstract: In some aspects, the present disclosure provides a method for generating a frame. The method includes receiving a first fence indicating that a first frame stored in a display processor unit (DPU) buffer has been consumed by a hardware component. The method also includes in response to receiving the first fence, fetching a plurality of layers from an application buffer, the plurality of layers corresponding to a second frame. The method also includes determining to use both a DPU and a graphics processing unit (GPU) to process the plurality of layers for composition of the second frame. The method also includes fetching the first fence from the DPU buffer and generating a second fence.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: December 14, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Dileep Marchya, Sudeep Ravi Kottilingal, Srinivas Pullakavi, Dhaval Kanubhai Patel, Prashant Nukala, Nagamalleswararao Ganji, Mohammed Naseer Ahmed, Mahesh Aia, Kalyan Thota, Sushil Chauhan
  • Patent number: 11192034
    Abstract: Systems and methods for determining how much of a created character in a gaming platform is inherited from other characters are disclosed.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: December 7, 2021
    Assignee: Mythical, Inc.
    Inventors: Rudy Koch, Jamie Jackson
  • Patent number: 11194526
    Abstract: A multifunction peripheral includes a printer and a panel. The printer may perform a print process based on a print job and a process of printing an eco-report. The panel may simultaneously display a print instruction screen and a notification screen. The panel may instruct the print process based on a print job when the two screens are simultaneously displayed.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: December 7, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventor: Naoto Akimoto
  • Patent number: 11195053
    Abstract: A computer architecture for artificial image generation is disclosed. According to some aspects, a computing machine receives a voxel model of a target object. The target object is to be recognized using an image recognizer. The computing machine generates, based on the voxel model, a set of TSB (target shadow background-mask) images of the target object. The computing machine receives, at an auto-encoder, a set of real images of the target object. The computing machine generates, using an auto-encoder and based on the set of real images, one or more artificial images of the target object based on the set of TSB images. The computing machine provides, as output, the generated one or more artificial images of the target object.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: December 7, 2021
    Assignee: Raytheon Company
    Inventors: Peter Kim, Ryan Quiller, Jason R. Chaves, Mark S. Berlin, Michael J. Sand
  • Patent number: 11182874
    Abstract: Provided is a signal processing device including a determination unit that determines a state of software associated with image processing on an input image signal indicating an image captured by a medical apparatus, and an output control unit that has a first processed image signal that is the input image signal on which image processing has been performed by the software selectively outputted, on the basis of a result of determination of the state of the software.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: November 23, 2021
    Assignee: SONY CORPORATION
    Inventor: Tsuneo Hayashi
  • Patent number: 11182311
    Abstract: According to one embodiment, a virtualization support device includes: a first processor controlling an operation of accelerators; a memory holding first information regarding a first application executed by a second processor, second information regarding a second application executed by the second processor, one or more first requests from the first application, and one or more second requests from the second application; and a management unit coupled to the first processor and the memory. The first processor performs arbitration of an order in which the accelerators execute the first and second requests, controls setting of the management unit by using the one of first and second information based on the arbitration, and causes the accelerators to execute one of the first and second requests based on the arbitration.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: November 23, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation :
    Inventors: Akira Takeda, Takeshi Kodaka, Yutaka Yamada
  • Patent number: 11176682
    Abstract: In various examples, optical flow estimate (OFE) quality is improved when employing a hint-based algorithm in multi-level hierarchical motion estimation by using different scan orders at different resolution levels. A scan of an image performed with a scan order may initially leverage OFEs from a previous scan of the image, where the previous scan was performed using a different scan order. The OFEs leveraged from the previous scan are more likely to be of high accuracy until sufficient spatial hints are available to the hint-based algorithm for the scan to reduce the impact of potentially lower quality OFEs resulting from the different scan order of the previous scan.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: November 16, 2021
    Assignee: NVIDIA Corporation
    Inventors: Dong Zhang, Jianjun Chen, Manindra Parhy
  • Patent number: 11172028
    Abstract: A method and a server device for providing an IoT platform service are provided. According to at least one aspect of the present disclosure, a method of providing an IoT platform service, which is performed by an IoT platform server apparatus, generates a shadow device corresponding to an IoT device, manages state information of the IoT device through the corresponding shadow device, and registers and administers a specification (i.e., a device descriptor) regarding common features of a plurality of devices.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: November 9, 2021
    Assignee: SK TELECOM CO., LTD.
    Inventor: Karam Ko
  • Patent number: 11170678
    Abstract: A display apparatus including gaze-tracking means, image renderers, liquid-crystal devices including liquid-crystal structure and control circuit, to shift light emanating from given pixel of image renderer to multiple positions, given pixel including colour component; and processor configured to: process gaze-tracking data to determine gaze direction of user's eye; determine gaze point; display first output image frame; detect if magnitude of difference between first output value and initial second output value of colour component of given pixel in first and second output image frames exceeds first threshold difference; when detected that magnitude of difference exceeds first threshold difference, update initial second output value to sum of first output value and product of distance factor and difference between initial second output and first output values; and display second output image frame.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: November 9, 2021
    Assignee: Varjo Technologies Oy
    Inventors: Mikko Strandborg, Ville Miettinen
  • Patent number: 11164342
    Abstract: Methods and devices for generating hardware compatible compressed textures may include accessing, at runtime of an application program, graphics hardware incompatible compressed textures in a format incompatible with a graphics processing unit (GPU). The methods and devices may include converting the graphics hardware incompatible compressed textures directly into hardware compatible compressed textures usable by the GPU using a trained machine learning model.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: November 2, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Martin Jon Irwin Fuller, Daniel Gilbert Kennett
  • Patent number: 11164231
    Abstract: A product image depicting a customizable product with one or more annotations is displayed. Each annotation of the one or more annotations identifies an attribute group location upon the customizable product that represents an attribute group comprising one or more attributes of the customizable product that may be customized. A selection of a particular attribute group location of the attribute group location identified by the one or more annotations is received. The particular attribute group location represents a particular attribute group. In response to receiving the selection, information relating to one or more attributes included in the particular attribute group is displayed. An attribute selection shape comprising a plurality of regions, each of which represent an attribute of the particular attribute group may be displayed.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: November 2, 2021
    Assignee: ZAZZLE INC.
    Inventors: Jeffrey J. Beaver, Siddharth Ananthakrishnan
  • Patent number: 11151685
    Abstract: Tiling engines and methods for use in a graphics processing system for hierarchically tiling a plurality of primitives.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: October 19, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Robert Brigg, Lorenzo Belli
  • Patent number: 11151683
    Abstract: Embodiments described herein are generally directed to conservative rasterization pipeline configurations that allow EarlyZ to be enabled for conservative rasterization.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: October 19, 2021
    Assignee: Intel Corporation
    Inventors: Abhishek Venkatesh, Selvakumar Panneer
  • Patent number: 11145105
    Abstract: Embodiments are generally directed to multi-tile graphics processor rendering. An embodiment of an apparatus includes a memory for storage of data; and one or more processors including a graphics processing unit (GPU) to process data, wherein the GPU includes a plurality of GPU tiles, wherein, upon geometric data being assigned to each of a plurality of screen tiles, the apparatus is to transfer the geometric data to the plurality of GPU tiles.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: October 12, 2021
    Assignee: INTEL CORPORATION
    Inventors: Prasoonkumar Surti, Arthur Hunter, Jr., Kamal Sinha, Scott Janus, Brent Insko, Vasanth Ranganathan, Lakshminarayanan Striramassarma
  • Patent number: 11132302
    Abstract: An electronic device may comprise: a first memory for storing first data at a designated rate; a first processor connected to the first memory and configured to divide the first data into multiple second data, each having a size smaller than the size of the first data; a second memory for storing at least some of the multiple second data at a rate faster than the designated rate; a second processor connected to the second memory and configured to process the at least some of the multiple second data; and a DMA control module, connected to the second processor, for transmitting/receiving data between the first memory and the second memory, wherein the DMA control module is configured to: at least on the basis of a processing command for the multiple second data which is transmitted from the first processor to the second processor, receive, from the first memory, the at least some of the multiple small-sized second data divided from the first data; transmit the at least some of the multiple second data to the s
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: September 28, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Rakie Kim, Min-Wook Ahn, Kyung-Mok Kum, Keon-Cheol Shin
  • Patent number: 11130674
    Abstract: An integrated package method for MEMS element and ASIC chip includes forming a re-layout layer on a front surface of an ASIC wafer; coating an organic compound layer on the re-layout layer and applying a lithography process to the organic compound layer to from a microcavity array; aligning and bonding an electrode connection pad layer on a front surface of an MEMS element with the microcavity array to form a closed cavity structure; thinning and exposing a silicon substrate on a back surface of the MEMS element to a desired thickness; applying the lithographic process on the MEMS element to expose the electrode connection pad layer and an electrical contact area of the re-layout layer; and manufacturing a metal connection member connected to the electrode connection pad layer and the electrical contact area. An integrated package structure for MEMS element and ASIC chip is also provided.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: September 28, 2021
    Assignees: J-METRICS TECHNOLOGY CO., LTD., PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Sheng-Lin Ma, Dan Gong, Yi-Hsiang Chiu
  • Patent number: 11127106
    Abstract: Methods and apparatus relating to techniques for runtime flip stability characterization are described. In an embodiment, logic circuitry determines the amount of work to be performed by a processor to render a pattern during each of a plurality of Vertical blank (Vblank) intervals. Memory stores information corresponding to a workload to be executed by the processor during each of the plurality of Vblank intervals. An operating frequency of the processor may then be modified based at least in part on analysis of the stored information to indicate which of the plurality of Vblank intervals would provide an improved stability for rendering the pattern. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: September 21, 2021
    Assignee: INTEL CORPORATION
    Inventors: Murali Ramadoss, Ankur Shah, Marc Beuchat
  • Patent number: 11119924
    Abstract: In order to allow efficient data communication, an interface device that includes N ports, comprises: a cache memory that is shared by the N ports and includes a plurality of cache tags each of which is allocated to one of the N ports; and N cache determination units corresponding to the N ports. Each of the N cache determination units comprises: a determiner configured to determine, based on all of the values of the plurality of cache tags, whether a cache miss has occurred in the cache memory, and an update unit configured to update, when the determiner determines that a cache miss has occurred, cache tag values allocated to a self-port.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: September 14, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Tadayuki Ito
  • Patent number: 11100698
    Abstract: Systems, apparatuses, and methods for performing real-time video rendering with performance guaranteed power management are disclosed. A system includes at least a software driver, a power management unit, and a plurality of processing elements for performing rendering tasks. The system receives inputs which correspond to rendering tasks which need to be performed. The software driver monitors the inputs that are received and the number of rendering tasks to which they correspond. The software driver also monitors the amount of time remaining until the next video synchronization signal. The software driver determines which performance setting will minimize power consumption while still allowing enough time to finish the rendering tasks for the current frame before the next video synchronization signal. Then, the software driver causes the power management unit to provide this performance setting to the plurality of processing elements as they perform the rendering tasks for the current frame.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: August 24, 2021
    Assignee: ATI Technologies ULC
    Inventors: Benjamin Koon Pan Chan, William Lloyd Atkinson, Clarence Ip, Tung Chuen Kwong
  • Patent number: 11076932
    Abstract: Systems and methods for wireless sensing include a wireless senor which includes a physiological sensor and an identification sensor. The physiological sensor obtains physiological data from a patient and the identification sensor detects a unique characteristic of the patient as identification data. The identification data is used to produce a unique identifier which is transmitted wirelessly from the wireless sensor along with the physiological data to associate the transmitted physiological data to the patient.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: August 3, 2021
    Assignee: General Electric Company
    Inventors: Magnus Kall, Tuomas Laine, Mika Tapaninaho, Sakari Lamminmaki
  • Patent number: 11074042
    Abstract: An apparatus for managing input/output (I/O) data may include a streaming I/O controller to receive data from a load/store domain component and output the data as first streaming data of a first data type comprising a first data movement type and first data format type. The apparatus may also include at least one accelerator coupled to the streaming I/O controller to receive the first streaming data, transform the first streaming data to second streaming data having a second data type different than the first data type, and output the second streaming data. In addition, the apparatus may include a streaming interconnect to conduct the second data to a peer device configured to receive data of the second data type.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: July 27, 2021
    Assignee: Intel Corporation
    Inventors: John Howard, Steven B. McGowan, Krzysztof Perycz