Abstract: The codec processor includes an SRAM that holds a reference image read from an image storage, and a motion search unit that performs motion search on the basis of a reference image held in the SRAM to generate a prediction block for a target block in an input image. The SRAM holds a reference image having a horizontally equivalent number of pixels to a horizontal number of pixels of the input image and a number of pixels vertically larger than or equal to a vertical motion search range.

Abstract: A method for providing information representing physical features of a portion of a three-dimensional surface, the information including data files at different resolution levels. The data files are stored in a hierarchical file system. A hash value is computed from a file designator of a data file and is assigned to the data file. The data file is stored according to the assigned hash value in the file system. A request hash value is received from the external device, and a data file that has an assigned value corresponding to the request hash value is provided to the external device. A method for receiving such information is also provided, in which information including an information designator is requested. A request hash value is computed from the information designator and transmitted to the server. A data file that includes the requested information is received from the remote server.

Abstract: A method and device for calibrating a DC offset and an I-Q imbalance component of an RF transceiver, the method including inputting a test signal into a transmitter, and converting the test signal into an analogue test signal; converting the analogue test signal using a transmitting mixer; sub-sampling a signal output from the transmitting mixer; and computing a DC offset calibrating constant number and an I-Q imbalance calibrating constant number from a sub-sampled signal.

Abstract: There is an image data processing circuit including a memory storing input image data, the input image data being limited to a specific number of colors or to a specific image range, and a correction processing part replacing, when a predetermined tone change is present between a pixel in image data previous by one frame whose data is stored by the memory and a pixel in image data in a current frame whose data is input, a relevant pixel in the current frame with a color of a specific tone. The memory is built in an integrated circuit included in the correction processing part.

Abstract: Aspects include a pixel source that produces data for a rendered surface divided into regions. A mapping identifies memory segments storing pixel data for each region of the surface. The mapping can identify memory segments storing pixel data from a prior rendered surface, for regions that were unchanged during rendering the rendering. Such changed/unchanged status is tracked on a region by region basis. A counter can be maintained for each memory segments to track how many surfaces use pixel data stored therein. A pool of free memory segments can be maintained. Reading a surface, such as to display a rendered surface by a display controller, includes identifying and reading the mapping to identify each memory segment storing pixel data for regions of the surface, reading such, and updating the counters for the memory segments that were read.

Abstract: An audiovisual signal is converted from a native format to a digital, packetized interchange format and transported between a capture node and a display node through a switch. The display node converts the audiovisual signal from the interchange format to a displayable format and causes display of the audiovisual signal. The use of a switch for video routing and distribution allows one-to-one, one-to-many, many-to-one, and many-to-many distribution. The use of a device-independent interchange format allows concurrent distribution of multiple heterogeneous audiovisual signals.

Abstract: A method of operating a display system may include receiving an indication signal indicating a data update, receiving data, and updating a whole frame on the display with an image corresponding to the data based on the indication signal corresponding to a whole frame or updating a partial frame on the display with an image corresponding to the data based on the indication signal corresponding to a partial frame.

Abstract: The present invention is a circuit arrangement for a wireless cellular network. The circuit arrangement includes a determiner configured to determine a priority value of each packet of a plurality of packets based on at least a position of a video frame in a group of pictures and a type of the video frame, the video frame or a part thereof being contained in the packet, wherein the type of video frame comprises I frame data or P frame data; and wherein the determiner is further configured to set the priority value of a packet including I frame data lower than the priority value of at least one other packet including P frame data; and a controller configured to control scheduling of the packet based on the determined priority value for a communication device in a wireless cellular network. A method of determining a priority of packet scheduling is also disclosed.

Abstract: The display apparatus includes: a display; a decoder which decodes an image in unit of a MCU; a scaler which scales the decoded image; a memory which stores the scaled image; and a controller which controls the display to display the scaled image, sets an RAU structure of the image, and further stores in the memory image information corresponding to the RAU structure. Thus, even if a decoded and scaled image is zoomed in, the quality of the zoomed image may be maintained at a high level.

Abstract: System and method enabling multiple users to simultaneously share a client computing device are disclosed. Method includes retrieving a plurality of I/O device groups, wherein a first I/O device group in the plurality of I/O device groups is associated with a first group of input or output (IO) devices locally connected to a client computing device, and wherein a second I/O device group in the plurality of I/O device groups is associated with a second group of I/O devices locally connected to the client computing device. Method includes launching first and second instances of an application. Method includes associating the first instance of the application with the first I/O device group on the client computing device. Method includes associating the second instance of the application associated with the second I/O device group on the client computing device.

Abstract: A driving device includes a memory configured to store an initial setting value to drive a display, a power source controller configured to output a pulse width modulation (PWM) signal controlling power applied to the display, and a switching unit configured to connect an input and output port to the memory when writing data to a memory and configured to connect the power source controller to the input and output port when driving the display.

Abstract: A driving circuit for a display device, for reducing power consumption of a data driver, and a method of driving the driving circuit are disclosed. The driving circuit includes a data driver for maintaining buffers of the data driver in an on state every preset specific frame period and maintaining the buffers in an off state every remaining period except for specific frame periods in a refresh mode for processing image data of one image for the specific frame periods only.

Abstract: A control apparatus includes: an operation reception unit receiving a reference setting operation, and a position designation operation after the reference setting operation, that are input by a user touching an input unit provided on a display surface of a display unit; a reference position setting unit setting a reference position at a position shifted toward a periphery of the input unit from the position of the reference setting operation on the input unit; and a display control unit setting, depending on the reference position and the position of the position designation operation, a display position of a pointer for selecting a position on the display unit.

Abstract: Methods are provided for monitoring and adjusting performance of a mobile computing device having a windowing system. The windowing system is advantageously employed for both purposes. It generates performance data related to an application executed by a processor of the device and provides the performance data to a DFVS module of the device, which in turn determines the operating point of the device based on that data. As a consequence, the DFVS refrains from scaling-down the operating frequency of the processor in certain cases wherein idleness of the processor might provoke such a scale-down by a DVFS module that was informed only of application-agnostic performance data. The avoidance of inappropriate scale-downs may, for instance, improve the perceived smoothness of a progression of images presented on a display unit of the device.

Abstract: One embodiment of the present invention sets forth a method for generating work to be processed by a graphics pipeline residing within a graphics processor. The method includes the steps of receiving an indication that a first graphics workload is to be submitted to a command queue associated with the graphics processor, allocating a first portion of shader accessible memory for one or more units of state information that are necessary for processing the first graphics workload, populating the first portion of shader accessible memory with the one or more units of state information, and transmitting to the command queue of the graphics processor the one or more units of state information stored within the first portion of shader accessible memory, wherein the first graphics workload is processed within the graphics pipeline based on the one or more units of state information.

Abstract: This disclosure presents techniques and structures for preemption at arbitrary control points in graphics processing. A method of graphics processing may comprise executing commands in a command buffer, the commands operating on data in a read-modify-write memory resource, double buffering the data in the read-modify-write memory resource, such that a first buffer stores original data of the read-modify-write memory resource and a second buffer stores any modified data produced by executing the commands in the command buffer, receiving a request to preempt execution of the commands in the command buffer before completing all commands in the command buffer, and restarting execution of the commands at the start of the command buffer using the original data in the first buffer.

Abstract: An AV device is provided that can automatically perform OSD display setting of other AV devices at a time based on local ODS display setting even when a plurality of AV devices are connected. The AV device (depicted as TV 1) includes a connection means (depicted as an HDMI connector 21 and an HDMI connector 22) for making connection with external AV devices 3 and 4 capable of performing OSD display, an OSD processing portion 23 for performing OSD display on a display 17, and a system controller 20 for controlling the entire system. The OSD processing portion 23 generates ODS display setting data 23a from the display setting such as a character color and size in OSD display received from a user using a TV remote controller 2 or the like and stores it. The system controller 20 transmits the OSD display setting data 23a for the TV 1 stored here to the external AV devices 3 and 4 via the HDMI connectors 21 and 22.

Abstract: Systems, apparatus, methods and computer program products are described below for rendering a graphical user interface by selectively compositing display contents. In general for each of one or more content producers, where each content producer is associated with content storage containing display content, display content for output is identified depending on the content consumer to which the graphical user interface is being rendered.

Abstract: A location system and method receives a location to be displayed on a diagrammatic map, determines the relative position of the location to nearby map features on the diagrammatic map and using that relative position, displays the location on the diagrammatic map.

Abstract: An information processing device controls, in response to an object moving instruction, a transmitting unit so that pointer position information indicating a post-movement position of a pointer and object position information indicating a post-movement position of an object are transmitted to a display device, and then, after the pointer position information and the object position information have been transmitted, image data representing an image generated by a generating unit is transmitted to the display device.

Abstract: In one embodiment, a method displays images from a remote desktop of a desktop GUI on a client device. The method receives a plurality of image blocks for a frame update of an image of the desktop GUI being displayed on the client device. The remote desktop is being run on a host. The client device determines that one or more missing image blocks have not been received for the frame update and determines if the frame update should be performed without the one or more missing image blocks. If the frame update of the desktop GUI should be performed without the one or more missing image blocks, the client device performs the frame update of the desktop GUI using the plurality of image blocks without using the one or more missing image blocks.

Abstract: Provided is a digital-to-analog converter configured to mitigate data dependent jitter of switch driver signals. The digital-to-analog converter is configured to produce data patterns of “0001000”. The digital-to-analog converter includes a digital portion that includes a digital data input component, an analog portion, and a conversion component. The conversion component includes a decoder configured to split a first data stream comprising a set of digital data into a first data sub-stream and a second data sub-stream, and a second data stream comprising another set of digital data into a third data sub-stream and a fourth data sub-stream. The conversion component also includes a first pair of drivers, a second pair of drivers, a third pair of drivers, and a fourth pair of drivers, wherein respective drivers of the first, second, third, and fourth pairs of drivers are configured to output respective data patterns comprising at least three consecutive identical bits.

Abstract: A technique for enabling scenario files and image files for supply to a scenario generating device to be created easily is provided. The scenario creating device creates a scenario file supplied to a scenario reproducing device capable of reproducing only image files of a predetermined format. The scenario creating device comprises: an input section including a pointing device; a display section; and a scenario creating section for creating the scenario file. The scenario creating section provides a display of an execution icon on the display screen for causing the scenario creating section to execute a process. When a file icon for a source file of a predetermined format including pagewise scenario information and image information is dragged and dropped on the execution icon by means of operation of the pointing device, a scenario file is created on the basis of the scenario information, and an image file of the predetermined format is generated on the basis of the image information.

Abstract: A hybrid display frame buffer for a display subsystem. An embodiment of an apparatus a first logic to split a video image into a first data portion and a second data portion; a display frame buffer including a first memory component having a first type of memory and a second memory component having a second type of memory, the first logic to write the first data portion to the first memory component and the second data portion to the second memory component; and a second logic to read the first data portion from the first memory component and the second data component from the second memory component, and to combine the first data portion and the second data portion to generate a combined video image.

Abstract: A display device includes a first storage unit that stores first adjusted values; a second storage unit that stores second adjusted values; and a control unit that determines, while power of the display device is on, whether or not a predetermined specific condition has been set, where if the specific condition has been set, the control unit executes a process of writing the first adjusted values stored in the first storage unit to the second storage unit according to the specific condition so as to switch the adjusted values pertaining to individual units of the display device to the first adjusted values.

Abstract: An improved approach for a remote graphics rendering system that can utilize both server-side processing and client-side processing for the same display frame. Some techniques for optimizing a set of graphics command data to be sent from the server to the client include: eliminating some or all data, that is not needed by a client GPU to render one or more images, from the set of graphics command data to be transmitted to the client; applying precision changes to the set of graphics command data to be transmitted to the client; and performing one or more data type compression algorithms on the set of graphics command data.

Abstract: A method for processing image data is described. The method includes the steps: (a) fully writing image data into first buffer area; (b) vertically reading the image data in first buffer area and horizontally writing image data into second buffer area; (c) while completely reading a first portion of first buffer area, allocating the complete read first portion of first buffer area to second buffer area to be served as a writing section; (d) vertically reading the image data in a second portion of first buffer area and writing the image data into second buffer area; and (e) vertically reading the image data of second buffer area and horizontally writing the image data into first buffer area, and after completely reading a portion of second buffer area, allocating the read portion of second buffer area to first buffer area.

Abstract: A SIMD parallel processor is described comprising an array comprising processing elements, associated data storage components and access means configured to enable access to at least one of the data storage components associated with at least one of the processing elements; a control processor; memory control means configured to enable addressing of at least one of the access means for the control processor; and connecting means configured to connect the memory control means to the access means.

Abstract: In general, aspects of this disclosure describe a compiler for allocation of physical registers for storing constituent scalar values of a non-scalar value. In some example, the compiler, executing on a processor, may receive an instruction for operation on a non-scalar value. The compiler may divide the instruction into a plurality of instructions for operation on constituent scalar values of the non-scalar value. The compiler may allocate a plurality of physical registers to store the constituent scalar values.

Abstract: The fragment processing pipeline 10 of a graphics processing core 2 has an associated occlusion query cache 19 that is used to maintain a set of local occlusion counters 21. The occlusion query cache 19 is maintained in a local memory 3 of the graphics processing system and can communicate via an interconnect 7 with a set of master occlusion counters 22 in a main memory 5 for the graphics processing system. When an occlusion query starts, a corresponding occlusion counter 22 is initialised in the main memory 5. A corresponding local occlusion counter 21 is also provided in the occlusion query cache 19 in the local memory 3 of the graphics processor, and is used to count the results of the occlusion query. The local occlusion counter value is written back to the occlusion counter 22 for the query in the main memory 5 at the appropriate time for further processing.

Abstract: An apparatus generally having a plurality of memories and a first circuit is disclosed. The memories may be configured to store a plurality of first data points. The first data points generally form a two-dimensional block. The first data points may be arranged among the memories such that a load cycle from the memories accesses a rectangular region of the two-dimensional block. The load cycle generally comprises a plurality of read cycles, a different one of the read cycles corresponding to each one of the memories. The first circuit may be configured to (i) receive the first data points as read from the memories and (ii) generate a plurality of second data points by a video codec transformation of the first data points between a spatial domain and a frequency domain.

Abstract: A method for measuring shapes in thick multi-planar reformatted (MPR) digital images, including identifying a shape in a digital MPR image, scan-converting points corresponding to the identified shape on a starting plane of an MPR slab in an image volume from which the MPR was obtained to generate a plurality of starting points for the identified shape, calculating an end point in the MPR slab corresponding to each starting point, propagating a ray from each starting point to each corresponding end point, accumulating samples along each ray, and computing a desired measurement value from the accumulated samples after reaching the end point for all rays.

Abstract: Provided are a mapping method and a video system for mapping pixel data included in the same pixel group to the same bank of a memory, A method for mapping the position of pixel data of a picture to an address of a memory comprises a pixel group dividing operation and an address mapping operation. The pixel group dividing operation divides the pixels of the picture into at least one pixel group. The address mapping operation maps pixel data of pixels included in the same pixel group to the same bank of the memory.

Abstract: A system and method may be provided to access images through a camera service, where the images are generated by a non-sensor image source, such as a composition manager. The system may include the camera service and the non-sensor image source. The non-sensor image source may generate a processed image from a source other than a sensor. The camera service may provide the processed image generated by the non-sensor image source to an image consuming application.

Abstract: Parallel graphics-processing methods and mobile computing apparatus with parallel graphics-processing capabilities are disclosed. One exemplary embodiment of a mobile computing apparatus includes physical memory, at least two distinct graphics-processing devices, and a bus coupled to the physical memory and the at least two graphics-processing devices. A virtual graphics processing component enables each of at least two graphics-processing operations to be executed, in parallel, by a corresponding one of the at least two distinct graphics-processing devices, which operate in the same memory surface at the same time.

Abstract: Systems and methods for texture processing are presented. In one embodiment a texture method includes creating a sparse texture residency translation map; performing a probe process utilizing the sparse texture residency translation map information to return a finest LOD that contains the texels for a texture lookup operation; and performing the texture lookup operation utilizing the finest LOD. In one exemplary implementation, the finest LOD is utilized as a minimum LOD clamp during the texture lookup operation. A finest LOD number indicates a minimum resident LOD and a sparse texture residency translation map includes one finest LOD number per tile of a sparse texture. The sparse texture residency translation can indicate a minimum resident LOD.

Abstract: Provided is a stereoscopic image display device comprising a display panel displaying a multi-view image in a three-dimensional (3D) mode, a switchable barrier forming a barrier in the 3D mode, a user position detecting unit outputting a user position data including a user position information, a switchable barrier controlling unit calculating an average picture level of the multi-view image in the 3D mode and controlling an aperture ratio of the switchable barrier according to the average picture level and the user position information, a switchable barrier driving unit supplying driving voltages to divided electrodes of the switchable barrier and supplying a common voltage to a barrier common electrode, and a display panel driving unit converting the multi-view image into data voltages to supply the data voltages to data lines of the display panel and sequentially supplying gate pulses to gate lines of the display panel.

Abstract: The present invention relates to a mobile terminal displaying an instant message and a control method of the same. A mobile terminal according to an aspect of the invention may include: a wireless communication unit sending or receiving an instant message; a display unit including a first region and a second region and displaying the instant message sent or received by the wireless communication unit on the first region; and a controller displaying information corresponding to at least one object included in the instant message on the second region.

Abstract: In an embodiment, a method of processing memory requests in a first processing device is provided. The method includes generating a memory request associated with a memory address located in an unpinned memory space managed by an operating system running on a second processing device; and responsive to a determination that the memory address is not resident in a physical memory, transmitting a message to the second processing device. In response to the message, the operating system controls the second processing device to bring the memory address into the physical memory.

Abstract: This disclosure presents techniques and structures for determining a rendering mode (e.g., a binning rendering mode and a direct rendering mode) as well as techniques and structures for switching between such rendering modes. Rendering mode may be determined by analyzing rendering characteristics. Rendering mode may also be determined by tracking overdraw in a bin. The rendering mode may be switched from a binning rendering mode to a direct rendering mode by patching commands that use graphics memory addresses to use system memory addresses. Patching may be handled by a CPU or by a second write command buffer executable by a GPU.

Abstract: A driver for pixels of a display, having pixels arranged into a plurality of pixel blocks including at least two pixels in a row and at least two pixels in a column is presented. The driver includes a first converter, a second converter, and a frame memory. The first converter receives input image signals for a pixel block of the plurality of pixel blocks and generates compressed image signals by compressing the input image signals based on compression reference image signals. The frame memory stores the compressed image signals. The second converter reads the compressed image signals from the frame memory, and restores the compressed image signals based on compression reference image signals to generate restoration image signals. A compression reference image signal for a first pixel of the pixel block is the restoration image signal for a second pixel of a neighboring pixel block.

Abstract: Provided is a display switching apparatus that reduces delayed display, and the like, of frame images. An information processing terminal 1 is provided with a first rendering component 61 that, in each first time interval, generates and writes an image to a buffer, a second rendering component 62 that, in each second time interval, generates and writes an image to a buffer, a frame buffer management unit 11 that allocates a high-speed frame buffer 31 on a high-speed memory device 18 and a universal frame buffer 32 on a universal memory device 19, and a display switching apparatus 12 that includes a switching determination unit 81 that repeatedly calculates a rendering load for each rendering component and a switching performance unit 82 that switches the buffers allocated to the rendering components when the high-speed frame buffer 31 is not allocated to the rendering component with the higher rendering load.

Abstract: Aspects of the disclosure provide an integrated circuit. The integrated circuit includes a first memory, a memory controller, and a display controller coupled to a display module. The memory controller is selectively coupled to the first memory and to a second memory that has higher power consumption than the first memory. The second memory includes a frame buffer storing pixel data of images to be displayed on the display module. When the integrated circuit enters a power saving mode, the memory controller, while coupled to the first memory and the second memory, pre-fetches pixel data of an image from the second memory into the first memory at a first data rate.

Abstract: A windowing display using deferred drawing commands operates by processing the drawing commands that write to a tile 22 of a frame buffer 30 to form one or more new pixel values are stored within a tile memory 40. Dirty pixel data indicative of which pixels within the tile memory are dirty pixels storing new pixel values and which pixels within the tile memory are clean pixels not storing new pixel values is also formed. In dependence upon the dirty pixel data, the new pixel value stored within the tile memory are written to the frame buffer memory. Pixels stored within the frame buffer memory corresponding to clean pixels within the tile memory remain unaltered as they are not written.

Abstract: Exemplary embodiments of methods and apparatuses to provide a coherent user interface across output devices having various characteristics are described. Rendering into a first window back buffer is performed to output a window on a first output device having first characteristics, and rendering into a second window back buffer is performed to display the window on a second output device having second characteristics. Pixel values of the window outputted on the first output device are stored in the first window back buffer, and the pixel values of the window outputted on the second output device are stored in the second window back buffer. The size of the first window back buffer is associated with the first characteristics of the first output device, and the size of the second window back buffer is associated with the second characteristics of the second output device.

Abstract: A scanning image display apparatus includes a light source unit (1) that emits a laser beam, a scanning mirror (3) that two-dimensionally scans the laser beam in a first direction and in a second direction that crosses the first direction at predetermined scanning frequencies, respectively, a frame buffer (5) that temporarily stores image data corresponding to images to be displayed on a display screen frame by frame, and a display controller (4) that generates display data used to modulate an intensity of the laser beam at a predetermined frame frequency using the read image data and causes the light source unit to emit the laser beam intensity-modulated based on the display data. The frame buffer is so configured that the respective image data of a plurality of different frames can be temporarily stored therein and read therefrom.

Abstract: Systems, apparatus, methods and computer program products are described below for rendering a graphical user interface by selectively compositing display contents. In general for each of one or more content producers, where each content producer is associated with content storage containing display content, display content for output is identified depending on the content consumer to which the graphical user interface is being rendered.

Abstract: Image latency is reduced in a video display system where an image is displayed for a stroke video frame period. The system has a display device and a plurality of memory buffers, each of which is adapted to receive image data (in a receiving condition) or to display data to the display device (in a display condition). The stroke video frame period is divided into at least two time periods and the number of memory buffers provided is at least the number of time periods per stroke video frame period. One of the memory buffers is in the display condition for a first time period, with the remaining memory buffers in the receiving condition. At the end of the time period, the memory buffers are rotated so that the displayed memory buffer moves to the receiving condition and one of the receiving buffers moves into the display condition.

Abstract: A method of transmitting visual data from a host computer to multiple displays across a computer network is disclosed. Visual data is stored in a plurality of frame buffers, each frame buffer associated with a separate display. A frame buffer update sequence is determined, with operations to be performed on frame buffers in the plurality. The data stored in the plurality of frame buffers is encoded as specified by the buffer update sequence to yield encoded images and each encoded image is sent across a computer network to the separate display associated with the frame buffer from which the encoded image was derived.

Abstract: A multi-threaded processor is provided, such as a shader processor, having an internal unified memory space that is shared by a plurality of threads and is dynamically assigned to threads as needed. A mapping table that maps virtual registers to available internal addresses in the unified memory space so that thread registers can be stored in contiguous or non-contiguous memory addresses. Dynamic sizing of the virtual registers allows flexible allocation of the unified memory space depending on the type and size of data in a thread register. Yet another feature provides an efficient method for storing graphics data in the unified memory space to improve fetch and store operations from the memory space. In particular, pixel data for four pixels in a thread are stored across four memory devices having independent input/output ports that permit the four pixels to be read in a single clock cycle for processing.