Abstract: Buffer display techniques are described. In one or more implementations, at least part of an off-screen buffer is rasterized by an application to generate an item for display by the computing device. One or more communications are formed that describe the part of the off-screen buffer which contains the item that is to be copied to update an onscreen buffer.

Abstract: Embodiments of the present invention provide for improved timing control in 2-D image processing to maintain a constant rate of fetches and pixel outputs even when the processing operations transition to a new line or frame of pixels. A one-to-one relationship between incoming pixel rate and outgoing pixel rate is maintained without additional clock cycles or memory bandwidth as an improved timing control according to the present invention takes advantage of idle memory bandwidth by pre-fetching a new column of pixel data in a first pixel block of a next line or frame while a new column of an edge pixel block on a current line is duplicated or zeroed out. As the edge pixel block(s) on the current line are processed, the data in the first pixel block of the next line or frame become ready for computation without extra clock cycles or extra memory bandwidth.

Abstract: A logical framebuffer may identify pixels areas or blocks of an image that have changed between successive frames. The pixel values of these identified areas may be copied and/or scaled from more recent frames and merged into older frames stored in scanout buffers of an image display system to update older buffers. The logical framebuffer may compare image data at a resolution that is greater than or equal to the resolution of the scanout buffers. Scaling may be used to downscale changed pixel areas frames stored at the higher resolution of logical framebuffer that are to be copied into older frames at the lower resolution of the scanout buffers to update the older frames. Changed pixel areas may also be copied from a newer frame buffered at the lower resolution after the older frame. Latency may be reduced. Image processors, display systems, and methods are provided.

Abstract: This document describes techniques for pre-rendering new content for an application-selectable user interface. These techniques permit a user to select to view application-selectable tiles of the interface and, on selection, quickly see new content through the tiles in the selected portion. In some embodiments, the techniques pre-render content for a portion of a non-visible region of the interface rather than all of the non-visible region to reduce resource costs, such as processor and memory usage on a device and communication bandwidth usage on a communication network.

Abstract: Techniques are described that track the lines and pixels in a frame buffer in the host system that are being modified and transmit these modified scan lines and modified pixel locations to the self refresh display instead of entire contents of the frame buffer. The graphics adapter informs the self refresh display of the modified scan lines or pixel information and then sends the pixel data over the communications channel to the display. Custom codes can be used to identify and transmit modified scan lines and pixels to the self refresh display logic.

Abstract: A display apparatus, an integrated circuit and method thereof are disclosed. The display apparatus includes a frame buffer, a controller circuit, and a display driver circuit. The frame buffer is configured to retain a plurality of image frames to be displayed. The controller circuit, coupled to the frame buffer, is configured to determine whether a change in the image frames has occurred and whether a refresh time is expired. The display driver circuit, operatively coupled to the frame buffer and adapted to couple to an active display device, is configured to receive the image frames to be displayed from the frame buffer and dynamically refreshing the active display device when the change is determined or when a refresh time is expired.

Abstract: Sequential write operations to a unit of compressed memory, known as a compression tile, are examined to see if the same compression tile is being written. If the same compression tile is being written, the sequential write operations are coalesced into a single write operation and the entire compression tile is overwritten with the new data. Coalescing multiple write operations into a single write operation improves performance, because it avoids the read-modify-write operations that would otherwise be needed.

Abstract: A data processor of a processing system, such as a graphics processing system, converts an input data value into an output data value by approximating a function which maps input values to output values. The data processor approximates the function using first and second predetermined ranges of values which are quantised into plural corresponding pairs of range sections, a predetermined gradient for each pair of range sections, and predetermined section end values for each pair of range sections. By using these predetermined parameters, the approximation of the function can be implemented efficiently by the data processor of the processing system.

Abstract: An apparatus generally having a plurality of memories and a first circuit is disclosed. The memories may be configured to store a plurality of first data points. The first data points generally form a two-dimensional block. The first data points may be arranged among the memories such that a load cycle from the memories accesses a rectangular region of the two-dimensional block. The load cycle generally comprises a plurality of read cycles, a different one of the read cycles corresponding to each one of the memories. The first circuit may be configured to (i) receive the first data points as read from the memories and (ii) generate a plurality of second data points by a video codec transformation of the first data points between a spatial domain and a frequency domain.

Abstract: A system and method for efficiently scheduling memory access requests. A semiconductor chip includes a memory controller for controlling accesses to a shared memory and a display controller for processing frame data. In response to detecting an idle state for the system and the supported one or more displays, the display controller aggregates memory requests for a given display pipeline of one or more display pipelines prior to attempting to send any memory requests from the given display pipeline to the memory controller. Arbitration may be performed while the given display pipeline sends the aggregated memory requests. In response to not receiving memory access requests from the functional blocks or the display controller, the memory controller may transition to a low-power mode.

Abstract: Embodiments are disclosed that relate to rendering tiles of stereoscopic images in an interleaved manner. For example, one disclosed embodiment provides a method comprising rendering a first tile of an image, and after rendering the first tile of the first image, rendering a first tile of a second image. After rendering the first tile of the second image, a second tile of the first image is rendered, and after rendering the second tile of the first image, a second tile of the second image is rendered. The method further comprises sending the first image to a first eye display, and sending the second image to a second eye display.

Abstract: An exemplary apparatus for controlling display devices writes pixel data in a buffer in synchronous with an input clock signal. A differential value that represents a change of timing difference between input and output sides is calculated in each of a plurality of frames, and a timing correction based on the differential value calculated during the previous frame is performed within the vertical blanking period. Thereafter, the pixel data is read and output from the buffer to the display device in synchronous with an output clock signal.

Abstract: A digital manipulator for an inverter and an image display method for the digital manipulator are disclosed. The digital manipulator is connected to and an external computer. The images used by the digital manipulator are edited by editing software in an external computer and are downloaded to LCM of the digital manipulator to display. The digital manipulator has a plurality of function buttons. Corresponding functions of the function buttons are assigned via editing software by a user. As a result, the digital manipulator is more flexible to use, and users are allowed to configure a digital manipulator based on own individual requests and operating habits.

Abstract: To manage dynamic adjustment of the refresh rate of a computer display, the operating system defines at least two playback modes: one or more custom modes that can be selected by applications, and a standard mode which is a default setting for the system that can be expected by applications. The operating system provides an application programming interface that enables an application to request using a custom mode. If approved to use the custom mode, then the application presents frames for display based on the custom mode. The operating system stores timing data for each buffered frame indicating how to play the frame in both standard mode and the custom mode. If a transition back to the standard mode occurs, the operating system uses the timing data to properly present frames of video until the application stops generating frames of video in the custom mode.

Abstract: An image signal modifying device includes a pixel, a memory which stores compressed information in which a three-dimensional (“3-D”) lookup table is coded, an image signal modifying unit which decodes the compressed information to generate a restored 3-D lookup table and generates a modified signal based on a first image signal of a first frame, a second image signal of a second frame, a third image signal of a third frame and the restored 3-D lookup table, and a data driver which converts the modified signal into the data voltage and supplies the data voltage to the pixel.

Abstract: An image cache memory performs caching of image data, the image cache memory includes a cache buffer, a cache tag unit, a comparator, and a controller. The cache buffer stores cache data for each rectangular block including a plurality of pixels arranged in rectangle, and the cache tag unit stores tags each corresponding to a rectangular-block group including a plurality of rectangular blocks. The comparator makes comparison by using the tags stored in the cache tag unit, and the controller performs the caching by controlling the cache buffer, the cache tag unit, and the comparator.

Abstract: The video output system in a computer system reads pixel information from a frame buffer to generate a video output signal. In addition, full-motion video may also be displayed in a window defined in the frame buffer. If the native resolution of the full-motion video is larger than the window defined in said frame buffer then valuable memory space and memory bandwidth is being wasted by writing said larger full-motion video in a memory system (and later reading it back) when some data from the full-motion video will be discarded. Thus, a video pre-processor is disclosed to reduce the size of the full-motion video before that full-motion video is written into a memory system. The video pre-processor will scale the full-motion video down to a size no larger than the window defined in the frame buffer.

Abstract: A method, system, and computer-readable storage medium are disclosed for rendering knockout groups using a graphics processing unit (GPU). Input comprising at least one knockout group may be received at the GPU. The knockout group may comprise a plurality of objects that are ordered by paint order. Each object may be represented in the input by a plurality of vertices. The plurality of objects may be drawn into a frame buffer of the GPU such that a topmost object at each pixel in the frame buffer determines a color and an opacity of the pixel with respect to the other objects in the knockout group. In drawing the plurality of objects of the knockout group into the frame buffer of the GPU, program code may be executed by the GPU.

Abstract: An apparatus for displaying digital image files on a standard display device such as a television set is provided in the form of a set-top box. The box includes an integrated circuit and memory buffer for computing an image from a file, a second memory buffer for storing computed images, and a video output for delivering the images to the display device. Preferably, the set-top box also includes an infrared receiver for remote operation. The set-top box receives the image files from standard storage media such as floppy disks.

Abstract: A data processing system comprises a host processor and a graphics processor that renders frames to be output and writes those frames to a frame buffer. When a new frame is to be generated and written to the frame buffer, the host processor determines, for a set of plural sub-regions that the frame has been divided into, which of those sub-regions could have changed from the frame previously used for the frame buffer 30 and generates information indicating which sub-regions should be rendered to generate the new frame on the basis of the determination 31. The information indicating which sub-regions should be rendered to generate the frame is provided to the graphics processor 32 and the graphics processor uses the provided sub-region information to render only the indicated sub-regions 33.

Abstract: Methods and apparatuses for per display scale factors within a multiple display system are described. In one aspect of the invention, a machine implemented method includes setting a scale factor for each window buffer equal to an extreme scale factor among a plurality of displays. The method further includes transferring data from each window buffer into a corresponding frame buffer for one of the plurality of displays by setting a scale factor of each frame buffer equal to the scale factor of the corresponding display. In one example according to this aspect, the method further includes displaying on a high resolution display and a low resolution display an image, stored in the corresponding frame buffers, with substantially the same physical size even though the displays have different scale factors and pixel densities. Also, the extreme scale factor is one of the largest scale factor or the smallest scale factor.

Abstract: Remote desktop servers include a display encoder that maintains a secondary framebuffer that contains display data to be encoded and transmitted to a remote client display and a list of display primitives effectuating updated display data in the secondary framebuffer. The display encoder submits requests to receive the list of drawing primitives to a video adapter driver that receives and tracks drawing primitives that, when executed, update a primary framebuffer.

Abstract: The video output system in a computer system reads pixel information from a frame buffer to generate a video output signal. In addition, a full-motion video may also be displayed. Reading from both the frame buffer and the full-motion video buffer when displaying the full-motion video window wastes valuable memory bandwidth. Thus, the disclosed system provides a system and methods for identifying where the video output system must read from the frame buffer and where it must read from the full-motion video buffer while minimizing the amount of area it reads from both the frame buffer and the full-motion video buffer.

Abstract: A system and method for efficiently scheduling memory access requests from a display controller pipeline. The display controller monitors the amount of data in the line buffers in the internal pixel-processing pipelines. The display controller waits until the amount of data in a given line buffer has fallen below an amount equal to the pixel width of the region being rendered by the internal pixel-processing pipeline before issuing memory requests to the memory controller. When the memory controller is not processing received memory requests, the memory controller transitions to a low-power state.

Abstract: A first image at a first resolution is received, the first image having a first hole therein. Based on the first image, a second image is generated at a second resolution lower than the first resolution, the second image having a second hole therein corresponding to the first hole. In the second image, one or more second-image source patches for the second hole are identified. At least one first-image source patch in the first image is identified based on a location of the identified second-image source patch. The identified at least one first-image source patch are stored in memory. Fill content are identified in the at least one first-image source patch stored in the memory. The identified fill content are placed in the first hole.

Abstract: Provided are methods and systems for video data processing. In an exemplary system, there is a video source and a display unit. The display unit may receive video data from the video source and display it at a first refresh rate. The video source may cause the display unit to enter a power economy mode, in which the displayed video is static. In this mode, the video source stops sending new video data, while the display unit selectively stores one or more of the previously received video frames and further displays it repeatedly at a second refresh rate, which may be lower than the first refresh rate (e.g., it may be decreased from 60 Hz to 40 Hz). In the power economy mode, the power consumed is decreased, in some embodiments, by about 10-20 % for both the video source and the display unit.

Abstract: An image projection apparatus includes an input part that inputs image data, a frame memory that stores the image data, a laser oscillator that radiates a laser to a screen, a deflection part including a reflective optical element and configured to oscillate the reflective optical element with respect to two perpendicularly intersecting axes, a storage part that stores coefficient data of a polynomial expression, an irradiation position calculating part that calculates an irradiation position based on a coefficient obtained by using the coefficient data and an oscillation angle of the reflective optical element, an address calculating part that calculates an address in the frame memory corresponding to the irradiation position, a memory control part that reads out pixel data of the address, and a laser drive part that oscillates the laser oscillator in accordance with a luminance that corresponds to the pixel data.

Abstract: Buffer display techniques are described. In one or more implementations, at least part of an off-screen buffer is rasterized by an application to generate an item for display by the computing device. One or more communications are formed that describe the part of the off-screen buffer which contains the item that is to be copied to update an onscreen buffer.

Abstract: Operations by the user include a first change operation to move a display target area in a horizontal direction, a second change operation to move a display target area in a depth direction, and a third change operation to change the display magnification. In an image generating apparatus, data to be required for updating the display target image data in case of a change operation is predicted for each of the plurality of change operations, and the predicted data for each change operation is stored in the memory area. An allocation of data volume that can be stored in the memory area to each change operation is adaptively changed depending on the current display magnification, user setting mode, annotation information, operation history, user information, type of staining or the like.

Abstract: A system, method, and computer program product are provided for a dynamic display refresh. In use, a state of a display device is identified in which an entirety of an image frame is currently displayed by the display device. In response to the identification of the state, it is determined whether an entirety of a next image frame to be displayed has been rendered to memory. The next image frame is transmitted to the display device for display thereof, when it is determined that the entirety of the next image frame to be displayed has been rendered to the memory. Further, a refresh of the display device is delayed, when it is determined that the entirety of the next image frame to be displayed has not been rendered to the memory.

Abstract: Many computing device may now include two or more graphics subsystems. The multiple graphics subsystems may have different abilities, and may, for example, consume differing amount of electrical power, with one subsystem consuming more average power than the others. The higher power consuming graphics subsystem may be coupled to the device and used instead of, or in addition to, the lower power consuming graphics subsystem, resulting in higher performance or additional capabilities, but increased overall power consumption. By transitioning from the use of the higher power consuming graphics subsystem to the lower power consuming graphics subsystem, while placing the higher power consuming graphics subsystem in a lower power consumption mode, overall power consumption is reduced.

Abstract: A decoding execution unit decodes image data encoded with a resolution higher than that of a display device. A display buffer stores image data decoded by the decoding execution unit. A standby buffer stores image data decoded by the decoding execution unit while the image data stored in the display buffer is being displayed. A reduced image buffer stores image data produced by reducing the entirety of the image data. An image display control unit switches from the image data stored in the display buffer to the image data stored in the standby buffer if the decoding of the image data by the decoding execution unit is completed, and enlarges the image in the reduced image buffer and stores the enlarged image in the display buffer if the decoding of the image data by the decoding execution unit is not completed.

Abstract: An image processing apparatus includes an image drawing region determining module, a virtual buffer allocation module, a physical buffer allocation module, a first converter, and an image drawing module. The image drawing region determining module determines an image drawing region based on first image information. The virtual buffer allocation module allocates virtual addresses to a virtual buffer configured to store the first image information virtually. The physical buffer allocation module allocates physical addresses to a physical buffer configured to store second image information corresponding to the determined image drawing region. The first converter converts at least a part of the allocated virtual addresses into at least a part of the allocated physical addresses. The at least part of the virtual addresses corresponds to the second image information. The image drawing module stores he second image information in the physical buffer based on the physical addresses obtained through the conversion.

Abstract: In order to reduce power consumption of a display device when a still picture is to be displayed, a display area of the device is subdivided into a plurality of Still Picture Refresh Groups (SPRGoP's), with each SPRGoP consisting of n pixels. All n of the pixels are charged in every one of sequential frames when a motion picture mode is in effect. Less than all of the n pixels of each SPRGoP are refreshed in each frame of an N-frame refresh cycle when a still picture mode is in effect. Different schemes for cycling through the n pixels of each SPRGoP are disclosed.

Abstract: Control of platform control of platform power consumption using selective updating of a display image. An embodiment of an apparatus includes a display controller to transfer pixel data from a frame buffer to a video display and a detection element to track updates to the frame buffer, the detection element to identify a portion of the pixel data that has been changed from a previous image, where the display controller is to provide the video display with the identified portion of the pixel data.

Abstract: A control method for bi-stable displaying is provided, using queues for storing coordinates to achieve pipeline parallel processing on display data, thereby increasing display speed. In a preceding stage of the display process, because a plurality of queues may be used for temporarily storing part of the display data which is then reconstructed into complete display data to update a current frame buffer, comparing pixel data and generating driving data can be simultaneously preformed upon a plurality of line segments. Moreover, in a succeeding stage of the display process, a similar process may be performed to update a previous frame buffer, so access time can be reduced and errors caused by overlapping image blocks can also be avoided. Furthermore, the method may be also applied to a timing controller and a bi-stable display device.

Abstract: A rendering method is provided. The method includes: initializing a surface flinger to establish at least two buffer memories; confirming correspondence between all visible surfaces and the at least two buffer memories, rendering all of the visible surfaces to the corresponding buffer memories according to the correspondence, and combining all of the buffer memories to output a result for display; determining whether a change occurs in the visible surfaces; when the change occurs in the visible surfaces, identifying the buffer memory where the visible surface with the change is located; rendering again the visible surfaces that need to be rendered in the identified buffer memory, and combining the buffer memory that is rendered again with the buffer memory that is not rendered again to output a result for display.

Abstract: A system improves the performance of buffering frames. After a buffer flip occurs when double buffering the frames, the system may update some portions of dirty buffer regions in a back buffer with changes between a source frame and an intermediate frame. The system may update other portions of the dirty buffer regions with changes between the intermediate frame and a target frame. An application may write to an application buffer or a display buffer depending on whether the application controls a region of the display buffer that corresponds to the application buffer.

Abstract: Systems, apparatus, methods and computer program products are described below for rendering a graphical user interface by selectively compositing display contents. In general for each of one or more content producers, where each content producer is associated with content storage containing display content, display content for output is identified depending on the content consumer to which the graphical user interface is being rendered.

Abstract: According to one embodiment, an image processing apparatus includes a receiver, a write controller, and a transmission controller. The receiver is configured to receive image data which forms an image to be displayed on a display apparatus. The write controller is configured to control to divide the image data into a plurality of regions and write compressed image data obtained by compressing the image data for each region, to a frame memory. The transmission controller is configured to control to transmit, to the display apparatus, original image data, which is restored by reading the compressed image data from the frame memory and decompressing the compressed image data for each region. Each of the regions has an overlap portion which is overlapped by a part of an adjacent region.

Abstract: A display control device is connected to and controls a display device. The display control device comprises a frame buffer store, and a control component. The display control device is arranged to receive (S1) compressed display data, store (S2) the received compressed display data in the frame buffer store, and for each frame refresh of the display device access (S3) stored compressed display data, decompress (S4) the accessed display data, and output S5 the decompressed display data.

Abstract: Data transmission for display partial update. An embodiment of an apparatus includes a display controller to transfer pixel data from a frame buffer to a video display and to select a granularity of a plurality of granularities for units of data for the transfer of the pixel data, and a detection element to track updates to the frame buffer, the detection element to identify at least a first damage area of the pixel data that has been changed from a previous image, wherein the display controller is to provide the video display with the identified first damage area of the pixel data in more or more units of data of the chosen granularity.

Abstract: A method of generating an image comprises receiving a signal over a USB interface comprising encoded display data for one or more rectangular group of pixel tiles within an image and position data for the or each group of pixel tiles. The coefficients are obtained from the encoded display data, maybe by converting variable bit length fields into AC coefficients and an inverse Haar transform performed on them to generate pixel data for each rectangular group of pixel tiles. A frame buffer, which may be part of the display, is then updated with the generated pixel data ready for output to the display device. Copy protection may also be incorporated using AES negotiated over HDPC.

Abstract: An approach is provided in which a source entity generates scene fill metadata corresponding to scene transition points included in media content. The scene fill metadata includes a “required buffer amount,” which indicates an amount of the media content for which a destination entity should buffer prior to displaying one or more upcoming scenes. In turn, the source entity provides the scene fill metadata to a destination entity.

Abstract: At least certain embodiments of the present disclosure include a method to manipulate graphics with protected content. In some embodiments, a composite engine of a computing system retrieves data within a region within a frame buffer holding pixels of an image displayed on a display device of the computing system. The region corresponds to an area of interest within the image, and the data retrieved includes pixels forming a portion of the image in the area of interest and protected content associated with the image. The composite engine may re-composite the area of interest with the pixels retrieved to produce an enlarged version of the portion of the image in the area of interest, without exposing the protected content to applications outside of the window server.

Abstract: A voltage test device used in liquid crystal display (LCD) panels, including test solder pads and test lines, is proposed. The test solder pads are connected to an LCD panel through the test lines. Each of the test lines includes a switch test line and a signal-inputting test line. The voltage test device further includes a first connector. The switch test line includes a first portion of the switch test line and a second portion of the switch test line. The first portion of the switch test line is connected to the second portion of the switch test line through the first connector. The first connector is used for preventing the electric current in excess of a predetermined threshold from flowing inside the LCD panel. Meanwhile, a voltage testing system used in LCD panels is proposed.

Abstract: An electronic device has a display, a video memory, a video data buffer unit, a central processing unit, and a video processing unit. The central processing unit, according to a number of divided screens and a resolution for each of the divided screens, retrieves different but continuous video data corresponding to the resolution of each of the divided screens from the video data buffer unit, and stores the retrieved continuous video data in consecutive memory addresses in the video memory. The video processing unit reads in sequence the continuous video data stored in the video memory, and sends the continuous video data in sequence to the display according to a direction of arrangement of the divided screens such that video contents displayed on the divided screens by the display are continuous.

Abstract: A method and device for acquiring an image such as a splash screen for an application. A screenshot instruction is sent to a target device upon detecting a trigger event; image data is received from the target device in response to the screenshot instruction; and upon receiving the image data, the image data is automatically stored and associated with the application.

Abstract: A portable electronic device is provided. The portable electronic device includes a processor for providing encoding data and an LCD module coupled to the processor. The processor includes an encoder for encoding a frame data to generate the encoding data. The LCD module includes a driver and an LCD coupled to the driver. The driver includes a decoder for decoding the encoding data to obtain an image data. The LCD displays the image data.

Abstract: A method encodes or decodes a frame (also file), such as a video, graphic, media, or other frame or data, representing a real-time graphic output from a frame buffer, output by a video camera, or another file or data. The file includes frames each comprising macroblocks. Reference frame buffers (PFTs), virtual frame buffer tables (VFTBs) of equal number to the PFTs, each VFTB corresponds to a respective PFT, and respective sectors of each PFT for respective macroblocks are created. Frames of the file are encoded/decoded by successive encode/decode of macroblocks. A pointer is created in the VFBT associated with the PFT rather than encoding/decoding any matching macroblock. The pointer and its reference are relied on for each already encoded/decoded macroblock retained in the PFT. Processing, memory, bandwidth and power requirements for encoding or decoding are reduced.