Abstract: There is described a duplex image-forming apparatus having a function of forming images onto both sides of a transfer material. The apparatus includes an image-forming section to respectively form an obverse-side image and a reverse-side image on a photoreceptor element by scanning a light beam, modulated with image signals based on pixel-clock signals and reflected from a polygon mirror rotating at an operating velocity based on polygon-clock signals; a transferring section to transfer said obverse-side image and said reverse-side image onto both surfaces of said recording sheet; a fixing section to fix the images onto both surfaces of said recording sheet; and a clock-frequency changing section to change a pixel-clock frequency, and a polygon-clock frequency, corresponding to a degree of shrinkage of said recording sheet caused by a fixing operation performed in said fixing section, at a transition time of an image-forming operation from one side to another side.

Abstract: An optical scan device having an optical deflector reflecting a light beam from a light beam source so as to deflect the light beam and having a surface to be scanned on which information is written such that the light beam deflected by the deflector scans the surface is disclosed. Optical detectors are arranged at least in two locations, a start side of writing and an end side of writing, which locations are outside an effective writing area. A measuring part measures a scan time required by the light beam deflected by the optical deflector to scan a range between the optical detectors. A correcting part corrects each dot position of image data in the effective writing area to an arbitrary position based on a variation amount of the measured scan time.

Abstract: An image forming apparatus that forms an image by scanning a recording medium with a plurality of light beams that are modulated by individual image forming signals respectively corresponding to the light beams. A beam detecting device detects the plurality of light beams at preset positions and outputs corresponding detection signals. At least one delay device delays each of the detection signals from the beam detecting device by an arbitrary time period which is predetermined individually for each of the detection signals. A reference clock signal generating device generates a plurality of reference clock signals on the basis of delayed detection signals output from the at least one delay device. The image forming apparatus performs an image forming operation according to the plurality of reference clock signals.

Abstract: The present invention provides a pattern drawing device that enables drawing with reduced operational processing loading of the associated CPU. Thus, in a pattern drawing device for forming a plurality of tracks disposed concentrically on a substrate to produce a two-dimensional pattern, a basic pixel sequence is prepared and used repeatedly in forward (positive) and/or reverse (negative) order to produce symmetric portions of the two-dimensional pattern.

Abstract: A clock control apparatus generates a clock for laser drive in latent image formation in an image forming apparatus. A main-scanning synchronizing clock generation unit generates a synchronizing clock synchronized with a main-scanning synchronizing signal based on the main-scanning synchronizing signal and an original clock. A delay unit delays the synchronizing clock so as to correct for a mechanical shift upon latent image drawing by a laser drive. A pseudo-main-scanning synchronizing signal generation unit generates a pseudo-main-scanning synchronizing signal based on the synchronizing clock delayed by the delay unit, and supplies the pseudo-main-scanning synchronizing signal to the main-scanning synchronizing clock generation unit. The main-scanning synchronizing clock generation unit, which generates a clock synchronized with the pseudo-main-scanning synchronizing signal. The clock is supplied via a clock selection unit to a PWM generation unit, and is used for the laser drive.

Abstract: In a color registration deviation correction method or an image forming apparatus, a pattern image is read out, a color registration deviation amount is detected, and a correction amount of the color registration deviation is calculated. On the basis of the calculated correction amount, it is judged whether correction can be made in an interimage period. In the case where the correction can be made in the interimage period, the color registration deviation correction is made in the interimage period, and in the case where the correction can not be made in the interimage period, the color registration deviation correction is made in the two interimage periods.

Abstract: An image forming apparatus, includes an image forming unit including an image bearing member, a beam generating unit for generating a plurality of light beams and an optical scan system for scanning the image bearing member with the plurality of light beams to write an image, a beam detecting unit for detecting the plurality of light beams scanning the image bearing member at predetermined positions and obtaining a plurality of beam detection signals, a clock generating unit for generating a single clock signal, a controller for controlling the frequency of the single clock signal and a synchronization circuit for controlling the phase of the single clock signal in accordance with the plurality of beam detection signals obtained by the beam detecting unit, and generating a plurality of control clocks, wherein the plurality of beams are generated in accordance with the plurality of control clocks.

Abstract: When a CPU begins to monitor whether delay variation characteristics of a pulse width variation circuit have varied, it selects a basic delay setting value in a basic delay value setting block from a smallest one. The CPU sets a division number in a phase select block from a given minimum desired division number for pulse width modulation. The CPU senses the level of a phase comparison result signal (PHASE) from the pulse width modulation circuit. If the phase comparison result signal is stable at “1”, the CPU 1 fixes the division number. If the phase comparison result signal is “0” and the division number is not maximum, the CPU increases the division number and goes back to the setting of the division number. If the division number is maximum, the CPU increases the basic delay and goes back to the basic delay setting.

Abstract: Four beams are caused to scan a scanning surface in the main scanning direction in parallel. The beams expose the target area between two optical sensors, not the surface of a photosensitive drum, to produce correction data to correct shifts in the exposure positions of the four beams in the main scanning direction with an accuracy of less than a small fraction of one pixel. On the basis of the correction data, an actual image formation area is set on the photosensitive drum. This makes it possible to always control the relative exposure scanning position accurately even when the relationship between the main scanning positions of the light beams is unknown.

Abstract: The invention concerns a clock-generating circuit, which generates dot clock pulses for driving a light-emitting element employed in an optical-writing section of an image-forming apparatus and has a function of canceling unevenness of scanning-light amount caused by variations of transmittances and reflectances in the optical-writing section when a polygon mirror scans a laser beam.

Abstract: A self-scanning light-emitting device is provided in which the number of bonding pads can be decreased, i.e. 2 or 3. The device comprises an array of a plurality of three-terminal light-emitting elements; electrical means having unidirectional characteristic to voltage or current for connecting the control electrodes of neighboring light-emitting elements to each other; two clock pulse lines for applying two-phase clock pulses alternately to one of two terminals except the control electrode of each light-emitting element; and a power supply line connected to each of the control electrodes of the light-emitting elements via a load resistor, respectively. The resistance of the load resistor connected to the light-emitting element to be turned on at first is selected to be smaller than that of other resistors. As a result, the bonding pad for the start pulse may be omitted.

Abstract: An image is accurately recorded by a light beam on a PS plate wound on a drum which is rotating at a constant speed. A rotary encoder detects information of a recording position in a main scanning direction by the light beam that is emitted from an optical unit to the PS plate. Based on the detected information, a PLL circuit of a recording synchronizing signal generating unit generates an original clock. Pulses of the original clock are counted by a decimating counter, which outputs a decimating instruction to decimate a pulse from the original clock each time the count reaches a preset count. Based on the decimating instruction, a pulse is decimated from the original clock, and a decimated clock is frequency-divided at a fixed frequency-dividing ratio by a frequency divider, which outputs a pixel clock for recording the image.

Abstract: A variable resolution transition placement circuit in an electrophotographic imaging device allows transitions to be placed within a stream of video data so that the pixel resolution achieved over a scan line is adjustable on a pixel by pixel basis using a system clock. Pixel data defines transition positions relative to a synthesized video clock defining pixel time periods. A converter converts positions of the transitions relative to the synthesized video clock to positions relative to the system clock using a value provided by a synthesized video clock to system clock transform generator. The value can change between synthesized video clock cycles to change the pixel resolution. A synthesized video generator generates values of a synthesized video clock relative to the system clock.

Abstract: A system is provided for enabling a pulse width modulator to render video data for a laser at a frequency independent of the operating frequency of the pulse width modulator. The system includes phase measuring circuitry, edge output determining circuitry, edge location circuitry, and a summer. The phase measuring circuitry is operative to detect a phase offset on a scan line for a laser. The edge output determining circuitry is operative to determine which system clock cycle to output an edge on the system clock to act as if it were on a video clock. The edge location circuitry is operative to locate placement of an edge for a given pixel. The summer communicates with the phase measuring circuitry, the edge output determining circuitry, and the edge location circuitry. The summer is operative to combine values from the phase measuring circuitry, the edge output determining circuitry, and the edge location circuitry to generate a desired video signal. A method is also provided.

Abstract: An electrophotographic imaging device uses a transition placement device to position transitions in a stream of video data. A rasterizer included in the electrophotographic imaging device generates pixel data bytes based upon data received from a computer defining an image. A converter generates codes specifying positions of transitions within a pixel time period corresponding to a pixel data byte. The transition placement device includes a phase measuring device to measure a timing offset between an active edge of a beam detect signal and a rising edge of a reference clock. A transition adjustment device adjusts the positions of the transitions specified by the codes relative to the rising edge of the reference clock using the timing offset. Transition generation logic generates the transitions for the stream of video data using the adjusted transition positions received from the transition adjustment device.

Abstract: A clock control apparatus which generates a clock for laser drive in latent image formation in an image forming apparatus. A main-scanning synchronizing clock generation unit 603 generates a synchronizing clock synchronized with a main-scanning synchronizing signal based on the main-scanning synchronizing signal and an original clock. A delay unit 604 delays the synchronizing clock so as to correct a mechanical shift upon latent image drawing by laser drive. A pseudo main-scanning synchronizing signal generation unit 103 generates a pseudo main-scanning synchronizing signal based on the synchronizing clock delayed by the delay unit 604, and supplies the pseudo main-scanning synchronizing signal to the main-scanning synchronizing clock generation unit 603. The main-scanning synchronizing clock generation unit 603 generates a clock synchronized with the pseudo main-scanning synchronizing signal. The clock is supplied via a clock selection unit 102 to a PWM generation unit 605, and is used for the laser drive.

Abstract: Raster scanners, and printing machines which use raster scanners, that include compensation for the finite response times of their lasers and their laser drive signals on image edges. When an image pixel is not an image edge the laser driver is driven in synchronization with a master clock. However, if an image pixel is an edge of an image the laser driver is driven earlier than it would have been if it was driven in synchronization with the master clock. Beneficially, the drive to the laser driver is advanced such that the actual laser exposure curve crosses that of an ideal laser exposure curve such that the developed line edge is substantially ideal.

Abstract: When a CPU begins to monitor whether delay variation characteristics of a pulse width variation circuit have varied, it selects a basic delay setting value in a basic delay value setting block from a smallest one. The CPU sets a division number in a phase select block from a given minimum desired division number for pulse width modulation. The CPU senses the level of a phase comparison result signal (PHASE) from the pulse width modulation circuit. If the phase comparison result signal is stable at “1”, the CPU 1 fixes the division number. If the phase comparison result signal is “0” and the division number is not maximum, the CPU increases the division number and goes back to the setting of the division number. If the division number is maximum, the CPU increases the basic delay and goes back to the basic delay setting.

Abstract: A method and apparatus for signal phase alignment. A pulse is produced and a reference clock signal having a first frequency with one or more clock edges is produced. An alignment clock signal is generated having the first frequency aligned with the pulse. The first frequency of the alignment clock signal is then realigned with the pulse. The alignment clock signal is generated using the pulse and aligning one of the clock edges of the reference clock signal with the pulse edge. The alignment clock signal is realigned using a plurality of delayed clock signals based on the reference clock signal. Each of the delayed clock signals has one or more edges. The plurality of delayed clock signals are latched based on the pulse and the delayed clock signal having an edge nearest to the pulse is selected.

Abstract: An embodiment of an edge placement device is supplied with transition data to generate transitions during a pixel time period corresponding to the transition data. The transition data is supplied by pulse code logic that converts pixel data to the transition data. The embodiment of an edge placement device includes first edge placement logic coupled to taps from a first clock delay chain and second edge placement logic coupled to taps of a second clock phase delay chain. Also included is a phase splitter that generate a first and a second clock phase coupled, respectively, to the first and the second clock delay chain from a clock corresponding to a pixel time period. The first and the second clock phase have rising edges on alternate cycles of the clock. The first and the second edge placement logic each include a plurality of D flip flops.

Abstract: The present invention provides an exposure device capable of operating at a high speed and obtaining an excellent printing result. The exposure device according to the present invention includes optical write heads using shift registers of two systems, and a circuit that supplies image data for one line divided into the first half and the second half to the respective shift registers. The circuit is consist of a write control section, a memory, a read control section and a transfer control section), and receives data of twice the number of bits of data inputted to the shift register.

Abstract: A method and system are disclosed for improving performance of adjustable printer clock signals in an electrophotographic device. A source clock signal is output having a source frequency. A first clock signal is output having a first frequency. The first frequency is substantially related to the source frequency by a ratio of n1:m1. An alignment signal is generated for adjusting a first printer clock signal with respect to a second printer clock signal. In response to the first clock signal and the alignment signal, the first printer clock signal is output having a first printer frequency. The first printer frequency is substantially related to the source clock frequency by a ratio of n1n2:m1m2.

Abstract: The magnification of an image in the main scanning direction thereof is altered by making the frequency of the image clock variable. At this time, if the pre-SOS lighting signal and the APC signal are output synchronously with the frequency of the image clock, then an SOS signal may not be output from the SOS sensor and control of the amount of light of a light beam may not be accurately executed. Therefore, the timings of the outputs of the pre-SOS lighting signal and the APC signal are controlled so as to normally be output at a uniform timing (i.e. the periods from the input of the SOS signal until the outputs of each signal are made uniform).

Abstract: An image processing apparatus processes an image signal obtained by subjecting optical image information to photoelectric conversion. An image fetch circuit converts the image signal into a digital signal and outputs it as input image data of one line. An image data processing circuit fetches the input image data of one line from the image fetch circuit in units of one pixel, and subjects it to predetermined image processing. A drive circuit at least supplies the image fetch circuit with a predetermined drive pulse signal which enables a high-speed operation of the image fetch circuit. A timing setting circuit programs, from the outside, timing of the drive pulse signal supplied from the drive circuit.

Abstract: Regardless of a relative installation position error between a light source and a photosensitive material, or of a deviation from a properly preset value of rotation speed of a photosensitive material, images are obtained with minimum loss of image quality and excellent reproducibility. The number m of light-emitting elements to make up a unit and the distance between adjacent pixels formed on the photosensitive surface are adjusted such that the width of the pixel groups is ⅓ mm or less, which is a period that the periodic image noise is not recognized as stripes.

Abstract: The pixel clock of a raster output scanning (ROS) system modulates an emitted light beam to provide pixel placement along a scan line. A method calculates the pixel clock frequency shifts to correct non-linearity of the scan line in a ROS. A data smoothing polynomial is calculated for the non-linearity of the pixels along the scan line. The needed frequency shift based on the polynomial to the first or higher orders is calculated and stored in a frequency shift look-up table. The calculated frequency shift from the frequency shift lookup table modifies the nominal pixel clock frequency to correct for the measured scan linearity of the ROS by modulation of the light beam.

Abstract: A conventional image forming device having a plurality of image optical scanning recording sections has had a drawback of being incapable of correcting printing positions of the image optical scanning recording sections with high precision by using a small-scale circuit. In the case of an image forming device of the present invention, a variable clock generator 114 having a voltage control oscillator (VCO) 114a is provided therein as reference clock signal generating means of laser control system of each of image optical scanning recording sections (LSU) for cyan, yellow, and magenta. By so doing, during an invalid printing period prior to a valid printing period, frequencies of the reference clock signals of the LSUs for cyan, yellow, and magenta are adjusted in accordance with offsets of printing start positions of these LSUs with respect to that of the LSU for black, so that printing offsets are eliminated.

Abstract: A reference frequency and facet to facet correction circuit utilizes a phase locked loop which includes a digital phase detector to measure the time difference between the end of scan and the end of count of each facet and store them in a lookup table. The phase locked loop continuously generates an average time value form the time differences of all the facets of the polygon. The phase locked loop also adds the errors of each facet to the average time value and uses the result to correct the frequency of a pixel clock generator for both the reference frequency and facet to facet errors.

Abstract: A device for correcting the non-linearity of a scanner comprising: a reset pulse generator for generating a reset pulse with a predetermined pulse width in synchronization with a scanning start signal generated corresponding to an input photosensitive belt sensing signal; an address generator for outputting an address by being reset by the reset pulse; a look-up table, that is initiated by the scanning start signal, for receiving an address from the address generator and for outputting information corresponding to the address in the form of digital data; and a converter for outputting a synchronizing signal with a frequency corresponding to the digital data from the LUT. Another aspect of this invention is a method for correcting the non-linearity of a scanner.

Abstract: In a laser drawing apparatus, a pattern is drawn on a workpiece by scanning the workpiece with at least one laser beam. The laser beam is modulated on the basis of raster-graphic data, in accordance with a series of clock pulses. A calculator calulates clock-pulse-phase-shift location data, indicative of where a phase of the clock pulses should be shifted, with a unit of less than 2.PI.. The calculation is made on the basis of pixel-dot-pitch discrepancy data measured along a scanning line defined by the scanning laser beam. A clock-pulse-outputting controller controls outputting the clock pulses so that the phase of the clock pulses is shifted, with the unit of less than 2.PI.. The shift occurs whenever the laser beam reaches each of the clock-pulse-phase-shift locations, represented by the clock-pulse-phase shift location data, during scanning of the workpiece with the laser beam. Consequently, a pixel-dot-pitch discrepance in the scanning line can be corrected with a unit of less than a one-pixel-dot size.

Abstract: It is an object to stably form a color image of a high quality without a color deviation by completing a phase adjustment in a short time so that a reference signal of a main scanning control system and a reference signal of a sub scanning control system have a predetermined phase. To accomplish the object, an output timing of an ITOP signal which is generated by a sensor 9 which detects a predetermined position of a photosensitive drum 5 which is rotated is compared with an output timing of a virtual main scanning sync signal BD' of a polygon mirror 3 for scanning a light beam onto the photosensitive drum 5 in the main scanning direction, thereby deciding an output timing of a reference clock SP. On the basis of the decided output timing, a PLL circuit 116 controls a rotational speed of a polygon motor 117 so that a difference between the reference clock SP which is outputted by a counter 83 and the ITOP signal have a predetermined phase difference.

Abstract: The optical intensity of laser light from a laser diode of a laser scanning apparatus having a polygonal mirror is detected with a monitoring photodiode. The detected output is delivered to a first switching end of a selector. The optical intensity of laser light reflected from the polygonal mirror is detected with a photosensor and the detection output is delivered to a second switching end of the selector. The selector selects either one of the switching ends in accordance with the timing of a laser scan. The associated detection signal is fed to a comparator, where it is compared with a reference voltage to produce a comparison voltage, which in turn is fed to a laser drive circuit to control the emission output of the laser diode. Despite variation in the reflectance of laser light from each reflecting surface of the polygonal mirror, a constant optical intensity is obtained on the basis of the reference voltage.

Abstract: A method of achieving line-to-line synchronization having a high degree of synchronization accuracy. Synchronization is performed by a specific high-speed block of logic which signals the beginning of scans to a PELCLK-based logic at pel boundaries, and provides sub-pel shifting as it passes data between the pel generation logic and a laser control signal. The synchronization error is made as small as propagation delays through a single multiplexer element. Such delays can be controlled to values less than 1/2 ns. The need to stop and restart the clocks is eliminated. All complex pel generation logic is clocked with the relatively low frequency PELCLK without regard to the synchronization task.

Abstract: A color image forming device that can certainly correct uniform velocity error associated with the characteristic of each optical system and can realize high-quality color image printing by performing a fine laser beam irradiating position control, in consideration of an error in surface accuracy of each mirror surface of a rotary polygon mirror. The color image forming device includes a storage unit for holding uniform velocity correction data previously created for each mirror surface of a rotary polygon mirror to correct a distortion in expansion or contraction of the electrostatic latent image in the main scanning direction due to the characteristic of an optical system, and an image clock generating unit for reading uniform velocity correction data on each mirror surface used in the rotary polygon mirror at a scanning time out of the storage unit and then generating image clock pulses for image signal creation with a period corresponding to the uniform velocity correction data.

Abstract: A facsimile apparatus comprises a facsimile unit for sending data corresponding to image data that has been received, and a printer unit for performing image recording by discharging ink droplets in accordance with data sent from the facsimile unit. A first CPU for the control of the facsimile unit sends, after one page of image data, data in a predetermined pattern and further a paper exhausting command to the printer. A second CPU of the printer unit performs a paper exhausting operation upon receiving the paper exhausting command, after recording of the predetermined pattern, and upon conveying the recording paper up to a predetermined position, sends a signal for starting detection of the predetermined pattern to the first CPU. The first CPU thereby receives a detection signal from a photo sensor. The second CPU further conveys the recording paper, and at a timing of exhausting out of the apparatus, sends a signal for the detection end of the predetermined pattern to the first CPU.

Abstract: An image forming apparatus has an image scanner, a sensor for determining that the image sensor has scanned the front edge of a document, and a controller using main scanning line synchronizing signals and an output signal of the sensor as reference signals. In response to the reference signals, the controller causes at least a writing unit to start writing each image data of particular color and causes a transfer medium driving circuit to start driving a transfer medium. The apparatus allows image components of different colors to be transferred to the transfer medium one above the other in accurate registration.

Abstract: A raster output scanner is capable of creating images at a wide range of selectable resolutions. A laser source for creating an image is modulated at a pixel clock rate. A clock command value is determined as a function of a value related to the pixel clock rate and a value related to a desired resolution in the fast-scan direction and a desired resolution in the slow-scan direction of an image to be created on the photosensitive surface. The pixel clock rate is controlled in response to the clock command value. A polygon command value is determined as a function of the value related to the pixel clock rate, a value related to a desired resolution in the fast-scan direction of an image to be created on the photosensitive surface, and a value related to a rotational velocity of the polygon mirror. The rotational velocity of the polygon mirror is controlled in response to the polygon command value.

Abstract: A highly accurate and stable, but continuous fixed-phase fixed-frequency, quartz crystal oscillator frequency source, typically of 80 Mhz frequency, is used as the primary frequency standard for (i) synchronized, and (ii) variable, pixel placement timing in a bee-scanning image generator. A fixed-frequency timing chain appropriately synchronized to the scanning energy beam is generated by selecting, in accordance with a sensed start-of-scan condition, from among a number, typically 23, of variably-phase-delayed, typically by less than 1 nanosecond and normally by 0.8 nanosecond, replications of a fixed-phase timing chain that is produced from the crystal oscillator. The synchronized fixed-frequency timing chain so derived is then converted to the required variable-frequency pixel placement timing chain by timing-data-driven recombination of variably-phase-delayed replications, typically 13 such replications at a delay of 1.

Abstract: A reliable, low cost system for generating precisely aligned pixel clock and index signals for a digital scanning or printing system is based on a novel single channel encoder pattern detected with a single sensor. The signal output of the sensor representing the encoder pattern is processed with phase locked loop based circuit to generate pixel clock and index signals of known and guaranteed phase.

Abstract: A method of making a two-dimensional exposure on an object with a plurality of light beams by a main scan for making scans with the light beams in one direction and a sub-scan for making scans with the light beams in a direction intersecting the direction of the main scan. In a distance detecting step, a distance between a portion exposed to at least one of the plurality of light beams and a portion exposed to respective other light beams is detected when respective the plurality of light beams are exposed toward an object. In an exposure start-timing changing step, the timing for starting an exposure to be effected by at least one of the main scan and sub-scan made with respective the plurality of light beams is changed according to the distance in such a manner that the positions of the portions exposed to the plurality of light beams are substantially identical.

Abstract: A method and apparatus is described for eliminating banding, misregistration and bowing by controlling a composite light intensity profile and phase shifting of a spatial location at which the composite light intensity profile crosses a xerographic threshold in a two dimensional high addressability printer operating in an overscan mode. The contrast, pitch grating and phase shifting are dependent on at least one of a predetermined amount of overlap, an exposure profile and an intensity value of each of the plurality of laser beam spots formed on the photosensitive medium of a two dimensional high addressability printer.