Abstract: A method of an aspect includes acquiring analog image data with a pixel array, and reading out the analog image data from the pixel array. The analog image data is converted to digital image data by performing an analog-to-digital (A/D) conversion using a multiple slope voltage ramp. At least some of the digital image data is adjusted with calibration data. Other methods, apparatus, and systems, are also disclosed.

Abstract: An imaging element includes: an imaging unit in which a plurality of pixel groups including a plurality of pixels that output pixel signals according to incident light are formed, and on which incident light corresponding to mutually different pieces of image information is incident; a control unit that controls, for each of the pixel groups, a period of accumulating in the plurality of pixels included in the pixel group; and a readout unit that is provided to each of the pixel groups, and reads out the pixel signals from the plurality of pixels included in the pixel group.

Abstract: Provided is a solid-state imaging apparatus that is capable of preventing a harmful influence due to noise generated in a control line. The solid-state imaging apparatus includes: a plurality of pixels each including a photoelectric conversion unit for photoelectric converting to generate a signal; control lines for supplying control signals for driving the pixels; driving buffers for driving the control lines; and switching units for switching between a first path for supplying power source voltages from power source circuits to power source terminals of the driving buffers and a second path for supplying power source voltages from capacitors to the power source terminals of the driving buffers.

Abstract: A solid-state imaging apparatus comprising a plurality of pixels generating a photoelectric conversion signal, a column amplifying unit corresponding to columns of the pixels, for outputting a first and second signals generated by amplifying the photoelectric conversion signal at a smaller first gain and larger second gain respectively, an analog to digital converter (21) for converting the first and second signals from an analog signal to a digital signal, a comparing unit (224) for inputting the digital signal from the analog to digital converter, level-shifting into the same gain level the first and second signals converted by the analog to digital converter, and thereafter detecting a gain error between the level-shifted first and second signals, and a correction unit (226) for correcting the first and second signals based on the gain error.

Abstract: A signal for focus detection is generated by a first operation, in which a signal of at least one photoelectric conversion element included in a photoelectric conversion unit is read to an input node of an amplification unit and the signal is supplied to a common output line by the amplification unit and signals for forming an image are generated by a second operation, in which a signal of another photoelectric conversion element included in the same photoelectric conversion unit as that including the at least one photoelectric conversion element from which the signal has been read in the first operation is read to the input node of the amplification unit while holding the signal read in the first operation using the amplification unit and the signals are supplied to the common output line by the amplification unit.

Abstract: A compressive imaging system for optimizing dynamic range during the acquisition of compressed images. A light modulator modulates incident light with spatial patterns to produced modulated light. A light sensing device generates an electrical signal representing intensity of the modulated light over time. The system amplifies a difference between the electrical signal and an adjustable baseline voltage and captures samples of the amplified signal. The adjustable baseline voltage is set to be approximately equal to the average value of the electrical signal. A compressive imaging system for identifying and correcting hot spot(s) in the incident light field. Search patterns are sent to the light modulator and the corresponding samples of the electrical signal are analyzed. Once the hot spot is located, the light modulating elements corresponding to the hot spot may be turned off or their duty cycle may be reduced.

Abstract: A solid-state imaging device and a camera system are disclosed. The solid-state imaging device includes a pixel unit and a pixel signal readout circuit. The pixel signal readout circuit includes a plurality of comparators disposed to correspond to a pixel column array, and a plurality of counters. Each counter includes a first amplifier, a second amplifier, and a mirror circuit to from a current mirror in parallel with the second amplifier. The first amplifier includes differential transistors, initializing switches connected between gates and collectors of the differential transistors, and first and second capacitors connected to each of the gates of the differential transistors. The second amplifier includes an initializing switch and a third capacitor. The mirror circuit includes a gate input transistor whose gate is inputted with a voltage sampled by the first amplifier or a voltage sampled by the second amplifier.

Abstract: In an image sensor including a first column readout line and a second column readout line provided to each pixel column, a plurality of pixel rows are divided into pixel rows of a first group and pixel rows of a second group, pixels of the pixel rows of the first group output signals to the first column readout line, and pixels of the pixel rows of the second group output signals to the second column readout line. A shortest distance between a conversion region of a first pixel of a pixel row of the first group and the first column readout line to which a signal from the first pixel is output is not more than a shortest distance between the conversion region of the first pixel and the second column readout line to which signals from the pixels belonging to the pixel rows of the second group are output.

Abstract: An image pickup apparatus includes pixels each including a photoelectric conversion unit, an amplifying element, a first signal holding unit and a second signal holding unit both disposed in an electric path between the photoelectric conversion unit and an input node of the amplifying element, a first charge transfer unit configured to transfer electrons from the photoelectric conversion unit to the first signal holding unit, and a second charge transfer unit configured to transfer electrons from the first signal holding unit to the second signal holding unit. Voltage are set such that a voltage supplied to the first control electrode when the electrons are transferred from the photoelectric conversion unit to the first signal holding unit is lower than a voltage supplied to the second control electrode when the electrons held by the first signal holding unit are transferred to the second signal holding unit.

Abstract: An image sensor may include an image pixel array. The image sensor may be provided with automatic conversion gain selection on a pixel-by-pixel basis to produce a high-dynamic-range image. Each image pixel may include a capacitor and a conversion gain transistor coupled in series between a power supply line and a floating diffusion node. The conversion gain transistor may be coupled to a control line through a gating transistor. The gating transistor may have a gate connected to a row select line. The image pixel may have an output line that is coupled to a column amplifier and a comparator. The column amplifier may generate a difference voltage based on reset and image signals. The comparator may compare the difference voltage with a predetermined threshold to determine whether to place the selected pixel in a high or low conversion gain mode.

Abstract: A measuring device for measuring a response speed of a display panel is provided. The measuring device includes a microcontroller and at least one photo sensor. The microcontroller provides a control command, according to which a display controller of the display panel provides test pattern to the display panel. The photo sensor senses a test frame displayed corresponding to the test pattern by the display panel, and provides a corresponding sensing signal associated with brightness and a response signal. According to the response signal, the response speed of the display panel is calculated.

Abstract: Provided is an image sensor capable of supporting a high speed operation. The image sensor includes a plurality of sampling units sampling a pixel signal to output a sampled signal pair; an auxiliary amplification unit amplifying a signal of the sampled signal pair; and an amplification unit sensing a differential signal pair transmitted through the auxiliary amplification unit to generate output data.

Abstract: A solid-state image pickup device and a camera system in which: (1) counters are organized into a counter group and a memory group on a column-by-column basis; (2) in each column, the individual counters are cascade-connected between individual bits; (3) switches are provided at bit output portions of the individual counters; (4) connecting sides of the individual switches are commonly connected to a column-signal transfer line, and output sides of the switches are shared with the other individual bits; (5) inputs of memories (latch circuits), which store digital data for horizontal transfer, share the column-signal transfer line; and (6) outputs of the memories corresponding to the individual bits are connected via switches to data transfer signal lines wired so as to be orthogonal to the column-signal transfer line.

Abstract: An image pickup device which makes it possible to expand the dynamic range of photometry. The image pickup device comprises a pixel array, a pixel reader, a row selector, a column selector, a gain circuit, a gain selector. The pixel array comprises a plurality of pixels including photoelectric conversion elements and arranged in the horizontal direction and in the vertical direction. The pixel reader reads out selected pixel signals from the pixel array. The gain circuit is capable of having at least two gains set therein, and amplifies and outputs the pixel signals read out from the pixel array by the pixel reader. The gain selector sets different gains in the gain circuit such that pixel signals amplified by the different gains can be obtained for one-time read-out from the pixel array by the pixel reader.

Abstract: A method and a device having amplification and noise reduction capabilities, the device may include (a) an amplifier; (b) an input circuit that includes multiple sampling circuits, (c) an error capacitor that is arranged to be charged by the amplifier, during a noise integration period, to an error voltage that is indicative of noise generated as a result of a sampling of first and second signals; and (d) a feedback circuit that is arranged to provide to the second input of the amplifier and in proximity to a beginning of second phase of operation, a feedback signal that represents the error voltage and thereby at least partially compensate for the noise.

Abstract: The present invention discloses a device of CMOS image sensor, exactly, relates to a kind of CMOS charge pump circuit. The invention compromises: two current mirrors and two operational amplifiers are added into the CMOS charge pump circuit. The feed-through current is suppressed when signal switches in the said circuit. It solved the problem of the big voltage jump of the output voltage when the logic signal switches. It guarantees the stabilities of the circuit and the output voltage.

Abstract: A solid-state image sensor has a plurality of pixel units, each pixel unit including a plurality of pixels, and a charge-voltage converter shared by the plurality of pixels. The sensor includes a structural portion including a plurality of wiring layers, an interlayer insulating film, and light waveguides configured by embedding, in portions of the interlayer insulating film located above the photoelectric converters, a material having a refractive index higher than that of the interlayer insulating film. A dummy pattern is formed in the structural portion to reduce a difference between a sensitivity of a first pixel and that of a second pixel, which is produced by a difference between a structure in a periphery of the light waveguide arranged above the photoelectric converter of the first pixel and that of the second pixel.

Abstract: According to one embodiment, a solid-state imaging device includes a pixel array unit where pixels are disposed in a matrix and a column amplifying circuit that is disposed at an end of the pixel array unit and amplifies a unit signal of a unit pixel read from each pixel with at least first and second amplification factors, and outputs a plurality of amplified signals.

Abstract: According to one embodiment, a pixel that outputs a photoelectrically-converted pixel signal, a column ADC circuit that converts the pixel signal output from the pixel into a digital value, a test-signal generating unit that generates a test signal with which the column ADC circuit is tested, and a switching circuit that switches between the pixel signal output from the pixel and the test signal generated in the test-signal generating unit to input to the column ADC circuit are included.

Abstract: In an image capture mode, a noise reading operation and image signal reading operation are used. In a photometric operation mode, the image signal reading operation is used.

Abstract: A solid-state imaging device and a camera system are disclosed. The solid-state imaging device includes a pixel unit and a pixel signal readout circuit. The pixel signal readout circuit includes a plurality of comparators disposed to correspond to a pixel column array, and a plurality of counters. Each counter includes a first amplifier, a second amplifier, and a mirror circuit to from a current mirror in parallel with the second amplifier. The first amplifier includes differential transistors, initializing switches connected between gates and collectors of the differential transistors, and first and second capacitors connected to each of the gates of the differential transistors. The second amplifier includes an initializing switch and a third capacitor. The mirror circuit includes a gate input transistor whose gate is inputted with a voltage sampled by the first amplifier or a voltage sampled by the second amplifier.

Abstract: This technique relates to a receiving device, a receiving method, and a program that can demodulate transmitted signals with high accuracy. A receiving device of this disclosure includes: an amplifying unit that amplifies a received signal; an adjusting unit that adjusts gain of the amplifying unit in accordance with power of the signal; a demodulating unit that demodulates the amplified signal; and a detecting unit that detects an interval from the signal, information having the same content continuously appearing in the interval. The adjusting unit restricts the process of adjusting the gain of the amplifying unit in accordance with a result of the detection of the interval. This disclosure can be applied to receiving devices that receive broadcast signals compliant with DVB-C2 via a CATV network.

Abstract: A data processing device includes a clock converter, a data converter, and an error detector. The clock converter is configured to receive a first clock signal, convert the first clock signal into a second clock signal, and output the second clock signal. The data converter is configured to receive first data, convert the first data into second data using the second clock signal, and output the second data. The error detector is configured to check whether the first clock signal is in a first clock state or a second clock state upon the first data transitioning to a first data state, and output an enable signal to the clock converter upon determining that the first clock signal has transitioned to the first clock state from the second clock state.

Abstract: There is provided a solid-state image sensor including a pixel array unit in which pixels are arrayed, the pixel including a photodiode converting an optical signal into an electrical signal, and a readout unit which reads out an analog image signal from the pixel to a signal line and processes the read out analog pixel signal in a unit of column. The readout unit includes a ?? modulator which has a function to convert the analog pixel signal in to a digital signal, and an amplifier which is arranged on an input side of the ?? modulator and amplifies the analog pixel signal read out to the signal line using a set gain to input the signal to the ?? modulator.

Abstract: A booster circuit including an output terminal; a reference voltage generating section that generates a boosting reference voltage; a charge pump section that boosts the reference voltage and outputs the boosted reference voltage from the output terminal; and an output-terminal voltage holding section that holds the output terminal at a voltage of a high level at a standby time. The charge pump section includes an input node, at least one boosting node, at least one reference node, at least one boosting capacitor, and a plurality of switching transistors that are provided between the input node and the at least one boosting node, between a boosting node at a last stage and the output terminal, between the input node and the reference node, and between a reference potential and a reference node, and are switched on or off by a switch signal.

Abstract: A solid-state imaging device including: a plurality of pixels which are on a same semiconductor substrate and each of which generates a pixel signal; a comparison circuit that is connected to the pixels in each of columns; a D/A conversion circuit that generates a comparison potential and provide the generated comparison potential in common to the comparison circuit in each column; and a D/A conversion circuit output unit provided in a common line for providing the comparison potential to the comparison circuit in each column, wherein the D/A conversion circuit output unit includes: a source follower circuit that is provided to the line and includes a first current source having a transistor, and an amplification transistor having a gate oxide film that is thinner than a gate oxide film of the transistor; and a voltage control circuit that controls a drain-to-source voltage of the amplification transistor.

Abstract: A solid-state imaging apparatus has a pixel array in which a plurality of pixels are arranged to form a plurality of rows and a plurality of columns, and a plurality of column signal lines are arranged, wherein each of the plurality of pixels includes a photoelectric converter including a first well formed in a semiconductor substrate and having a first conductivity type, and an impurity region arranged in the first well and having a second conductivity type different from the first conductivity type, and an in-pixel readout circuit which outputs, to the column signal line, a signal corresponding to charges generated in the photoelectric converter, the in-pixel readout circuit including a circuit element arranged in a second well having the first conductivity type, and wherein the first well and the second well are isolated by a semiconductor region having the second conductivity type.

Abstract: A solid-state imaging device including a semiconductor substrate; plural photoelectric conversion units formed side by side on the semiconductor substrate to form a light receiving unit; a peripheral circuit formed in a portion on an outside of the light receiving unit on the semiconductor substrate; a wiring section formed on the light receiving unit and formed for connecting the plural photoelectric conversion units and the peripheral circuit; and a dummy wiring section formed on an opposite side of the wiring section for at least one photoelectric conversion unit among the plural photoelectric conversion units on the light receiving unit and formed for functioning as a non-connected wiring section not connected to the photoelectric conversion units and the peripheral circuit, wherein the dummy wiring section has a predetermined potential.

Abstract: A solid-state imaging device includes a pixel array unit having a plurality of pixels arranged in a matrix form which perform a photoelectric conversion, a pixel signal readout unit having a logic unit and performing a readout of a pixel signal from the pixel array unit, a regulator, a first circuit section, a second circuit section, and a stacked structure in which the first and second circuit sections are bonded, wherein the first circuit section has the pixel array unit disposed therein, and wherein the second circuit section has at least the logic unit and the regulator disposed therein, wherein the regulator includes a reference voltage generation, a plurality of output stage transistors, and an operational amplifier comparing the reference voltage and a commonized output voltage, and an output path of the output stage transistors are connected to a single node, and then is fed back to the operational amplifier.

Abstract: A signal for focus detection is generated by a first operation, in which a signal of at least one photoelectric conversion element included in a photoelectric conversion unit is read to an input node of an amplification unit and the signal is supplied to a common output line by the amplification unit and signals for forming an image are generated by a second operation, in which a signal of another photoelectric conversion element included in the same photoelectric conversion unit as that including the at least one photoelectric conversion element from which the signal has been read in the first operation is read to the input node of the amplification unit while holding the signal read in the first operation using the amplification unit and the signals are supplied to the common output line by the amplification unit.

Abstract: In a solid-state imaging device, an amplification transistor amplifies a signal generated by a photoelectric conversion unit and outputs the amplified signal. An analog memory accumulates the amplified signal output from the amplification transistor. A select transistor electrically connects the analog memory to a vertical signal line and selects any one of a first state in which the amplified signal accumulated in the analog memory is output to the vertical signal line and a second state in which the analog memory is electrically disconnected from the vertical signal line. A differential amplification circuit includes a first input terminal connected to a reference voltage and a second input terminal connected to the vertical signal line.

Abstract: A method of reducing column fixed pattern noise including calibrating a readout circuit, wherein the readout circuit is electrically connected to at least one programmable gain amplifier and an analog-to-digital converter. Calibrating the readout circuit includes electrically disconnecting the readout circuit from a pixel output and electrically connecting a pixel reset input of the readout circuit to a pixel output signal input of the readout circuit. Calibrating the readout circuit further includes comparing a measured output of the readout circuit to a predetermined value and storing the comparison result in a non-transitory computer readable medium. The method further includes operating the readout circuit, the operating the readout circuit includes receiving a pixel sample signal and outputting a calibrated output based on an operating output and the stored comparison result.

Abstract: A solid-state image pickup device including a pixel section arranged with multiple pixel circuits in matrix having functions for converting an optical signal to an electrical signal and for accumulating the electrical signal depending on an exposure time, and a pixel driving section capable of driving through a control line to reset, accumulate, transfer, and output signal electric charge of the pixel section. The pixel section may have a pixel shared structure arranged with one selection control line, one reset control line, and multiple transfer control lines, including a readout-pixel section and an unread-pixel section in its entirety. The pixel driving section includes a pixel control section where an unread-pixel is normally fixed in a reset state. When reading a readout-pixel in a shared relationship, if its address is selected or a selection signal becomes active, the unread-pixel reset-state is cancelled to turn into an unread state.

Abstract: An embodiment of the present invention provides a method for digital television demodulation, comprising using adjacent-channel power dependent automatic gain control (AGC) for the digital television demodulation, wherein an AGC technique takes into account a total power as well as power of adjacent channels to control gain of a gain control amplifier.

Abstract: An amplifying/digitizing circuit with a signal amplifying capability and a comparator capability is provided. The amplifying/digitizing circuit includes an amplifier having an input end and an output end, and a control circuit. The control circuit is coupled to the input end and the output end of the amplifier. When the amplifying/digitizing circuit is operated under an amplifying mode, the control circuit has a first configuration to receive a first input signal and makes the amplifier generate an output voltage at the output end according to the first input signal and an amplification factor. When the amplifying/digitizing circuit is operated under an ADC mode, the control circuit has a second configuration to receive a second input signal and makes the amplifier generate a comparison result according to the second input signal and the output voltage.

Abstract: A piecewise linear processing device applies different amplification rates according to a general environment and a low luminance environment where much noise exists. The piecewise linear processing device includes a knee point storing unit configured to store a user's default setting value and low luminance setting value; a luminance detecting unit configured to detect a noisy environment to output a current luminance information signal and a maximum luminance information signal; an adaptive knee point supply unit configured to receive the default setting value, the low luminance setting value, the current luminance information signal, and the maximum luminance information signal to supply a adjusted adaptive knee point according to a degree of noise; and a piecewise linear processing unit configured to apply a section amplification rate to an input data on the basis of a region corresponding to the adaptive knee point.

Abstract: In a signal processing device of an embodiment, an integration circuit accumulates a charge from a photodiode in an integrating capacitor element, and outputs a voltage value according to the amount of charge. A comparator circuit, when the voltage value from the integration circuit has reached a reference value, outputs a saturation signal. A charge injection circuit, in response to the saturation signal, injects an opposite polarity of charge into the integrating capacitor element. A counter circuit performs counting based on the saturation signal. A holding circuit holds the voltage value from the integration circuit. An amplifier circuit outputs a voltage value that is K times (where K>1) larger than the voltage value held by the holding circuit. An A/D converter circuit sets a voltage value that is K times larger than the reference value as the maximum input voltage value, that is, a full-scale value, and outputs a digital value corresponding to the voltage value from the amplifier circuit.

Abstract: A signal reading apparatus includes first and second common signal lines from which a signal from a signal generation unit is output and first and second amplifier circuits and a switch configured to control a conductive state of the first and the second common signal lines. The signal reading apparatus includes a first signal reading method of reading a signal from the first common signal line after being amplified in the first amplifier circuit and reading a signal from the second common signal line after being amplified in the second amplifier circuit and a second signal reading method of turning ON the switch to read the signal from the first common signal line and the signal from the second common signal line individually after being amplified in the first amplifier circuit. The signal reading apparatus includes a control unit for controlling between the first and second signal reading methods.

Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.

Abstract: An image sensor comprises a pixel array formed by arraying pixels in a column direction and a row direction; a column common readout unit provided for each pixel column in the pixel array; at least three readout channels which sequentially read signals from the column common readout units, respectively; and a readout channel selection unit which selects readout channels so that the signal is output from each of the column common readout units to a corresponding one of the at least three readout channels, wherein the readout channel selection unit selects readout channels, to which the signals are output from the column common readout units, in a predetermined pattern that varies in each individual row of the pixel array.

Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.

Abstract: Disclosed herein is a solid-state image pickup element, including: a photoelectric conversion region; a transistor; an isolation region of a first conductivity type configured to isolate the photoelectric conversion region and the transistor from each other; a well region of the first conductivity type having the photoelectric conversion region, the transistor, and the isolation region of the first conductivity type formed therein; a contact portion configured to supply an electric potential used to fix the well region to a given electric potential; and an impurity region of the first conductivity type formed so as to extend in a depth direction from a surface of the isolation region of the first conductivity type in the isolation region of the first conductivity type between the contact portion and the photoelectric conversion region, and having a sufficiently higher impurity concentration than that of the isolation region of the first conductivity type.

Abstract: A solid-state imaging apparatus of a dynamic range enlarged by reading out a carrier accumulated in a carrier accumulation unit at a plurality of times during a single carrier accumulation time period.

Abstract: A solid-state image pickup device includes a pixel array unit that includes photoelectric conversion elements and in which a plurality of pixels are arranged in rows and columns that output, as pixel signals, electrical signals obtained by photoelectric conversion performed by amplifier elements to which pixel power supply voltage is supplied and that drive signal lines, a pixel power supply unit that generates the pixel power supply voltage from power supply voltage, the pixel power supply voltage being lower than the power supply voltage, and that supplies the pixel power supply voltage to the amplifier elements in the plurality of pixels, and a pixel signal read unit that reads pixel signals from the plurality of pixels.

Abstract: A horizontal scanning period is divided into n parts (n is a natural number), so that horizontal scanning can be performed (n×y) times in one frame period. That is, n signals can be outputted from each pixel, and storage times of the n signals are different from one another. Then, since a signal suited to the intensity of light irradiated to each pixel can be selected, information of an object can be accurately read.

Abstract: A signal for focus detection is generated by a first operation, in which a signal of at least one photoelectric conversion element included in a photoelectric conversion unit is read to an input node of an amplification unit and the signal is supplied to a common output line by the amplification unit and signals for forming an image are generated by a second operation, in which a signal of another photoelectric conversion element included in the same photoelectric conversion unit as that including the at least one photoelectric conversion element from which the signal has been read in the first operation is read to the input node of the amplification unit while holding the signal read in the first operation using the amplification unit and the signals are supplied to the common output line by the amplification unit.

Abstract: A photoelectric conversion device includes analog signal output units including pixels and configured to output analog signals based on pixels, and signal processing units. Each of the signal processing units is provided correspondingly to one of the analog signal output units and including a gain application unit configured to apply a gain to an analog signal by using only passive elements and an AD conversion unit. In the gain application unit, a portion that contributes to application of a gain to the analog signal is constituted only of passive elements. The gain application unit selectively outputs a first amplified signal obtained by applying a first gain to the analog signal or a second amplified signal obtained by applying a second gain to the analog signal smaller than the first gain. The AD conversion unit converts, from analog to digital, the first or second amplified signal.

Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

Abstract: An analog signal chain for a CMOS active pixel sensor imaging system utilizes, for each amplification stage, a plurality of fixed gain amplifiers instead of a single multi-gain amplifier. The fixed gain amplifier corresponding to the desired gain level is selected and powered on and coupled to the input/output signal paths, while the non-selected fixed gain amplifier(s) are powered off and isolated from the input/output signal paths. Each fixed gain amplifier is operated at a gain bandwidth corresponding to the timing requirements of the imaging system and the gain of the amplifier. Thus, each fixed gain amplifier (other than the one corresponding to the maximum gain of a comparable multi-gain amplifier) operates at a lower level of power consumption than the comparable multi-gain amplifier.

Abstract: Disclosed herein is a comparator including: a first input sampling capacitance; a second input sampling capacitance; an output node; a transconductance (Gm) amplifier as a differential comparator section configured to receive a slope signal, a signal level of the slope signal changing with a slope, at one input terminal of the Gm amplifier via the first input sampling capacitance, and receive an input signal at another input terminal of the Gm amplifier via the second input sampling capacitance, and subject the slope signal and the input signal to comparing operation; and an isolator configured to hold a voltage of an output section of the Gm amplifier constant, the isolator being disposed between the output section of the Gm amplifier and the output node.