Abstract: A solid-state imaging device includes a pixel array unit having a plurality of pixels arranged in a matrix form which perform a photoelectric conversion, a pixel signal readout unit having a logic unit and performing a readout of a pixel signal from the pixel array unit, a regulator, a first chip, a second chip, and a stacked structure in which both the first chip and the second chip are bonded, wherein the first chip has the pixel array unit disposed therein, and wherein the second chip has at least the logic unit and the regulator disposed therein, wherein the regulator includes a reference voltage generation, a plurality of output stage transistors, and an operational amplifier comparing the reference voltage and a commonized output voltage, and an output path of the output stage transistors are connected to a single node, and then is fed back to the operational amplifier.

Abstract: In a solid-state imaging device and an imaging device, transistors on a first substrate are configured as N-type transistors. Of transistors on a second substrate, a sampling transistor and an analog memory reset transistor connected to an analog memory are configured as P-type transistors. A difference between the potential of back gates of the sampling transistor and the analog memory reset transistor and a potential at the time of resetting the analog memory is less than a difference between the potential of a back gate of the N-type transistor and the potential at the time of resetting the analog memory.

Abstract: An image pickup apparatus for photographing an image, includes: a photoelectric converter to convert incident light an electric charge and accumulate the electric charge, a transfer element to transfer the electric charge accumulated in the photoelectric converter, a converter to convert the electric charge in the photoelectric converter transferred via the transfer element into a voltage, a reset element to reset potentials of the converter, and an amplifier to amplify a voltage converted by the converter to generate a pixel signal and output the pixel signal to a read signal line for reading the pixel signal. A plurality of the photoelectric converter and the transfer element are disposed at least in a horizontal direction share the amplifier and the read signal line.

Abstract: A solid-state imaging device includes unit pixels arranged in rows and columns, and reads a pixel signal from the unit pixels selected for each of the rows. The device includes: column signal lines provided for the columns of the unit pixels; amplifying transistors included in the unit pixels and each outputting the pixel signal; correlated double sampling units provided for the columns of the unit pixels and each performing correlated double sampling on a reset component of the pixel signal and on a data component including the reset component and a signal component of the pixel signal so as to sample the signal component; and low-pass filters each (i) inserted in the column signal line between an output terminal of the amplifying transistor and the correlated double sampling unit or (ii) included in the correlated double sampling unit.

Abstract: A module for high speed image processing includes an image sensor for generating a plurality of analog outputs representing an image and a plurality of HDDs for concurrently processing the plurality of analog outputs. Each HDD is an integrated circuit configured to process in parallel a predetermined set of the analog outputs. Each channel of the HDD can include an AFE for conditioning a signal representing one sensor analog output, an ADC for converting a conditioned signal into a digital signal, and a data formatting block for calibrations and formatting the digital signal for transport to an off-chip device. The HDDs and drive electronics are combined with the image sensor into one package to optimize signal integrity and high dynamic range, and to achieve high data rates through use of synchronized HDD channels. Combining multiple modules results in a highly scalable imaging subsystem optimized for inspection and metrology applications.

Abstract: A solid-state imaging device includes a plurality of pixel cells arranged in rows and columns, a plurality of vertical signal lines each of which is provided for a corresponding one of the columns, and a plurality of column circuits each of which is provided for a corresponding one or more of the columns and into each of which are input the signal voltages output to one or more of the vertical signal lines disposed in the corresponding one or more of the columns. Each of the plurality of column circuits includes an amplifier that includes a constant current source transistor, the solid-state imaging device further includes a reference current source circuit that supplies a first bias voltage to gates of a plurality of the constant current source transistors included in the column circuits, and each of the column circuits further includes a sample-and-hold circuit that holds the first bias voltage.

Abstract: An image pickup device may include an image pickup unit in which unit pixels having photoelectric conversion elements are arranged, the unit pixels outputting pixel signals, a reference signal generation unit, a comparison unit that includes a differential amplifier unit and a reset unit, the differential amplifier unit comparing a voltage of the first input terminal to a voltage of the second input terminal, a measurement unit that measures a comparison time of the comparison unit from a comparison start to a comparison end, and a change unit that changes the voltage of the first input terminal so that a voltage difference between the first input terminal and the second input terminal is set to a voltage at which a comparison operation by the comparison unit is ensured after a reset operation by the reset unit.

Abstract: A solid-state imaging device having a backside illuminated structure, includes: a pixel region in which pixels each having a photoelectric conversion portion and a plurality of pixel transistors are arranged in a two-dimensional matrix; an element isolation region isolating the pixels which is provided in the pixel region and which includes a semiconductor layer provided in a trench by an epitaxial growth; and a light receiving surface at a rear surface side of a semiconductor substrate which is opposite to a multilayer wiring layer.

Abstract: A solid-state imaging device according to an embodiment of the present invention includes plural pixels, in which each pixel includes: a transfer transistor that transfers electric charge from a photoelectric conversion section to a floating diffusion section; a reset transistor that resets the floating diffusion section; a amplifying transistor that outputs a signal based on the electric charge held by the floating diffusion section; a selection transistor that is provided at the output side of the amplifying transistor and selects a pixel; and a charge storage capacitor that is provided between the amplifying transistor and the selection transistor and stores the quantity of electric charge on the basis the quantity of the electric charge held by the floating diffusion section through the charge-discharge behavior of electric charge through a current source.

Abstract: A solid-state image pickup device includes a plurality of common output lines receiving signals from a plurality of pixels, a plurality of column amplifier units amplifying the signals, a plurality of storage capacitors storing the amplified signals, a first transistor controlling electrical conduction between the output node of the column amplifier unit and the input node of a storage capacitor, a switch switching current for operating the column amplifier unit between a first current and a second current smaller than the first current, and a controller inhibiting, while the second current is flowing through the column amplifier unit, a potential at the output node of the column amplifier unit from approaching an off-state voltage supplied to a gate of the first transistor in an OFF state of the first transistor.

Abstract: A method of an aspect includes acquiring analog image data with a pixel array, and reading out the analog image data from the pixel array. The analog image data is converted to digital image data by performing an analog-to-digital (A/D) conversion using a multiple slope voltage ramp. At least some of the digital image data is adjusted with calibration data. Other methods, apparatus, and systems, are also disclosed.

Abstract: An image sensor includes a plurality of pixel cells organized into rows and columns of a pixel array. A bit line is coupled to each of the pixel cells within a line of the pixel array. Readout circuitry is coupled to the bit line to readout the image data from the pixel cells within the line. The readout circuitry includes a line amplifier coupled to the bit line to amplify the image data and first and second sample and convert circuits coupled in parallel to an output of the line amplifier to reciprocally and contemporaneously sample the image data and convert the image data from analog values to digital values.

Abstract: The present invention provides an image capturing apparatus, which comprises a plurality of photoelectric converter-containing pixels that are positioned horizontally and vertically and a gain circuit, has a gain controller that can control the gain of the gain circuit in N stages (where N is an integer equal to or greater than 2). The gain circuit outputs each of a plurality of signals given by the product of the output signal from one of the plurality of pixels and the gain in each stage of the N stages.

Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.

Abstract: An imaging apparatus includes: a plurality of column amplifiers, each outputting, based on the same one pixel, first and second pixel signals derived by amplifying the signal by different amplifying factors p and q; a plurality of column A/D converters for performing analog to digital conversion of the first and second pixel signals obtained; a plurality of replacing units, each selecting the first pixel signal converted by the corresponding column A/D converter when the first pixel signal converted by the corresponding column A/D converter is smaller than a threshold value, and selecting the second pixel signal converted by the corresponding column A/D converter when the first pixel signal converted by the corresponding column A/D converter is equal to or larger than the threshold value; and a horizontal scanning circuit for successively selecting the first or second pixel signals selected by the replacing units.

Abstract: An image sensor comprises a pixel array having a plurality of pixel regions, wherein the pixel array is adapted to generate at least one signal from each pixel region and a separate signal from a subset of pixels within each pixel region, both during a single exposure period. In one embodiment, the sensor is in communication with a shift register which accumulates the separate signal and transfers the separate signal to an amplifier. The shift register further accumulates the at least one signal from the pixel region after the separate signal has been transferred to the amplifier and transfers the at least one signal to the amplifier.

Abstract: A solid-state imaging apparatus includes: an amplifier circuit configured to amplify a signal from pixel; and a reference signal generating circuit configured to generate a ramp signal, wherein feedback capacitor elements having the same structure are electrically connected to a capacitive feedback type amplifier of the amplifier circuit and to a capacitive feedback type amplifier of the reference signal generating circuit respectively, and a connecting configuration between an amplifier of the amplifier circuit and the feedback capacitor element and a connecting configuration between an amplifier of the reference signal generating circuit and the feedback capacitor element are the same.

Abstract: A pre-amplifier (column region unit) of a solid-state imaging device including a pixel-signal controller. The pixel-signal controller, for each vertical signal line, detects the level of each pixel signal independently by a pixel-signal detector on the output side of a pixel-signal amplifier, and sets a gain independently to the pixel-signal amplifier according to the level of the signal. At a subsequent stage of the solid-state imaging device, an analog-to-digital (A/D) converter and a signal extending unit are provided. The A/D converter digitizes a pixel signal, and the digitized pixel signal is corrected by a gain set to the pixel-signal amplifier with reference to a classification signal from the pixel-signal detector, so that the dynamic range of signals of one screen is extended.

Abstract: A CMOS image sensor allows for selectively outputting one of two vertical resolutions, e.g. 1080 to 720 lines. The scan conversion is implemented completely on the image sensor chip by using smaller sub-pixel cores, which can be electrically combined via switch transistors. A basic circuit of the CMOS image sensor has a number of pixel cells arranged in lines and columns. Each pixel cell has a photosensitive element that converts impinging light into electric charge and a first transfer element. The first transfer elements of m pixel cells arranged consecutively in the same column are arranged for transferring the charge generated in the respective m photosensitive elements during exposure to a single first charge storage element provided for the respective group of m pixel cells. In an exemplary embodiment the switching scheme allows for combining the signal information of either two or three vertically adjacent sub-pixel cores.

Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion element provided on the light incidence side of the substrate and including a photoelectric conversion film sandwiched between a first electrode provided separately for each of pixels, and a second electrode provided opposite the first electrode, the photoelectric conversion film being made of an organic material or an inorganic material and generating a signal charge according to the quantity of incident light, an amplifier transistor having an amplifier gate electrode connected to the first electrode, and a voltage control circuit that is connected to the second electrode, and supplies a desired voltage to the second electrode.

Abstract: A data transfer circuit includes a plurality of data transfer sections which transfer pixel signals of pixel columns which are different from each other, wherein the plurality of data transfer sections include transfer lines which transfer the pixel signals read from the pixel columns of an image sensor; and amplifying sections which amplify the pixel signals output from the transfer lines, and wherein the plurality of data transfer sections are connected to each other in series.

Abstract: An image sensor comprises: a pixel unit array; a driving unit; a second holding block; a first output amplifier; and a second output amplifier, each column of the pixel unit array including a plurality of first pixel units and a plurality of second pixel units, wherein the driving unit drives the pixel unit array to parallel-perform, on each column of the pixel unit array, an operation to transfer signals from the first pixel units to the first holding block via the first vertical output line, and an operation to transfer signals from the second pixel units to the second holding block via the second vertical output line.

Abstract: A photoelectric conversion device includes a pixel array including a plurality of pixels arranged in a matrix, a plurality of blocks including a plurality of pairs, each of the pairs including a comparator provided correspondingly with a column in the pixel array and a memory provided correspondingly with the comparator, and a block information supply unit configured to supply block information which indicates a location of a block, to the plurality of memories included in the blocks.

Abstract: An apparatus, system, and method are disclosed for a frequency selective imager. In particular, the frequency selective imager includes an array of pixels arranged in a focal plane array. Each pixel includes at least one nanoparticle-sized diameter thermoelectric junction that is formed between nanowires of different compositions. When a nanoparticle-sized diameter thermoelectric junction senses a photon, the nanoparticle-sized diameter thermoelectric junction emits an electrical pulse voltage that is proportional to an energy level of the sensed photon. In one or more embodiments, the frequency selective imager is a frequency selective optical imager that is used to sense photons having optical frequencies. In at least one embodiment, at least one of the nanowires in the frequency selective imager is manufactured from a compound material including Bismuth (Bi) and Tellurium (Te).

Abstract: Disclosed herein is an imaging device including: a pixel unit including a pixel disposed in a plane and a driving unit. The pixel includes an accumulating section configured to detect a physical quantity, and accumulate a charge corresponding to the physical quantity, a transfer section configured to transfer the charge from the accumulating section, a converting section configured to convert the charge into a voltage, an output section configured to output a signal of the voltage converted by the converting section, a reset section configured to reset the potential of the converting section, and a connecting section connected to the converting section. The driving unit is configured to transfer a signal for giving an instruction to transfer the charge, and a connecting signal for controlling connection and non-connection. The driving unit makes the charge transferred in a state of the converting sections being connected to each other.

Abstract: A solid-state imaging device includes a photodetector which is formed on a substrate and is configured to generate signal charge by photoelectric conversion, a floating diffusion configured to receive the signal charge generated by the photodetector, a plurality of MOS transistors including a transfer transistor that transfers the signal charge to the floating diffusion and an amplification transistor that outputs an pixel signal corresponding to a potential of the floating diffusion, a multi-wiring layer which is formed in a layer higher than the substrate and is composed of a plurality of wiring layers electrically connected to the MOS transistors via contact portions, and a light-shielding film that is constituted by a bottom wiring layer disposed in a layer higher than the substrate and lower than the multi-wiring layer.

Abstract: This application relates to a photoelectric conversion apparatus which performs photoelectric conversion on incident light, a method for driving a photoelectric conversion apparatus, and an imaging system having a photoelectric conversion apparatus. The potential of one main node is prevented from approaching a predetermined potential which controls the voltage between a control node of a switch Metal Oxide Semiconductor (MOS) transistor and the one main node of the switch MOS transistor within a threshold voltage in a period when the predetermined potential is given and a signal based on the charge in the photoelectric converting unit is given to the one input node.

Abstract: A detection apparatus includes a driving circuit unit in which a plurality of unit circuits each including a first circuit that supplies conducting voltage of a switch element of a pixel based on voltage included in a clock signal to a driving wire in accordance with an initiation signal and a second circuit that supplies non-conducting voltage of the switch element to the driving wire in accordance with a termination signal are provided for the plurality of corresponding driving wires and a control unit that supplies the clock signal to the driving circuit unit. The control unit supplies control voltage to the plurality of unit circuits, and each of the plurality of unit circuits further includes a third circuit that continues to supply the non-conducting voltage to the corresponding driving wire in accordance with the control voltage.

Abstract: An apparatus for acquiring an i-bit digital code by a first stage AD conversion and a j-bit digital code by a second stage AD conversion includes a comparing unit which compares a reference signal and an analog signal in the first stage AD conversion; and an amplifying unit for outputting an amplified residual signal acquired by amplifying a difference between the analog signal and an analog signal corresponding to the i-bit digital code. The comparing unit compares the amplified residual signal and the reference signal in the second stage AD conversion.

Abstract: A solid-state imaging device includes a pixel array, control lines TG each provided for a corresponding one of rows of pixels and configured to control, e.g., operation of a transfer transistor, and a driver circuit 103 configured to control the operation of the transfer transistor through the control lines TG and connected to a power-supply line TGL. The solid-state imaging device performs all reset operation for resetting signal charges of all pixels by the driver circuit 103 and reading operation for reading a pixel signal from each row of the pixels. An impedance controller 130 configured to control an impedance value for power-supply line TGL in the reading operation to be less than an impedance value for power-supply line TGL in the all reset operation is provided.

Abstract: A solid-state imaging apparatus capable of suppressing blooming and color mixing includes a plurality of pixels, each including a photoelectric converting portion and a transferring portion for transferring signal electrons from the photoelectric converting portion, wherein a plurality of the photoelectric converting portions is formed in a first conductivity type well region formed on the semiconductor substrate; a second conductivity type first impurity region is arranged between the adjacent photoelectric converting portions; a first conductivity type second impurity region having an impurity concentration higher than that of the well region is arranged between the first impurity region and each of the photoelectric converting portions; and a first conductivity type third impurity region having an impurity concentration higher than that of the well region and decreasing from the semiconductor substrate toward the surface direction of the apparatus between the semiconductor substrate and the first impurity

Abstract: An image pickup apparatus in which a pixel area including arrangement of a plurality of pixels each having a photoelectric conversion portion and a common output portion for sequentially amplifying and outputting signals from the plurality of pixels included in the pixel area are formed on a single semiconductor substrate, comprises a power supply unit for effecting power supply control of the common output portion independently of control on power supply to the pixel area, and a control circuit for effecting control to supply no power to the common output portion in a predetermined period after starting photo charge accumulation in the photoelectric conversion portion and supply the power to the common output portion before the end of a photo charge accumulation period in the photoelectric conversion portion.

Abstract: A solid state imaging device with (a) an amplifier transistor; an input node for the amplifier transistor; or both the amplifier transistor and the input node for the amplifier transistor; (b) a plurality of photoelectric conversion elements; (c) a like plurality of storage transistors, each configured to act as a photo-charge storage node to store charges generated by a respective photoelectric conversion element; and (d) a like plurality of transfer transistors, each configured to transfer charges from a respective photoelectric conversion element to a common output, the common output being either the amplifier transistor or the input node for the amplifier transistor.

Abstract: In an image sensor including a first column readout line and a second column readout line provided to each pixel column, a plurality of pixel rows are divided into pixel rows of a first group and pixel rows of a second group, pixels of the pixel rows of the first group output signals to the first column readout line, and pixels of the pixel rows of the second group output signals to the second column readout line. A shortest distance between a conversion region of a first pixel of a pixel row of the first group and the first column readout line to which a signal from the first pixel is output is not more than a shortest distance between the conversion region of the first pixel and the second column readout line to which the signals from the pixels belonging to the pixel rows of the second group are output.

Abstract: A solid-state imaging device in the present disclosure includes a semiconductor substrate, pixels, and column signal lines. Each of the pixels includes an amplifying transistor, a selection transistor, a reset transistor, and a photoelectric converting unit. The photoelectric converting unit includes a photoelectric converting film, a transparent electrode, a pixel electrode, and an accumulation diode. The pixel electrode and the accumulation diode are connected to a gate of the amplifying transistor. The amplifying transistor has a source connected to the column signal line and a drain connected to a power source line. The reset transistor has a source connected to the pixel electrode. The selective transistor is provided between the source of the amplifying transistor and the column signal line. A threshold voltage of the amplifying transistor is lower than a voltage of the accumulation diode.

Abstract: A back-illuminated type MOS (metal-oxide semiconductor) solid-state image pickup device in which micro pads are formed on the wiring layer side and a signal processing chip having micro pads formed on the wiring layer at the positions corresponding to the micro pads of the MOS solid-state image pickup device are connected by micro bumps. In a semiconductor module including the MOS type solid-state image pickup device, at the same time an image processing speed can be increased, simultaneity within the picture can be realized and image quality can be improved, a manufacturing process can be facilitated, and a yield can be improved. Also, it becomes possible to decrease a power consumption required when all pixels or a large number of pixels is driven at the same time.

Abstract: An image pickup device may include: an image capturing unit; a reference signal generation unit; a row selection unit that selects and controls each unit pixel for every row of the array of the unit pixels; a comparison unit including a differential amplifier unit and a reset unit; a measurement unit that measures a comparison time from a comparison start to a comparison end; and a change unit that includes a switch element and a second capacitive element in which one end of the second capacitive element is connected to the first input terminal and the other end of the second capacitive element is connected to a first voltage source via the switch element at a time of a reset operation by the reset unit and connected to a second voltage source different from the first voltage source via the switch element after the reset operation.

Abstract: An image pickup apparatus and a method thereof are provided. The apparatus includes a sensor array and an ADC array. The sensor array includes M×N sensor blocks SB(i,j). The sensor block includes P×Q image sensing elements Se(x,y). The ADC array is located at another side of the illuminated side of the sensor array. The ADC array includes M×N ADCs ADC(i,j). The ADC(i,j) coupled to the sensor block SB(i,j) obtains the image data Data(x,y) from the image sensing element Se(x,y) of the sensor block SB(i,j). The ADC(i,j) evaluates the gain G(x,y) based on the position of the image sensing element Se(x,y). The compensated image data Datacom(x,y) can be outputted and Datacom(x,y)=Data(x,y)×G(x,y). The image pickup apparatus could improve the optical shading problem.

Abstract: An imaging apparatus comprises: a plurality of memory capacitors for holding signals output from pixels; and a plurality of first switches for respectively connecting the memory capacitors to a common signal line, wherein each of the plurality of memory capacitors includes a terminal connected to the corresponding first switch and supplied with the corresponding signal output from the corresponding pixel, and another terminal supplied with a reference potential, a reference potential supplying unit supplies a first reference potential during a period in which the plurality of memory capacitors hold the signals, and supplies a second reference potential having a potential difference from a potential of the common signal line before turning-on of the first switch, the potential difference being larger than that of the first reference potential, during a period in which the first switches are turned on.

Abstract: An image sensor comprises a plurality of pixel units connected to a column line, a signal process circuit configured to process a signal output from the column line according to a switching operation, and a kick-back noise blocking circuit configured to reduce kick-back noise caused by the switching operation. Each of the pixel units includes a photoelectric conversion element. The kick-back noise blocking circuit is connected between the column line and the signal process circuit.

Abstract: A solid-state imaging device with a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

Abstract: A compressive imaging system for optimizing dynamic range during the acquisition of compressed images. A light modulator modulates incident light with spatial patterns to produced modulated light. A light sensing device generates an electrical signal representing intensity of the modulated light over time. The system amplifies a difference between the electrical signal and an adjustable baseline voltage and captures samples of the amplified signal. The adjustable baseline voltage is set to be approximately equal to the average value of the electrical signal. A compressive imaging system for identifying and correcting hot spot(s) in the incident light field. Search patterns are sent to the light modulator and the corresponding samples of the electrical signal are analyzed. Once the hot spot is located, the light modulating elements corresponding to the hot spot may be turned off or their duty cycle may be reduced.

Abstract: A readout circuit includes: an amplifier (408); and offset controllers (415 and 416) configured to set an output offset voltage of the amplifier, wherein the readout circuit operates in first and second modes, in the first mode, a first voltage, and thereafter a second voltage lower than the first voltage, are input into the amplifier, in the second mode, a third voltage, and thereafter a fourth voltage higher than the third voltage, are input into the amplifier, and the offset controller switches the output offset voltage of the amplifier, between the first and second modes.

Abstract: A CMOS image sensor has a pixel array provided with a plurality of unit pixels arranged in a matrix shape of rows and columns. Each of the unit pixel includes a photocharge generation means for generating photocharges by absorbing an external light; and a sensing node for receiving the photocharges transferred from the photocharge generation means, wherein the sensing node of the unit pixel in a previous scan line is shared with a sensing node of a unit pixel in a current scan line in response to a line select signal of the current line.

Abstract: An amplifier is provided. The amplifier includes a differential amplifier including a tail, a current mirror connected between output terminals of the differential amplifier and a power line receiving a supply voltage, and a first switching circuit for connecting and disconnecting one of the output terminals of the differential amplifier to and from the tail in response to a first switching signal.

Abstract: A radiation image pickup device includes: an image pickup section having a plurality of pixels and generating an electric signal according to incident radiation, the plurality of pixels each including a photoelectric conversion element and one or a plurality of transistors of a predetermined amplifier circuit; and a correction section subjecting signal data of the electric signal obtained in the image pickup section to predetermined correction process. The correction section makes a comparison between measurement data obtained by measuring an input-output characteristic of the amplifier circuit in each of the plurality of pixels and initial data on the input-output characteristic, and performs the correction process by the pixel individually, by using a result of the comparison.

Abstract: An imaging apparatus includes a solid-state imaging element and a substrate. The solid-state imaging element includes a pixel array having a plurality of pixels in a two-dimensional matrix and pads that correspond to pixel columns of the pixel array and output signals of pixels in the pixel columns. Signal output terminal groups having a plurality of pads arranged in a line in a column direction of the pixel array are arranged in a row direction of the pixel array. A substrate includes a laminated wire being a laminate of a plurality of wiring layers and provided for each of the signal output terminal groups to extend in the column direction of the pixel array. The laminated wire includes a first terminal portion at a position facing each pad in the signal output terminal group. The pad and first terminal portion are connected to each other by a bump.

Abstract: An apparatus for acquiring an i-bit digital code by a first stage AD conversion and a j-bit digital code by a second stage AD conversion includes a comparing unit which compares a reference signal and an analog signal in the first stage AD conversion; and an amplifying unit for outputting an amplified residual signal acquired by amplifying a difference between the analog signal and an analog signal corresponding to the i-bit digital code. The comparing unit compares the amplified residual signal and the reference signal in the second stage AD conversion.

Abstract: An apparatus according to an embodiment of the present invention includes a conversion unit configured to generate electric charge, a first amplification unit configured to amplify a signal corresponding to an amount of the electric charge and output a first amplified signal, a second amplification unit configured to amplify the first amplified signal and output a second amplified signal, a current source shared by the first amplification unit and the second amplification unit, and a selection unit configured to bring the first amplification unit and the second amplification unit into an inactive state. The current source is shared by the first amplification unit and the second amplification unit. The number of current sources is therefore reduced. This leads to the reduction in power consumption.

Abstract: In an A/D conversion circuit and an imaging device, an upper counter acquires a first upper count value by performing counting using one output signal, which constitutes a first lower phase signal output from a delay circuit, as a count clock. After values of bits constituting the first upper count value are inverted, the upper counter acquires a second upper count value by performing counting using one output signal, which constitutes a second lower phase signal output from the delay circuit, as a count clock, and further performing counting based on an upper count clock output from a lower counter. A modification unit modifies a logic state of a count clock to a predetermined state when the count clock of the upper counter is switched.