Abstract: The present invention provides a method for enlarging 4K2K resolution and a 4K2K resolution enlarging system using the method. The method includes (1) providing a 4K2K resolution enlarging system, which includes a TV control terminal and a timing controller that includes a first port module, a FHD/QFHD signal processing module, 3a D/2D signal processing module, a 4K/2K signal resolution enlarging module, and a second port module connected to a source driver IC; (2) receiving the external data signal and carrying out processing of the data signal to provide an output of FHD/QFHD format data signal to the timing controller; (3) the timing controller carrying out panel-related computation with the FHD/QFHD signal processing module and the 3D/2D signal processing module; and (4) the 4K/2K signal resolution enlarging module carrying out enlargement of 4K2K and supplying an enlarged data signal to the source driver IC.

Abstract: The present invention provides de-interlacing methods and related apparatuses. One of the proposed de-interlacing methods includes edge detection of a target region corresponding to a target position. When the target region is assumed to include an edge that is considered stationary, and if the target position is on a stationary side of the edge, then a pixel value for the target position is generated by inter-field interpolation.

Abstract: Disclosed herein is a video signal processing method and apparatus. In an embodiment of the present invention, video having a second screen size is generated from input video having a first screen size through Wavelet/Bicubic video interpolation, and a parallel Projection Onto Convex Sets (POCS) method is applied to the generated video having the second screen size. In this embodiment, the video having the second screen size, which is generated through Wavelet/Bicubic video interpolation, is used as an initial value for the POCS method, and a motion component estimated based on the video having the first screen size and the video having the second screen size obtained through the use of the POCS method is used as a correction value for the POCS method. Accordingly, HD-class video can be rapidly produced from SD-class video without image degradation.

Abstract: To enable a progressive synthesization process suited to each video signal even in such a case that a difference between video signals based on a video transmission sequence and the video signals not based on the video transmission sequence, is fuzzy.

Abstract: Techniques and tools for high accuracy position calculation for picture resizing in applications such as spatially-scalable video coding and decoding are described. In one aspect, resampling of a video picture is performed according to a resampling scale factor. The resampling comprises computation of a sample value at a position i, j in a resampled array. The computation includes computing a derived horizontal or vertical sub-sample position x or y in a manner that involves approximating a value in part by multiplying a 2n value by an inverse (approximate or exact) of the upsampling scale factor. The approximating can be a rounding or some other kind of approximating, such as a ceiling or floor function that approximates to a nearby integer. The sample value is interpolated using a filter.

Abstract: An image signal processing apparatus for converting an interlace signal which creates a frame image by alternately displaying an odd field and an even field on a single screen into a progressive signal, includes a line memory for storing the interlace signal, a writing/reading portion for writing/reading the interlace signal into/from the line memory, a signal generation portion for generating a prescribed signal, a selector for selectively outputting the interlace signal from the line memory or the prescribed signal from the signal generation portion, and a controller for controlling signal selection by the selector.

Abstract: A method for setting a frame rate conversion (FRC) and a display apparatus using the same are provided. According to a method for setting FRC, an FRC level is received from a user; and a motion estimation and motion compensation level when performing FRC is set according to the input FRC level. Therefore, a user may set the FRC level according to the user's preference.

Abstract: An image processing device and method, and an image display device and method which realizes a high-definition displayed video by reducing motion blur caused by a holding-type display system and reducing motion blurs of the displayed video caused by the time integration effect of an image sensor while suppressing deterioration of an image. The image display device includes a motion vector detection section (101) which detects a motion vector in each predetermined region between the frames of an inputted image signal, and an edge emphasis part (2) which emphasizes the high-frequency component of the inputted image signal and an interpolated image signal generated by an FRC part (100) according to the motion amount of the inputted image signal detected by the motion vector detection section (101). This compensates the high-frequency component attenuated by the time integration effect of the image sensor to reduce the apparent motion blurs to improve the sharpness of the displayed image.

Abstract: A video scan converter processes a video stream including a first coding unit, which has been obtained by encoding a pair of fields N1 and N2 that has come from a first frame of film video, and a second coding unit, which has been obtained by encoding a pair of a field N3 that has also come from the first frame and a field M1 that has come from a second frame, not the first frame. The video scan converter includes: a decoder, which receives the video stream, decodes the first and second coding units, and sequentially outputs the data of the respective fields N1, N2, N3 and M1; and a scan converter, which generates a frame based on associated two of those fields that have been supplied from the decoder. In outputting a frame associated with the field N3, the scan converter generates the frame based on the fields N1 and N2 without using the data of the field N3.

Abstract: A method for a motion detection in an interlaced field sequence includes selecting two initial fields from the interlaced field sequence. Each of the two initial fields have different scan lines. The method also includes interpolating each of the two initial fields to generate two respective new fields. The new fields have raster lines that are congruent. The method further includes generating a value of a pixel of each new field using pixel values of at least two scan lines of a corresponding initial field surrounding the pixel. Further, the method includes performing a motion detection based on the new fields.

Abstract: An image processing circuit includes a de-interlace circuit, a motion interpolation circuit and a frame processing circuit. The image processing circuit receives a first field and a second field respectively from two successive film frames. A plurality of block motion vectors are calculated according to the first field and the second field. A plurality of interpolated frames are calculated according to the first field, the second field and the plurality of motion vectors.

Abstract: In a device for processing baseband signal images (BS), a film detector determines whether a same baseband signal image includes both information from a film image and information from a video source image, information from one film image being present in at least two baseband signal images while information from one video source image is present in only one baseband signal image. A processing unit processing the baseband signal images in such a manner that in the presence of both information from the film image and information from the video source image in the same baseband signal image, for each film image only one of the at least two baseband signal images is used to obtain a display signal image (DS).

Abstract: This invention enables, for example, reduction of motion blur in a hold-type display device and reduce flicker in an impulse-type display device by a simple process. For this purpose, an LPF filters a frame of input image data (A[i]) to generate low-frequency image data (L). A subtractor and an adder generate high-frequency image data (SH). Another adder adds the low-frequency image data (L) from a delay circuit to subsequent low-frequency image data. A divider halves the sum to generate low-frequency averaged image data (SL). A switch alternately outputs the high-frequency image data (SH) and the low-frequency image data (SL) every time a frame of image data is input. As a result, the apparatus of this invention can generate output image data having a frame rate twice that of the input image data.

Abstract: A field pair correlation acquisition part obtains a correlation for six or more fields which are continuous in time series for each field pair formed of two adjacent fields having the same attribute. A first determination part determines an input image as a 2:2 pull-down image based on a determination condition, the determination condition being that a pattern in which the correlation of each of the field pairs of one attribute changes along with a time direction matches a pattern in which the correlation of each of the field pairs of the other attribute changes along with the time direction.

Abstract: A video scan converter processes a video stream including a first coding unit, which has been obtained by encoding a pair of fields N1 and N2 that has come from a first frame of film video, and a second coding unit, which has been obtained by encoding a pair of a field N3 that has also come from the first frame and a field M1 that has come from a second frame, not the first frame. The video scan converter includes: a decoder, which receives the video stream, decodes the first and second coding units, and sequentially outputs the data of the respective fields N1, N2, N3 and M1; and a scan converter, which generates a frame based on associated two of those fields that have been supplied from the decoder. In outputting a frame associated with the field N3, the scan converter generates the frame based on the fields N1 and N2 without using the data of the field N3.

Abstract: Described is a technology in which a low resolution image is processed into a high-resolution image, including by a two interpolation passes. In the first pass, missing in-block pixels, which are the pixels within a block formed by four neighboring original pixels, are given values by gradient diffusion based upon interpolation of the surrounding original pixels. In the second interpolation pass, missing on-block pixels, which are the pixels on a block edge formed by two adjacent original pixels, are given values by gradient diffusion based upon interpolation of the values of those adjacent original pixels and the previously interpolated values of their adjacent in-block pixels. Also described is a difference projection process that varies the values of the interpolated pixels according to a computed difference projection.

Abstract: A caption detection device including a delay unit which delays a current-frame image to output a previous-frame image, a current feature detection unit which receives the current-frame image to detect a caption feature in each region, a previous feature detection unit which receives the previous-frame image from the delay unit to detect a caption feature in each region, a caption emergence region detection unit which detects a region where the caption emerges based on a temporal change between the feature in each region of the current-frame image and the feature in each region of the previous-frame image, and a caption disappearance region detection unit which detects a region where the caption disappears based on the temporal change between the feature in each region of the current-frame image from the current feature detection unit and the feature in each region of the previous-frame image.

Abstract: There is provided an image determining device including a frequency band signal detecting unit for dividing an image into a plurality of local regions and detecting for each local region signals of a plurality of frequency bands from the image signal; an average value calculating unit for calculating an average value of a characteristic value corresponding to an amplitude, for each local region and for each signal of the plurality of frequency bands; a local region selecting unit for selecting at least one local region based on image information; an average value selecting unit for selecting the average value corresponding to the selected local region; a relative value calculating unit for calculating a relative value of one average value with respect to another average value both of the average values being of the selected average values; and an image determining unit for determining an image based on the relative value.

Abstract: A scaling engine, blending mechanism, memory controller, frame buffer and video driver are included within a semiconductor, such as a Field Programmable Gate Array (FPGA), to provide broadcasting of signals at a high resolution format by combining two or more low resolution video signals to create a high resolution signal in real-time High Definition format, such as 1080p. The high resolution signals can be concurrently displayed as one or more image areas on a display device in any contemplated size, number and arrangement.

Abstract: A video-processing device is provided for processing a main video data flow and a secondary video data flow. The secondary video data flow constitutes a scaled version of the main video data flow. The video-processing device comprises a tap-off unit (T, T2) having an input for receiving the main video data flow. The tap-off unit (T, T2) comprises at least a first and second output, wherein each of the outputs corresponds to the input of the tap-off unit. A first H- and V-scaling unit (HVS1) is coupled to the first output of the tap-off unit (T, T2) for performing a first H- and V-scaling on the main video flow. A second H- and V-scaling unit (HVS2) is coupled to the second output of the tap-off unit for performing a second H- and V-scaling on the secondary video flow to provide a scaled secondary video flow. By tapping-off the main video flow there is no need for the device to access a memory to extract the video data from the main video flow to provide a secondary video flow.

Abstract: The detail and clarity of high-definition video content may be enhanced by a display device or client-side device before being displayed. In certain embodiments, the high-definition video image frames may be upsampled by scaling the image's resolution. The now-upsampled HD video image frames may then be low pass filtered so as to concentrate the image's energy distribution into a tighter range of frequencies. The filtered HD video image frames may then be sub-sampled back down, such as to the original HD image's frame resolution, or other HD-level resolution, without compromising image detail. In this fashion, the clarity and detail level in video content, even though already considered of a high-definition quality, may be further improved.

Abstract: In a pixel interpolation apparatus for interpolating pixels, an edge pixel detection unit detects edge pixels constituting an edge among pixels on lines positioned above/below the interpolation pixel. A continuous edge detection unit detects edge pixels in which two pixels or more consecutively line up among edge pixels detected by the edge pixel detection unit as a continuous edge. A continuous edge pair detection unit determines the combination of the continuous edges detected on each of the lines above and below the interpolation pixel among the continuous edges detected by the continuous edge detection unit. An edge direction determination unit determines the edge direction of the interpolation pixel on the basis of the positional relation of one set of continuous edges determined by the continuous edge pair detection unit. An interpolation pixel calculation unit calculates an interpolation pixel using the edge direction determined by the edge direction determination unit.

Abstract: A image-driving method for a display includes receiving an image frame and registering at least a part of the image frame, wherein the image frame is divided into a prior-part frame and a post-part frame; respectively conducting a first luminance adjustment on the prior-part frame and the post-part frame so as to take the adjustment results as a first part of a first image frame and a first part of a second image frame; filling the previous received image frame after a second luminance processing into a second part of the first image frame; filling the presently received image frame after a second luminance processing into a second part of the second image frame; outputting the complete first image frame and the complete second image frame for successive displaying.

Abstract: For providing a technology for preferably achieving high resolution of video signals of a video signal or moving video, with a small number of frames thereof, a video signal processing apparatus comprise an input unit to be inputted a plural number of video frames, a resolution converter unit, having resolution converting characteristics differing from each other, depending on a direction thereof, by composing 2 pieces of the video frames from the inputted video frames, thereby increasing a number of pixels making up the video frames, and a mixer unit for obtaining the output video frame by mixing output results of the resolution converter unit.

Abstract: A method of determining field dominance in a sequence of video frames, the method comprising: generating from a first video frame a top field and a bottom field; interpolating the top and bottom fields to produce an interpolated top field frame and an interpolated bottom field frame respectively; correlating each of the interpolated top field frame and interpolated bottom field frame with a second video frame occurring immediately previous to the first video frame in the sequence of video frames and with a third video frame occurring immediately subsequent to the first video frame in the sequence of video frames; and determining from the outcome of the correlation the field dominance of the sequence of video frames.

Abstract: A signal processing circuit includes an interpolation filter for outputting an interpolation value of signal levels at positions of ¼ phase and ¾ phase between two original pixels of the input digital image adjacent in the predetermine direction; a phase shift circuit for outputting signal value of each of the two original pixels by shifting the phases of the signals of the two original pixels in the predetermined direction to ¼ phase and ¾ phase, respectively, between the two original pixels; a edge detection circuit for detecting a edge portion of the image from a signal level change of a plurality of pixels including the two original pixels of the input digital image in the predetermined direction; and a first signal selection circuit for outputting the output of the phase shift circuit when the edge is detected, and outputting the output of the interpolation filter when no edge is detected, based on the result of detection by the edge detection circuit.

Abstract: A video conversion apparatus includes: a video format conversion unit configured to interpolate, in the case that video signals, which are made up of a luminance component and color difference components and of which the video format is the interlace format, have been supplied, the luminance component and color difference components of the video signals, thereby converting the video format of the video signals into the progressive format; and a color difference format conversion unit configured to interpolate the color difference components of the video signals obtained with the conversion by the video format conversion unit, thereby converting the color difference format of the video signals from a first color difference format to a second color difference format that includes more color difference components than the first color difference format.

Abstract: A de-interlacing method and controller is provided. The de-interlacing method includes steps of de-interlacing based on an ith odd input pixel row of an odd field and an ith even input pixel row of an even field to generate an ith odd output pixel row, where i is a natural number; de-interlacing based on the ith even input pixel row and an (i+1)th odd input pixel row of the odd field to generate an ith even output pixel row; and adjusting i and repeating the above steps to generate a complete interpolated frame.

Abstract: An decomposition filter includes a top-field low-frequency decomposition filter and a bottom-field low-frequency decomposition filter whose coefficient is obtained by vertically inverting the coefficient of the top-field low-frequency decomposition filter. It also includes a top-field high-frequency decomposition filter and a bottom-field high-frequency decomposition filter whose coefficient is obtained by vertically inverting the coefficient of the top-field high-frequency decomposition filter. The above-described filters are switched and used according to which an input signal is for, a top-field or a bottom-field.

Abstract: A image display unit is allowed to reproduce display characteristics substantially equivalent to that obtained with use of a cinema projector, when performing a image display based on a film image signal or an equivalent. The image display unit including: an image insertion section inserting an interpolation frame image into an input video signal as the film image signal or the equivalent; and a display section performing image display based on a video signal where the interpolation frame image is inserted. The image insertion section generates an optimized image as the interpolation frame image in which the insertion time period and the signal level are optimized based on display characteristics to be achieved in a projected image projected with the cinema film by a cinema projector, thereby to insert the optimized image into the input video signal at a position corresponding to a gap between frames of the cinema film.

Abstract: Methods and systems for processing video information are disclosed herein and may comprise calculating a first two-field difference between a first plurality of pixels from a current field and a second plurality of corresponding pixels from an alternate field adjacent to the current field. At least one pixel from the current field may be deinterlaced based at least in part on the calculated first two-field difference. The first plurality of pixels and the second plurality of pixels may be aligned by adjusting a phase of at least one of the first plurality of pixels and the second plurality of pixels prior to the calculation of the first two-field difference. The first plurality of pixels may include a plurality of vertically adjacent pixels. The first plurality of pixels may comprise at least one luminance component. The alternate field may include a previous field and/or a next field.

Abstract: The present invention can be implemented in a video coder or decoder or directly in any type of display device. According to the invention, a distance representative of the edge orientation in the input picture is calculated, for at least one point situated inside a zone delimited by a first set of neighbouring pixels of the input picture, it is calculated independently from the grid of pixels of the output picture. For at least one pixel of the output picture situated in this zone, a second set of pixels is determined in the input picture from the distance and the position of said pixel of the output picture in this zone. The value of this output pixel is then determined from the value of the pixels of said second set of pixels. This method enables a reduction in the number of calculations for this format conversion.

Abstract: A system and method for downscaling signal data, where the system includes an antenna receiving video signal data; an analog-to-digital converter coupled to the antenna and converting the received analog signal data to digital signal data; a memory component storing video downscaling instructions; and a video downscaling processor, coupled to the memory component and the analog-to-digital converter, wherein the video downscaling processor, upon reading the video downscaling instructions from the memory component and executing the downscaling instructions: divides the digital video signal data into a plurality of blocks, wherein each block comprises a plurality of pixel elements; and cycles through the plurality of blocks, and for every block in the plurality of blocks, generates a new block, wherein the new block comprises a plurality of new pixels evenly spaced within the new block.

Abstract: In one embodiment of the present application, a frame interpolation circuit performs frame interpolation on an input video signal, and outputs a drive video signal containing original and interpolation frames. A motion determination circuit outputs a control signal in accordance with the amount of motion, based on a motion vector obtained by a motion detection circuit. In accordance with the control signal, the frame interpolation circuit increases the proportion of interpolation frames contained in the drive video signal as motion in an image increases, while increasing the proportion of original frames contained in the drive video signal as the motion in the image decreases. As a result, any moving image blur due to following line of sight and noise generated in the interpolation frames are reduced.

Abstract: A motion amount at a pixel position to be interpolated of a field of interest is calculated. A difference coefficient between frames is calculated based on video signals of two fields which are adjacent to the field of interest and are separated by one frame. A motion intensity between fields is calculated based on video signals of the field of interest and a field after the field of interest. The motion amount is corrected using a predetermined function. The corrected motion amount is corrected again based on the difference coefficient and motion intensity.

Abstract: An apparatus including a first circuit and a second circuit. The first circuit may be configured to generate a first control signal, a second control signal and a third control signal in response to a first interlaced video signal. The second circuit may be configured to generate a second interlaced video signal in response to the first interlaced video signal, the first control signal, the second control signal and the third control signal. The second circuit may be further configured to vertically scale the first interlaced video signal in an extended vertical domain.

Abstract: An image processing engine, comprising: a frame rate conversion entity configured to: (a) generate output pictures from input pictures, the output pictures comprising a set of first output pictures and a plurality of sets of second output pictures, each set of second output pictures being associated with one of the first output pictures, each of the first output pictures being derived from a respective one of the input pictures; and (b) control generation of the set of second output pictures associated with a particular first output picture based upon repetitive pattern presence detection within a related picture that is either (i) the particular first output picture or (ii) the input picture from which the particular first output picture was derived.

Abstract: Method of transferring digital data between a client device and a server device on a communication network, said method being implemented within said server device and comprising: i) coming from the client device, receiving a request in markup format for the delivery of a digital object or part of a chosen digital object, ii) obtaining in the communication network a representation of the object requested, iii) checking whether the representation of the object thus obtained corresponds to a data compression format of the progressive type, iv) in the event of a positive check, dividing the digital object into a plurality of sub-parts, to each sub-part there being allocated a high priority rank defined according to at least one chosen criterion, and v) sending to the client device a response in markup format comprising the sub-parts of the digital object in binary format and associated priority ranks in markup format.

Abstract: A method for efficient digital capturing of analog video signals of computer game consoles is provided. The video format of the signal is changed from 480p to 720p, without any scaling artifacts. The number of active horizontal resolution lines and active vertical resolution lines is reduced in the higher definition space, so that the output picture is a pixel-for-pixel transformed replica of the 480p image.

Abstract: A method for deinterlacing a picture is disclosed. The method generally includes the steps of (A) generating a plurality of primary scores by searching along a plurality of primary angles for an edge in the picture proximate a location interlaced with a field of the picture, (B) generating a plurality of neighbor scores by searching for the edge along a plurality of neighbor angles proximate a particular angle of the primary angles corresponding to a particular score of the primary scores having a best value and (C) identifying a best score from a group of scores consisting of the particular score and the neighbor scores to generate an interpolated sample at the location.

Abstract: An image processing apparatus for processing first image data into second image data having a higher quality includes the following elements. A determination unit determines whether broadcast image data is up-converted image data generated by up-converting different image data by increasing the number of pixels forming the different image data. A down-converter down-converts the broadcast image data into down-converted image data by decreasing the number of pixels forming the broadcast image data. A first image converter converts, if the broadcast image data is not the up-converted image data, the first image data into the second image data by using the down-converted image data and the broadcast image data as the first image data. A second image converter converts, if the broadcast image data is the up-converted image data, the first image data into the second image data by using the down-converted image data as the first image data.

Abstract: The present invention relates to a technology of appropriately improving image resolution. According to an image signal processing method of the present invention, an input video signal contains an image signal whose pixel size is converted at a specified magnification scale. The input image signal is used to calculate sampling frequencies for image signals before and after the pixel size conversion. A ratio of sampling frequencies before and after the pixel size conversion is used to determine the specified magnification scale. A sampling phase for the image signal before the pixel size conversion is calculated from the input image signal after the pixel size conversion. A sampling carrier for the image signal before the pixel size conversion is generated from the sampling frequency and the sampling phase both before the pixel size conversion.

Abstract: An inter-field pull-down pattern detecting circuit determines whether an input video signal is a first pull-down signal or a second pull-down signal, on the basis of input plug information and a pattern of the consecutive inter-field correlation levels, obtained from an inter-field correlation determination circuit. A counter counts the number of times the pattern detecting circuit determines that the input video signal is the first pull-down signal. The counter is reset to “0” when the input video signal is determined to be other than the first and second pull-down signals. When the count of the counter exceeds a preset value, the input video signal is finally determined to be the first pull-down signal.

Abstract: For spatial resolution conversion of an image signal, a magnitude of a motion vector is compared to a threshold value. Single channel interpolation is performed if the magnitude of the motion vector is greater than a threshold value, and multi-channel interpolation is performed otherwise. In addition, single channel interpolation is performed for spatial resolution conversion of any frame that does not refer to another frame.

Abstract: An average filter or filters is used in line with the output of an interpolation filter to downscale an image. The interpolation filter upscales a source image or bitmap of pixels into an intermediate form and the average filter or filters downscales the intermediate form to a destination image or bitmap of pixels. This configuration incorporates a small amount of logic with a relatively low incremental cost, enabling high quality downscaling of text and computer graphics content. The invention achieves quality comparable to a filter/scalar combination with more taps or a separate decimation pass.

Abstract: A method of converting a frame rate of a video signal includes the steps of: receiving a pulldown film sequence existing in or converted from a sequence of successive-in-time frames of the video signal, in which the pulldown film sequence comprises a plurality of diverse original frames each having a corresponding number of duplicate frames; modifying the original frames; performing estimation of at least one motion vector associated with the modified original frames; and interpolating new frames between the modified original frames in accordance with the motion vector.

Abstract: A method for controlling a video data to enter a film mode for processing is disclosed, the video data including a plurality of target fields, the method including: determining whether a target field of the target fields is capable of being merged with a first neighboring field of the target field; if the target field can be merged with the first neighboring field, adding one to a merging number; and repeating the above steps until the merging number is determined to be not less than N, and then entering the film mode to process the video data; wherein N is a positive integer not less than two.

Abstract: A method and apparatus are provided for reversible, polynomial based image scaling. The apparatus includes a video scaler for performing image scaling from a first base resolution image to a higher resolution image, and from the higher resolution image to a second base resolution image. The first and the second base resolution images are equal on a pixel-by-pixel basis for an entirety of the first and the second base resolution images. A scaling function used for the image scaling is based on a polynomial function having two or more degrees.

Abstract: A video signal display system includes: a reproducing apparatus including a decoder that decodes input video data to produce a video signal, an IP converter that, when the video signal produced by the decoder is an interlaced video signal, converts the interlaced video signal into a progressive video signal, a pseudo-interlacing unit that performs pseudo-interlacing in which the progressive video signal converted by the IP converter undergoes pseudo-interlacing so that the progressive video signal is converted into a pseudo-interlaced signal, and a first controller; and a display apparatus including a display processor that carries out a display process for displaying a video signal, and a display that can at least display the video signal that has undergone the display process in the display processor.

Abstract: The present invention is a decoding device, an encoding device, an interpolation frame creating system, an integrated circuit device, a decoding program and an encoding program capable of creating interpolation frames at a high precision with an improved encoding efficiency. The decoding device includes a decoding section, a motion vector detection section, and an interpolation frame creation section. The decoding section decodes an encoded image signal obtained by encoding image frames which form an image signal and additional information for creating an interpolation frame for interpolating the image frames based on a motion vector which is a motion vector between the image frames. The motion vector detection section detects a motion vector which is a motion vector between decoded image frames. The interpolation frame creation section creates an interpolation frame based on the motion vector, the decoded image frame, and the decoded additional information.