Abstract: A liquid crystal display, including a display panel including an upper panel, a lower panel, and a liquid crystal layer interposed therebetween, the display panel being defined by a display area and a peripheral area, the display panel including a sealing member enclosing the display area and in the peripheral area, the upper panel including a light blocking member in the peripheral area, the light blocking member including a well.

Abstract: An array substrate comprises a TFT, a data line, a gate line and a passivation layer covering the TFT, the data line and the gate line. The array substrate further includes a first conductive structure and a second conductive structure connected with the first conductive structure, the first conductive structure is disposed on the passivation layer and above the TFT, and the second conductive structure is disposed on the passivation layer and above the data line and/or gate line. A method for manufacturing the array substrate and a display device having such an array substrate are also provided.

Abstract: The present disclosure discloses an array substrate including a display area and a data lead area. The display area includes data signal lines and gate lines. The data lead area includes peripheral wirings connecting the data signal lines and wiring terminals. The peripheral wirings include a plurality of metal traces which are corresponding to the data signal lines in a one-to-one manner and manufactured from a same layer as the gate lines. Each of the metal traces is connected to one of the data signal lines which is corresponding to the each of the metal trace.

Abstract: The present invention provides an array substrate and a display panel. The array substrate comprises a plurality of data lines and a plurality of common electrode lines, wherein, the array substrate further comprises at least one discharge unit, each discharge unit corresponds to one of the plurality of data lines and is connected between the corresponding data line and one of the plurality of common electrode lines, and each discharge unit can selectively conduct the data line to the common electrode line connected thereto. The display panel comprises the array substrate. In the present invention, the discharge unit can selectively conduct the data line connected thereto to the common electrode line connected thereto, to enable fast discharge of the storage capacitance and reduce occurrence of afterimage phenomenon.

Abstract: An embodiment of the present invention provides an array substrate, its manufacturing method and a display device. The method for manufacturing the array substrate comprises forming a common electrode with a slit structure on a substrate, and a pixel electrode with a slit structure not overlapping the common electrode. According to the present invention, it is able to reduce storage capacitance between the common electrode and the pixel electrode, thereby to ensure the image quality.

Abstract: A dichroic coating can be applied to a glass window of an electronic device to enhance the cosmetic and aesthetic appeal of the device. Different processes can be applied to the glass window in combination with a dichroic coating. For example, a layer of ink can be applied to the glass window in addition to one or more layers of dichroic material. The material layers can cover any suitable portion of the glass. For example, the material layers can include holes or openings. As another example, the material layers can be constructed from several distinct shapes placed on the glass. In some cases, software applications can be used to define a desired color profile for a coating, and to retrieve a suitable combination of dichroic and other layers to provide the desired color profile.

Abstract: An array substrate includes a GOA circuit area and a display area, the GOA circuit area includes a TFT area and a lead-wire area, the display area includes a data line and a gate line. The GOA circuit area is provided with at least one first via and at least one second via, a data-line metal layer is disposed at the bottom of the at least one first via, and a gate-line metal layer is disposed at the bottom of the at least one second via. The GOA circuit area further includes a first electrode and a second electrode, the data-line metal layer is electrically connected to one electrode through the at least one first via, the gate-line metal layer is electrically connected to the other electrode through the at least one second via, such that a capacitor is formed between the first electrode and the second electrode.

Abstract: The present disclosure provides a display device, including: a display region, a driving element, and the display region electrically connected to the driving element through a plurality of signal line pairs. In particular, at least one of the signal line pairs includes a first conductive line and a second conductive line, and the first conductive line is electrically isolated from the second conductive line. In the signal line pair, at least a part of the first conductive line overlaps the second conductive line.

Abstract: The present invention provides an array substrate, a display device, and a mother board. One or more short-circuit rings are each arranged at an end of a corresponding signal line and connected to the corresponding signal line, and the short-circuit rings are serially connected through a common electrode line. The array substrate is added with a test line and a testing terminal pad, the testing terminal pad is connected to the common electrode line via the test line and is configured to apply a negative voltage onto the common electrode line connected to the test line while testing the signal line.

Abstract: An LCD device is disclosed. The liquid crystal display device includes a capacitor formed between the input terminal of an internal driving circuit and a LOG type signal line, which receive the start pulse signal. Therefore, the LCD device can stably drive its internal driving circuit, even though static electricity is generated on the LOG signal line which is used for transferring the start pulse signal of a short enabling time.

Abstract: A display apparatus includes a timing controller configured to output a gate control signal through gate control lines, a gate driver configured to output gate signals in response to the gate control signal provided from the gate control lines, pixels configured to receive data voltages in response to the gate signals, and first and second static electricity prevention parts connected to the gate control lines in parallel configured to discharge a static electricity. Each of the first and second static electricity prevention parts is configured to form current paths, which are smaller in number than a number of the gate control lines, to discharge the static electricity and the static electricity configured to be discharged by the first static electricity prevention part has a polarity different from a polarity of the static electricity configured to be discharged by the second static electricity prevention part.

Abstract: An array substrate includes: a gate wiring; a source wiring, which is formed to intersect the gate wiring; a passivation film, which covers the source wiring; and a pixel electrode that is formed on the passivation film. The array substrate has a display area and a dummy pixel area. In the display area, a switching element in the vicinity of the intersection of the gate wiring and the source wiring is provided. In the display area, the pixel electrode and the source wiring do not have an overlapping area in a top view. The dummy pixel area is located outside the display area, and in the dummy pixel area, a dummy pixel electrode and two source wirings, which are adjacent to the dummy pixel electrode have an overlapping area in a top view.

Abstract: A liquid crystal display panel and a fan-out area thereof are provided. The fan-out area is arranged in a peripheral circuit area of the liquid crystal display panel and includes a middle wire and multiple fan-out wires arranged at two sides thereof. The middle wire and the fan-out wires each are disposed with at least one first wire pattern. Along each of directions toward the middle wire, widths of the first wire patterns of different wires are successively increased and/or lengths of the first wire patterns are successively decreased. The first wire patterns of a same wire have same width and length. Accordingly, the present invention can reduce the resistance differences among the wires in the fan-out area, color washout and non-uniform brightness caused by the resistance differences can be relieved or avoided, and is beneficial to the narrow border design of the liquid crystal display panel.

Abstract: A display driving module including a driving circuit portion and a non-driving circuit portion is provided. The driving circuit portion is controlled by a system circuit block. The driving circuit portion includes driving channels for driving a display panel. First ESD protection devices are disposed in the driving circuit portion corresponding to the driving channels for providing at least one discharge path. The non-driving circuit portion electrically connects the system circuit block, the driving circuit portion and the display panel. At least one of second ESD protection devices is disposed in at least one of the driving circuit portion, the non-driving circuit portion, the system circuit block and the display panel corresponding to the first ESD protection devices. The second ESD protection devices cooperate with the first ESD protection devices to provide the discharge path. An image display system including the foregoing display driving module is also provided.

Abstract: An edge portion of first ground wiring and an edge portion of second ground wiring are in contact with a space containing air having a relative dielectric constant smaller than a liquid crystal relative dielectric constant through an insulating film. An edge portion of common wiring and another edge portion of the first ground wiring are in contact with a sealing material having a relative dielectric constant smaller than the liquid crystal relative dielectric constant through the insulating film.

Abstract: A display device, including a display panel; a flexible printed circuit board (FPCB) including a driving integrated circuit (IC) and attached to a rear surface of the display panel; a conductive member at the rear surface of the display panel; an FPCB connection pad connected to the conductive member at the rear surface of the display panel and connected to the FPCB; an FPCB connection terminal connected to the FPCB connection pad and at the FPCB; and a ground at the FPCB.

Abstract: Embodiments of the disclosure provide a signal line fabrication method, an array substrate fabrication method, an array substrate and a display device. The signal line fabrication method includes: sequentially forming a material layer for forming the signal line, a material layer for forming a first barrier layer and a material layer for forming a second barrier layer; forming the first barrier layer and the second barrier layer by a patterning process; and forming the signal line by a patterning process.

Abstract: A liquid crystal panel, the testing circuit and the testing method thereof are disclosed. The testing circuit includes shorting bars, bonding pads, and switches. The switches are arranged between the shorting bars and the bonding pads. In the testing process, the switches are turn on upon receiving the testing signals so as to transmit the testing signals from the shorting bars to the bonding pads. When the testing process ends, the switches are turn off to prevent the liquid crystal panel from being affected by the signals of the bonding pads during the normal screen display of the liquid crystal panel. In this way, the manufacturing cost is reduced.

Abstract: The present disclosure relates to a signal line connection structure and apparatuses using the same. The signal line connection structure according to an embodiment of the present disclosure comprises a first signal line and a second signal line, one end of the first signal line and one end of the second signal line corresponding to each other and being connected through a conductive layer; and a first tip end arranged in the first signal line; and a second tip end arranged in the second signal line. The first tip end and the second tip end are arranged as opposed to but not connected with each other, and static charges in the first signal line and the second signal line are discharged through the first tip end and the second tip end.

Abstract: A display panel and a display device are provided, and the display panel comprises a GOA circuit; a first conducting wire and a second conducting wire are disposed in a region outside the GOA circuit; an insulating layer is disposed between the first conducting wire and the second conducting wire; and the first conducting wire, the insulating layer and the second conducting wire form a first capacitor. The display panel can protect the internal signal lines of the GOA circuit and the display panel, and increase the antistatic ability of the display panel and the yield of products.

Abstract: A panel for a display device includes a display unit, an electrostatic protection wire, a wire being connected to the display pixels, an electrostatic protection circuit, and an electrostatic protection circuit control line. The display unit includes a plurality of display pixels. The electrostatic protection wire is connected to a test pad, the test pad being provided to receive a test signal. The electrostatic protection circuit connects the electrostatic protection wire and the wire connected to the display pixels. The electrostatic protection circuit includes a back-gate-type transistor that has a gate electrode, a drain electrode being short-circuited with the gate electrode, and a back-gate electrode. The electrostatic protection circuit control line includes a first end and a second end, the first end being connected to the back-gate electrode of the back-gate-type transistor.

Abstract: According to the present disclosure, there are disclosed a pixel structure, a dual-gate pixel structure and a display device. The pixel structure comprises: a thin film transistor, a passivation layer that is located over the thin film transistor, an upper pixel electrode that is located over the passivation layer, a lower pixel electrode that is located under a gate insulating layer of the thin film transistor; and a common voltage line that is located between the passivation layer and the gate insulating layer. The common voltage line overlaps with the lower pixel electrode and the upper pixel electrode at least in part with the gate insulating layer and the passivation layer interposed therebetween, respectively, so as to form a storage capacitance.

Abstract: Disclosed is a display panel in which a jumping wiring made of a heterogeneous material for the prevention of static electricity connects a signal pad with a test wiring of an array substrate, or a display panel, and induces a discharge of the static electricity when the static electricity generated in an array test process flows into the display panel, thereby preventing damage to the display panel.

Abstract: An electrostatic protection circuit, a display device and an electrostatic protection method are provided. The electrostatic protection circuit includes a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, and a fifth switch transistor.

Abstract: A thin film transistor liquid crystal display (TFT-LCD) array substrate comprises a display area comprising a gate line, a data line and a common electrode line, a pixel electrode and a first thin film transistor (TFT) formed in each sub-pixel area defined by the gate line and data line which are crossed with each other; and a test area located at the peripheral of the display area and comprising a first test one, a second test line, a testing electrode and a second TFT, and the common electrode line extending to the test area from the display area, wherein a part of the second test line constitutes a gate electrode of the second TFT; the source electrode of the second TFT is electrically connected with the first test line; a drain of the second TFT is electrically connected with the common electrode fine; and the common electrode line is connected with the testing electrode.

Abstract: An active matrix substrate (5) is provided with mounting terminals (DT1), draw-out lines (22r) connecting the mounting terminals (DT1) and data bus lines (D), first common wires (24) connected in common to the plurality of data bus lines (D), and second thin-film transistors (second switching elements) (23a) connected between the draw-out lines (22r) and the first common wires (24). In the mounting terminals (DT1), upper-layer terminal electrodes (34) and lower-layer terminal electrodes (36a, 36b) are connected via terminal contact holes (H2a). The upper-layer terminal electrodes (34) are provided so as to cover at least portions of second thin-film transistors (26a).

Abstract: A liquid crystal cell is disclosed. The cell includes a first substrate, and a first overcoat layer. The first substrate includes first and second regions. The cell also includes a barrier layer on the first overcoat layer in the first region, a second substrate bonded with the first substrate, and a first spacer on the second substrate, where the first spacer is aligned with the first region. The cell also includes a second spacer on the second substrate facing the first substrate, where the second spacer aligns with the second region, and the length of the first spacer is greater than or equal to the length of the second spacer. The cell also includes a liquid crystal layer between the first and second substrates, where the area of a lower surface of the barrier layer is greater than the area of a lower surface of the first spacer.

Abstract: A polarizer includes a polarizer component having a top surface and an opposite bottom surface. The bottom surface is configured to couple to a color filter layer for a liquid crystal display. The polarizer also includes a transparent conducting layer disposed over the top surface. The transparent conducting layer being configured to electrically shield the LCD from a touch panel. The polarizer further includes a coating layer disposed over the transparent conducting layer.

Abstract: In one embodiment, an array substrate includes a first array area and a second array area adjoining the first array area. The first array area includes a first electric power supply line arranged along a periphery of the first array area. The second array area includes a pixel electrode, a second electric power supply line arranged along a periphery of the second array area, and an electric power supply pad electrically connected with the second electric power supply line. The electric power supply pad is arranged facing the first electric power supply line so as to sandwich a boundary between the first array area and the second array area. Corner potions of the electric power supply pad facing the first electric power supply line are formed in an arc shape.

Abstract: A display apparatus includes a base substrate, a data line to transmit a data signal, a gate line disposed on the base substrate and insulated from the data line, and a pixel electrically connected to the gate line and/or the data line via a thin film transistor. At least one of the data line and the gate line includes a lower conductive layer and an upper conductive layer. The lower conductive layer includes a zinc oxide doped with a doping material. The upper conductive layer is disposed on the lower conductive layer and includes a copper, and the upper conductive layer includes crystals in which growth directions are dispersed by the doping material.

Abstract: The present disclosure is related to a liquid crystal display panel and a liquid crystal display device including: a first substrate including an active area and a non-active area which corresponds to a peripheral area of the active area; a static electricity absorbing pattern of a lattice pattern formed in the non-active area; and a second substrate facing the first substrate.

Abstract: An electro-static discharge protection circuit for a liquid crystal display is disclosed. In response to positive electro-static charges being generated on the signal line, a thin film transistor with a gate electrode connected to the high level signal line is switched on, and the positive electro-static charges are discharged through the switched on thin film transistor. In addition, in response to negative electro-static charges being generated on the signal line, a thin film transistor with a gate electrode connected to the low level signal line is switched on, and the negative electro-static charges are discharged through the switched on thin film transistor.

Abstract: A substantially rectangular display panel includes a first edge extending in a first major axis direction of the rectangular shape and a second edge extending in a second major axis direction of the rectangular shape, the second direction being different from the first direction. The display panel includes: a plurality of gate lines extending in the first direction; and a gate lines driver including a plurality of main stages sequentially connected to each other and configured for outputting gate signals to the gate lines, where the plurality of stages further includes one or more dummy stages arranged in a row along the second edge and not connected to the plurality of gate lines, and where a layout arrangement of a plurality of thin film transistors included in the main stage is different from a corresponding layout arrangement of corresponding thin film transistors included in the at least one dummy stage.

Abstract: In a display apparatus, a display panel displays an image, and a driver is electrically connected to the display panel and applies a control signal to the display panel to control an operation of the display panel. A first cover member includes a nonmetal material and covers the display panel. An opening is defined in the first cover member and exposes a display area of the display panel. A heat discharge member is coupled to the first cover member and contacts the driver to discharge a heat generated by the driver.

Abstract: A thin film transistor substrate includes pixels disposed in a display area and connected to gate lines and data lines crossing the gate lines, a gate driver disposed in a non-display area adjacent to the display area and connected to the gate lines, signal pad parts disposed in the non-display area and connected to the gate driver and the data lines, test pad parts disposed in a cutting area adjacent to the non-display area and connected to the signal pad parts, static electricity dispersion parts disposed in the cutting area and connected to the plurality of test pad parts, and a guard line disposed in the cutting area and connected to the static electricity dispersion parts. The static electricity dispersion parts disperse a static electricity inflowing from the signal pad parts and the plurality of test pad parts to the guard line.

Abstract: A gate driving apparatus includes a first stage which outputs a first gate output signal, and a second stage which outputs a second gate output signal. The first stage includes: a transistor which includes a gate electrode, a source electrode and a drain electrode; and a dummy transistor which includes a dummy gate electrode, a dummy source electrode and a dummy drain electrode. The gate electrode receives the second gate output signal, and the dummy source electrode is connected to the source electrode or the drain electrode of the transistor and prevents static electricity from flowing to the first stage.

Abstract: A display panel includes a base substrate, a gate line disposed under the base substrate and extending in a first direction, a data line disposed under the base substrate and extends in a second direction substantially perpendicular to the first direction, a thin film transistor disposed under the base substrate, and electrically connected to the gate line and the data line, a first electrode disposed under the base substrate and electrically connected to the thin film transistor, an image displaying portion disposed under the first electrode and overlapped with the first electrode, a protecting layer disposed under the image displaying portion, surrounding a lower surface of the image displaying portion and both sides of the image displaying portion in the second direction, and including a protrusion wall protruded in a direction opposite to the base substrate, and an upper polarizer disposed on the base substrate.

Abstract: An active matrix substrate (5) provided with a plurality of scan lines (G) and a plurality of data lines (Sr, Sg, Sb) arranged in a matrix, in which first, second, and third short bars (31r, 31b, 31g) are connected to the respective data lines (Sr, Sg, Sb), and, among the first, second, and third short bars, the second short bar (31b) in the middle is provided in a different layer from the first and third short bars (31r, 31g) which are positioned on the sides of the second short bar (31b).

Abstract: A system including a power supply and a clock circuitry to generate a plurality of clock signals. Each clock signal is synchronous with a primary clock signal. First, second, and third clock signals of the plurality of clock signals are asynchronous to each other. The system further includes a plurality of switches. Each switch of the plurality of switches is communicatively coupled to the power supply and the clock circuitry. A first switch of the plurality of switches receives the first clock signal, a second switch of the plurality of switches receives the second clock signal, and a third switch of the plurality of switches receives the third clock signal.

Abstract: Disclosed are a display panel in which all or some portions of an inspection pad and an inspection wire for inspection of a panel are formed in the display panel, and a display device.

Abstract: A display substrate includes a circuit mounted part that has a driving IC mounted thereon. The circuit mounted part includes an input pad part connected to an input terminal of the driving IC and an output pad part connected to an output terminal of the driving IC. A flexible pad part connected to a terminal of a FPCB includes a driving pad part to receive a drive signal of the driving IC. A driving line part is connected to the driving pad part to be extended along a length direction of the circuit mounted part within the circuit mounted part. Connection lines are extended from the driving line part disposed within the circuit mounted part toward the output pad part. The connection lines are partially removed in a trimming area defined between the driving line and the output pad part.

Abstract: An information processing apparatus generating and outputting video signals, a video display apparatus connected to the information processing apparatus and displaying a video based on the video signals received from the information processing apparatus, and a video display system including the information processing apparatus and the video display apparatus, in which a display stop instruction signal is output from the information processing apparatus toward the video display apparatus via a signal line for transmitting, to the information processing apparatus, a connection signal indicating that the video display apparatus is connected to the information processing apparatus to stop and resume the display of the video without delay while preventing a malfunction, during which a pseudo connection signal is generated so that the video display apparatus is not deemed to be removed from the information processing apparatus.

Abstract: A touch panel including a substrate, a touch sensing array, connecting lines, extending portions, a first electrostatic discharge protection circuit, and a second electrostatic discharge protection circuit is provided. The substrate has an active region and a periphery region. The touch sensing array is disposed in the active region. The connecting lines and extending portions are disposed in the periphery region. An end of each of the connecting lines is respectively connected to the touch sensing array by the corresponding extending portion. The first electrostatic discharge protection circuit is disposed in the periphery region and located between the outermost connecting line and the edge of the corresponding substrate. The second electrostatic discharge protection circuit is disposed in the periphery region and located between the innermost connecting line and the touch sensing array. The second electrostatic discharge protection circuit overlaps with the extending portions on the substrate.

Abstract: An array substrate includes a common electrode line located in a surrounding region, a protected structure located inside the common electrode line, and a first electrostatic protection circuit having a shorting bar electrically connected between the protected structure and the common electrode line for releasing static electricity on the protected structure. A second electrostatic protection circuit is also electrically connected between the protected structure and the common electrode line, and the second electrostatic protection circuit releases static electricity through the common electrode line after the shorting bar is cut off.

Abstract: Disclosed are a liquid crystal display device and a method for fabricating the same. The liquid crystal display device includes first and second substrates joined to and facing each other, a TFT formed in each pixel of an active area on the first substrate, a first discharge line formed in a non-active area on the first substrate, a protective layer formed over the entire surface of the first substrate, including the TFT and the first discharge line, a second discharge line surrounding an outer region of the first discharge line in the non-active area on the first substrate, a plurality of contact holes passing through the protective layer to expose a portion of the first discharge line, a connection pattern branching from the second discharge line, and covering the respective contact holes, and an electrostatic discharge layer formed on the outside surface of the second substrate.

Abstract: The embodiment of present invention discloses a liquid crystal display panel and a liquid crystal display. The liquid crystal display panel comprises: a color filter substrate and an array substrate, which are assembled oppositely to form a cell; a liquid crystal layer provided between the color filter substrate and the array substrate; and a layered structure adapted to drive rotation of liquid crystal in the liquid crystal layer and comprising a gate metallic layer, a pixel electrode layer and a common electrode layer, wherein the gate metallic layer comprises a gate wiring, the common electrode layer comprises a first auxiliary electrode and a common electrode that are electrically-insulated, the pixel electrode layer comprises a pixel electrode, and the common electrode and the pixel electrodes are used to form an electric field for driving the liquid crystal; and wherein the first auxiliary electrode and the gate wiring are electrically connected so as to be connected in parallel in circuit.

Abstract: The present invention provides an anti-static structure of an array substrate, which comprises: an effective region 20 of the array substrate, a gate line shorting bar 30 and a data line shorting bar 40, the effective region 20 of the array substrate is provided with a plurality of parallel gate lines 22 and data lines 24, the gate line shorting bar 30 is electrically connected with one side of the plurality of gate lines 22, the data line shorting bar 40 is electrically connected with one side of the plurality of data lines 24. The present invention only utilizes a gate line shorting bar to short all gate lines and utilizes a data line shorting bar to short all data lines, in order to greatly avoid the abnormal discharge of the plasma generated when the hole is formed cause static damage to the metal overlapping traces of the shorting bar.

Abstract: A liquid crystal display (LCD) device, an array substrate in the LCD device, and a method of manufacturing the array substrate are proposed. The LCD device includes an array substrate, a color filter (CF) substrate, and a liquid crystal (LC) layer sandwiched between the array substrate and the CF substrate. A voltage-applying circuit, an auxiliary wire, and a first test pad are disposed on the array substrate. The auxiliary wire is adjacent to the voltage-applying circuit. The auxiliary wire and the voltage-applying circuit are made of the same unit and undergo the same process. If the reference wire is examined to be defective, it could refer that the voltage-applying circuit might have a fault after references and comparisons. So the array substrate could be controlled or repaired, reducing the number of defective products.

Abstract: The present invention provides a shorting strip structure of a liquid crystal display panel and a liquid crystal display panel. The shorting strip structure includes: an even-numbered gate line and an odd-numbered gate line that are arranged parallel, a plurality of even-numbered data lines and a plurality of odd-numbered data lines that are arranged parallel, and a shorting strip that is arranged parallel to the even-numbered gate line. The even-numbered data lines are perpendicularly connected to the even-numbered gate line. The odd-numbered data lines are perpendicularly connected to the odd-numbered gate line. The shorting strip is electrically connected to ends of the plurality of even-numbered data lines that are adjacent to the even-numbered gate line.

Abstract: Disclosed is a display device. The display device includes a panel in which a plurality of pixels are respectively formed in a plurality of pixel areas defined by intersections between a plurality of gate lines and a plurality of data lines, a source driving IC coupled to the plurality of data lines in a first non-display area of the panel and configured to respectively supply data voltages to the plurality of data lines, and an ESD circuit in which, to prevent static electricity from flowing into the plurality of data lines, in the first non-display area, a end of one side of the ESD circuit is coupled to a corresponding data line, a end of the other side is coupled to a power line, and a length of a channel through which a current flows is formed greater than a width of the channel.