Data Verification Patents (Class 360/53)
  • Patent number: 9904591
    Abstract: Techniques and mechanisms to provide selective access to data error information by a memory controller. In an embodiment, a memory device stores a first value representing a baseline number of data errors determined prior to operation of the memory device with the memory controller. Error detection logic of the memory device determines a current count of data errors, and calculates a second value representing a difference between the count of data errors and the baseline number of data errors. The memory device provides the second value to the memory controller, which is unable to identify that the second value is a relative error count. In another embodiment, the memory controller is restricted from retrieving the baseline number of data errors.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: February 27, 2018
    Assignee: Intel Corporation
    Inventors: John B. Halbert, Kuljit S. Bains, Debaleena Das, Bill Nale
  • Patent number: 9886977
    Abstract: A recording medium having improved signal-to-noise ratio (SNR) capabilities includes dual cap layers over the recording layer, where the Curie temperature of the first cap layer over the recording layer is greater than the Curie temperature of the recording layer, and the Curie temperature of the second cap layer over the first cap layer is greater than the Curie temperature of the first cap layer. The first cap layer may be composed of a magnetically hard material, such as L10 CoPt, where the second cap layer may be composed of a magnetically soft material, such as Co. Such a medium is particularly useful in the context of heat-assisted magnetic recording (HAMR).
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: February 6, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Oleg Mryasov, Alan Kalitsov, Hoan Ho, Paul Dorsey, Gerardo Bertero
  • Patent number: 9881643
    Abstract: A data storage device is disclosed comprising a head actuated over a disk comprising a plurality of tracks. A first codeword is generated comprising first redundancy, and first position information of the head relative to a first track is saved while writing the first codeword to the first track. A second codeword is generated comprising second redundancy, and second position information of the head relative to a second track is saved while writing the second codeword to the second track. Extended redundancy is generated for the first codeword based on the first and second position information, and the first codeword is recovered from the first track based on the extended redundancy generated for the first codeword.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: January 30, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventor: Derrick E. Burton
  • Patent number: 9875037
    Abstract: Embodiments of the present invention provide systems, methods, and computer program products for implementing multiple raid level configurations in a computer storage device. In one embodiment, performance or resiliency of application data being executed to a single computer storage device can be prioritized. Embodiment of the present invention provide systems, methods, and computer program products for a recovery operation, responsive to determining to prioritize performance of application data being executed to the single computer storage device.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: January 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: Mudi M. Fluman, Yaacov Frank, Yehuda Shiran, Ronny Vatelmacher
  • Patent number: 9857995
    Abstract: A data storage device is disclosed comprising a volatile memory, a primary and a secondary non-volatile memory (NVM), and control circuitry coupled to the volatile memory and the primary and secondary NVM and configured to write first data to the volatile memory, write the first data from the volatile memory to the secondary NVM before writing the first data to the primary NVM, attempt to write the first data to the primary NVM, wherein, during the attempt to write the first data to the primary NVM, after a portion of the first data has been successfully written to the primary NVM, a corresponding portion of the first data is released from the secondary NVM.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: January 2, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Totok Sulistiomono Sujanto, Li Dong
  • Patent number: 9846612
    Abstract: Various embodiments of methods and systems for bit flip identification for debugging and/or power management in a system on a chip (“SoC”) are disclosed. Exemplary embodiments seek to identify bit flip occurrences near in time to the occurrences by checking parity values of data blocks as the data blocks are written into a memory component. In this way, bit flips occurring in association with a write transaction may be differentiated from bit flips occurring in association with a read transaction. The distinction may be useful, when taken in conjunction with various parameter levels identified at the time of a bit flip recognition, to debug a memory component or, when in a runtime environment, adjust thermal and power policies that may be contributing to bit flip occurrences.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: December 19, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Madan Krishnappa, Chinh Tran, Li Zhang, Alan Young, William Bainbridge, Bohuslav Rychlik
  • Patent number: 9824020
    Abstract: Systems and methods for managing memory in a dynamic translation computer system are provided. Embodiments may include receiving an instruction packet and processing the instruction packet. The instruction packet may include one or more instructions for obtaining a block of virtual memory for use in an emulated operating environment from a slab of virtual memory in a host environment, maintaining a mapping between the block of virtual memory and physical memory when the block is returned to the host environment, and for filling the block of virtual memory with zeros and a pattern based, at least in part, on a detected fill type.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: November 21, 2017
    Assignee: Unisys Corporation
    Inventors: Michael Rieschl, James Merten, Brian Garrett, Steven Bernardy
  • Patent number: 9799371
    Abstract: A tape apparatus includes a tape drive and a processor. The tape drive is configured to perform data reading and data writing on a magnetic tape in which a plurality of tracks are formed. The processor is configured to control the tape drive to perform data reading and data writing on the plurality of tracks in a first segment among a plurality of segments obtained by dividing the magnetic tape in a running direction. The processor is configured to reserve a first track of the plurality of tracks as a copy target upon determining that an abnormality occurs in the first segment on the first track. The processor is configured to instruct the tape drive to copy data recorded in the first segment on the first track to a second segment on the first track at a predetermined timing. The second segment is adjacent to the first segment.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: October 24, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Nobuyuki Hirashima, Takashi Murayama, Takuya Kurihara, Takaaki Yamato, Katsuo Enohara, Naoki Hirabayashi
  • Patent number: 9773531
    Abstract: A disclosed example method involves performing simultaneous data accesses on at least first and second independently selectable logical sub-ranks to access first data via a wide internal data bus in a memory device. The memory device includes a translation buffer chip, memory chips in independently selectable logical sub-ranks, a narrow external data bus to connect the translation buffer chip to a memory controller, and the wide internal data bus between the translation buffer chip and the memory chips. A data access is performed on only the first independently selectable logical sub-rank to access second data via the wide internal data bus. The example method also involves locating a first portion of the first data, a second portion of the first data, and the second data on the narrow external data bus during separate data transfers.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: September 26, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganthan
  • Patent number: 9691450
    Abstract: A memory circuit, such as an embedded DRAM array, stores information as groups of bits or data using information coding in storage and retrieval data, instead of each bit being stored separately. Write data words can be mapped to storage format words that are stored and defined by a Hadamard matrix. The storage format word is stored as charge levels in an addressable memory location. For retrieving stored data, charge levels are read from the storage cells and interpreted to a valid storage format word. Hadamard code maximal likelihood decoding can be used to derive a read data word corresponding to a previously written write data word. The write data word is then output as the result of a read of the selected addressable location, or a portion thereof. The mapping can be two or more Hadamard matrix mappings concatenated for each of a plurality of storage format words.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: June 27, 2017
    Assignee: KANDOU LABS, S.A.
    Inventors: Harm Cronie, Amin Shokrollahi
  • Patent number: 9678864
    Abstract: A device includes one or more data storage media having a main storage area, and includes a non-volatile cache memory and a controller. The controller stores a plurality of data packets into a plurality of physical locations in the main storage area. Each of the data packets is associated with a different logical block address (LBA), and each of the physical locations is associated with a different physical location address (PLA). The controller generates mapping information that links the different LBAs to the different PLAs. Upon detecting a soft error when reading a data packet stored in a physical location, the controller relocates the data packet associated with the soft error to a physical location of the non-volatile cache memory. The controller also marks the physical location as a suspect location. The controller updates the mapping information to reflect the relocation of the data packet associated with the soft error.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: June 13, 2017
    Assignee: Seagate Technology LLC
    Inventors: Jun Cai, AndiSumaryo Sutiawan, Jeetandra Kella, ChuanPeng Ong, Mark Allen Gaertner, Brian T. Edgar
  • Patent number: 9672940
    Abstract: In response to a request to read data, the non-volatile memory system identifies the physical block that is storing the requested data. Read parameters associated with the physical block are also identified. The read parameters include bit error rate information. The memory system chooses whether to use a read process with a faster sense time or a read process with a slower sense time based on the bit error rate information and temperature data. The requested data is read from the identified physical block using the chosen read process configured by at least a subset of the read parameters.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: June 6, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Phil Reusswig, Nian Niles Yang, Grishma Shah
  • Patent number: 9640201
    Abstract: Implementations disclosed herein provide a method comprising comparing high-latency data sectors of a storage band, the high-latency data sectors having latency above a predetermined threshold, with target sectors for storing new data to determine one or more of the high-latency data sectors that may be skipped during retrieval of at-rest data from the storage band.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: May 2, 2017
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Jian Qiang, Wen Xiang Xie, Libin Cai, Andrew Kowles
  • Patent number: 9621193
    Abstract: Various embodiments for data error recovery in a tape storage system, by a processor device, are provided. In one embodiment, a method comprises, in a tape storage system using an iterative hardware decoder, dynamically initializing at least one microcode-initiated decode cycle on a buffered dataset, each iterative decode cycle providing an error feedback loop.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: April 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven R. Bentley, Pamela R. Nylander-Hill
  • Patent number: 9582360
    Abstract: In one embodiment, an apparatus for reading data from a data storage medium includes a processor and logic integrated with and/or executable by the processor, the logic being configured to: read data from a data storage medium, the data including a plurality of data sets, determine that an error condition is detected for a data set read from the data storage medium, determine whether the data set was read from the data storage medium using multiple cut and paste (C/P) error recovery procedure (ERP) (C/P ERP Multi), and when the data set was read from the data storage medium using C/P ERP Multi: continue reading data from the data storage medium normally when the detected error condition has been overcome using C/P ERP Multi; otherwise, continue using C/P ERP Multi to read data from the data storage medium until the error condition is overcome.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: February 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Takashi Katagiri, Yuhko Mori, Pamela R. Nylander-Hill
  • Patent number: 9576605
    Abstract: A magnetic disk apparatus includes a disk and a controller. The disk includes a plurality of tracks including a first track and a second track that is different from the first track. A plurality of data sectors are located on the tracks. The data sectors include short data sectors and long data sectors, each including a plurality of short data sectors. If the controller accesses a long data sector located at an end of the first track, the controller first accesses a short data sector of the long data sector at the end of the first track, and then accesses a short data sector of the long data sector at the beginning of the second track.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: February 21, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Matsuo, Kenji Yoshida, Kazuya Takada, Yosuke Kondo
  • Patent number: 9536558
    Abstract: Techniques for reducing the time required for erasing specific data recorded on a tape medium. A specific group of records is erased without preliminarily locating the erasure end position. This is carried out by simultaneously utilizing three heads, that is, two read heads and one write head, to detect the erasure end position during data erasure. Various embodiments are applicable to tape media as well as other storage media. Various embodiments are not only applicable as a file system cooperating as a combination of hardware (H/W) and software (S/W), but also applicable in systems, such as databases, that directly use storage without an intermediary file system.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Masayuki Iwanaga, Yumiko Ohta, Yutaka Oishi
  • Patent number: 9519496
    Abstract: In an exemplary embodiment, a virtual disk file can be assigned an identifier and a virtual disk files that is dependent on the virtual disk file can include a copy of the identifier. In the instance that the virtual disk file is opened and data is modified that causes the contents of a virtual disk extent to change the identifier can be changed. If the virtual disk file and the dependent virtual disk file are used to instantiate a virtual disk the difference between identifiers can be detected, which is indicative of the fact that the virtual disk may be corrupted. Other techniques are described in the detailed description, claims, and figures that form a part of this document.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: December 13, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: John A. Starks, Dustin L. Green, Todd William Harris, Mathew John, Senthil Rajaram, Eric Traut
  • Patent number: 9507525
    Abstract: A system and method are provided for pooling storage devices in a virtual library for performing a storage operation. A storage management device determines a storage characteristic of a plurality of storage devices with respect to performing a storage operation. Based on a storage characteristic relating to performing the storage operation, the storage management device associates at least two storage devices in a virtual library. The storage management device may continuously monitor the virtual library and detect a change in storage characteristics of the storage devices. When changes in storage characteristics are detected, the storage management device may change associations of the storage device in the virtual library.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: November 29, 2016
    Assignee: Commvault Systems, Inc.
    Inventors: Rajiv Kottomtharayil, Ho-Chi Chen
  • Patent number: 9478298
    Abstract: A method of reading data in a memory system including a non-volatile memory device, includes reading first data stored in a first block using a first read scheme capable of detecting/correcting an error in the first data, and upon determining an uncorrected error in the first data, setting the first block as a first temporary bad block and reading second data stored in the first temporary bad block using a second read scheme different from the first read scheme.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: October 25, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Ho Shin, Heung-Soo Lim
  • Patent number: 9437240
    Abstract: The disclosed technology provides for a method and system comprising determining a write-encroachment threshold of a recording medium as a percentage of cross-track width of tracks in the recording medium, determining a track as off-track based on a position error signal level for the track exceeding the write-encroachment threshold, flagging one or more tracks substantially near the off-track, and writing write data for the one or more flagged tracks to a media cache. In a recovery process, the write data can be later transferred back to the flagged tracks.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: September 6, 2016
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventor: Quinn J. Haddock
  • Patent number: 9425829
    Abstract: Systems and methods for adaptive error correction codes (ECCs) for electronic memories. In some embodiments, a memory device, may include a first memory having a plurality of address locations, each of the plurality of address locations having a number of storage bits configured to store data and one or more error correction bits corresponding to the data; and a second memory distinct from the first memory, the second memory having a plurality of entries, each of the plurality of entries configured to store one or more operation code bits relating to data stored at a corresponding address location in the first memory, the one or more operation code bits identifying an error correction scheme used to generate the one or more error correction bits at the corresponding address location in the first memory.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: August 23, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ravindraraj Ramaraju, George P. Hoekstra
  • Patent number: 9407480
    Abstract: An apparatus according to an embodiment of the present disclosure includes a plurality of target circuits, the number of the target circuits being more than a required number of the target circuits; a characteristic adjustment unit configured to adjust characteristics of the target circuits; and a control unit configured to control a state of the target circuits between a used state and an unused state. The control unit controls the required number of the target circuits to be in the used state and controls the rest of the target circuits to be in the unused state. The characteristic adjustment unit adjusts the characteristics with respect to the target circuits in the unused state.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: August 2, 2016
    Assignee: Sony Corporation
    Inventors: Takashi Yokokawa, Kenichi Maruko
  • Patent number: 9400797
    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for combining recovered portions of a data set. In one particular case, a system is disclosed that includes a stitching circuit and a data recovery circuit. The stitching circuit is operable to: receive a data set including at least a first fragment and a second fragment; replicate data from at least one of the first fragment and the second fragment as stitching values; and aggregate the first fragment with the second fragment with the stitching values between the first fragment and the second fragment to yield a combined data set. The data recovery circuit is operable to process the combined data set to yield an original data set.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: July 26, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Shaohua Yang, Xuebin Wu, Shu Li
  • Patent number: 9397698
    Abstract: Systems and methods for error recovery are presented. Data is decoded with an iterative decoding scheme having a first set of parameters. In response to a determination that the iterative decoding scheme has failed, the data is re-read. While the data is being re-read, the iterative decoding scheme is reconfigured with a second set of parameters, and the data is decoded with the reconfigured iterative decoding scheme. In response to determination that the reconfigured iterative decoding scheme has failed, an error type associated with the data is determined. An error recovery scheme is selected from a plurality of error recovery schemes for the data based on the determined error type.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: July 19, 2016
    Assignee: MARVELL INTERNATIONAL LTD.
    Inventors: Gregory Burd, Nedeljko Varnica, Yifei Zhang, Nitin Nangare
  • Patent number: 9384599
    Abstract: Provided is a method of receiving data from a vehicle having an onboard computer. The vehicle identification data location on the vehicle is optically scanned and matched to a second protocol database to identify the specific protocol useful for retrieving desired diagnostic data from the vehicle. A diagnostic device is connected to the vehicle onboard computer and polls the onboard computer to identify a protocol useful to establish a communication link between the diagnostic device and the onboard computer. Once the communication link is established, the diagnostic device is configured communicate an information request to the onboard computer in the specific protocol(s) associated with vehicle identification data. The diagnostic data received from the onboard computer may then be communicated to a remote diagnostic database, via a cellphone, to identify a possible vehicle fix(es) for defects associated with the received diagnostic data.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: July 5, 2016
    Assignee: Innova Electronics, Inc.
    Inventors: Ieon C. Chen, Robert Madison, Keith Andreasen, Phuong Pham
  • Patent number: 9348882
    Abstract: A method transfers data to be archived from a runtime database into an archive database. A temporary database acts as a buffer database for a selected data record set for archiving. For each table of the runtime table subset, the selected record subset to be archived is copied into its corresponding table of the temporary table set. For each table of the temporary table set, the selected record subset to be archived is copied into its corresponding table of the archive table subset. For each table of the temporary table set, a temporary deletion table containing a set of primary keys of the records to be deleted from the runtime database is created. In the runtime database, for each runtime table having a corresponding temporary deletion table of the set of temporary deletion tables, deleting records having a primary key matching the primary key set of its corresponding temporary table.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: May 24, 2016
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Federico Risso, Marco Mazzarone
  • Patent number: 9330708
    Abstract: Techniques for reducing the time required for erasing specific data recorded on a tape medium. A specific group of records is erased without preliminarily locating the erasure end position. This is carried out by simultaneously utilizing three heads, that is, two read heads and one write head, to detect the erasure end position during data erasure. Various embodiments are applicable to tape media as well as other storage media. Various embodiments are not only applicable as a file system cooperating as a combination of hardware (H/W) and software (S/W), but also applicable in systems, such as databases, that directly use storage without an intermediary file system.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: May 3, 2016
    Assignee: International Business Machines Corporation
    Inventors: Masayuki Iwanaga, Yumiko Ohta, Yutaka Oishi
  • Patent number: 9319067
    Abstract: A storage control apparatus writes n pieces of data (here, n is an integer greater than 1) in a first memory apparatus, and reads the n pieces of written data from the first memory apparatus. A parity calculation unit calculates parity based on divided data extracted from each of the n pieces of data for each certain size, and stores the calculated parity in a second memory apparatus. A read control unit restores, in reading the n pieces of data from the first memory apparatus, at least one of the n pieces of data instead of reading it from the first memory apparatus but using other data having been read from the first memory apparatus among the n pieces of data and the parity stored in the second memory apparatus.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: April 19, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Kenji Uchiyama
  • Patent number: 9298720
    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for fragmenting a data set and recovering the fragmented data set. As one example, a data processing system is discussed that includes: a fragmenting circuit operable to separate a data set into at least a first fragment and a second fragment; and a transfer packet formation circuit operable to: append identification information to the front of the first fragment, and at least a first M+N bits of the second fragment to the end of the first fragment to yield a first transfer fragment, and aggregate the first transfer fragment with other transfer fragments to yield an aggregate output.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: March 29, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Haitao Xia, Lu Lu, Shu Li, Xuebin Wu
  • Patent number: 9236085
    Abstract: A disk drive including a disk storing a defect log including one or more defect records, wherein each of the defect records spans multiple words and comprises chunks which are word aligned, each chunk comprising one or more record fields, and a controller configured to read the defect records on a word basis. A method for performing a defect process on the disk drive including selecting a defect record from the defect log, selecting record fields in the selected defect record, reading the selected defect record on a word basis, and searching the selected record fields which are located in a same chunk of the selected record at a same time to determine when the selected defect record matches a target defect record.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: January 12, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: Gomez S. Selvaraj, William J. Seamon
  • Patent number: 9196296
    Abstract: A system for reading a magnetic tape is provided. The system comprises a magnetoresistive head, a tape controller, an analog-to-digital converter and a processing unit. The tape transport controller controls a movement of a magnetic tape with respect to the magnetoresistive head. The analog-to-digital converter generates a signal upon receiving an analog signal read by the magnetoresistive head on the magnetic tape. The processing unit identifies a magnetic flux transition in the signal to detect a bit from the signal from the signal based on the identified magnetic flux transition. Identification of the magnetic flux transition in the signal includes analyzing voltage wave forms of the signal. A method and a computer readable storage medium for reading a magnetic tape are also disclosed.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: November 24, 2015
    Assignee: JBI INC
    Inventor: John William Bordynuik
  • Patent number: 9183083
    Abstract: According to one embodiment, a controller includes a generator and a creator. The generator generates a channel matrix by counting a number of times a combination of a correct bit value and a read level appears for each bit forming a decoded first frame, based on readout data indicating a read level of each of a plurality of bits forming a frame and the decoded frame. The creator creates a table by statistically calculating a likelihood of a correct bit value of each read level based on the channel matrix.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: November 10, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenji Sakurada, Hironori Uchikawa
  • Patent number: 9153287
    Abstract: Methods and apparatus for facilitating pre-read and/or post-read operations of a disk drive. A write command is received including a logical block address (LBA) for user data in the write command. Parity data for correcting the user data is generated by encoding the LBA with the user data. The parity data is written on a disk of the disk drive with the user data so that the LBA can be recovered using the parity data when read from the disk. When a read command is received by the disk drive, requested user data is read from a first sector. User data and parity data is read from a second sector adjacent the first sector. The parity data is used to recover an LBA for the second sector and it is determined whether to store the user data read from the second sector based on the recovered LBA.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: October 6, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: David M. Hamilton, Patrick J. Lee
  • Patent number: 9142252
    Abstract: In one embodiment, a magnetic disk drive includes a magnetic disk having data tracks, a magnetic head, a motion mechanism for moving the magnetic head, and a controller. The controller adds a value to a rewrite parameter for a rewrite region based on a number of writes to data tracks related to the rewrite region, the value is chosen to reflect a degree of influence the number of writes have on the rewrite region, and the magnetic head rewrites data of the rewrite region when the rewrite parameter is greater than a threshold. In another embodiment, a method includes writing data tracks in a rewrite region, defining values reflecting a degree(s) of influence on the rewrite region, adding the values to a rewrite parameter upon writing data to the data tracks, determining that the rewrite parameter has reached or exceeded a threshold and rewriting data in the rewrite region.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: September 22, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Toru Aida, Shuhsuke Kurihara, Toshihiko Tsunokawa, Hideaki Maeda
  • Patent number: 9128617
    Abstract: In one embodiment, a method includes storing data received from at least two data sources in a buffer, writing the data from the at least two data sources to regions in a first wrap of a tape on a data-source basis in a first predetermined order, and writing the data from the at least two data sources to regions in the second wrap in a second predetermined order, the second predetermined order being a reverse order relative to the first predetermined order.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: September 8, 2015
    Assignee: International Business Machines Corporation
    Inventors: Shinobu Fujihara, Yutaka Oishi
  • Patent number: 9128624
    Abstract: A flash memory storage system including a flash memory chip, a connector, and a controller is provided. The flash memory chip has a plurality of physical blocks. The connector is configured to couple to a host system. The controller is coupled to the flash memory chip and the connector. The controller configures a plurality of logical blocks and maps the logical blocks to a portion of the physical blocks. In addition, the controller identifies rewritable disc commands from the host system and writes data from the host system into the physical blocks mapped to the logical blocks according to the rewritable disc commands. Thereby, a rewritable disc device is simulated by using the flash memory storage system.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: September 8, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Hon-Wai Ng, Yi-Hsiang Huang, Shih-Hsien Hsu, Hsiang-Hsiung Yu
  • Patent number: 9117463
    Abstract: A data storage device is disclosed comprising a disk comprising a plurality of data tracks, and a head actuated over the disk. A retry operation for a target data track is performed by positioning the head at a first radial location and first erasing at least part of a first data track adjacent the target data track. After the first erasing, the target data track is first read to first recover target data recorded in the target data track. When the first recovery fails, the head is positioned at a second radial location and more of the first data track is second erased. After the second erasing, the target data track is second read to second recover the target data recorded in the target data track.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: August 25, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kathy X. Tang, Jerry G. Le
  • Patent number: 9106256
    Abstract: A data processing device and a data processing method capable of improving the resistance to error of data. An LDPC encoder performs encoding using an LDPC code having a code length of 4320 bits and a coded rate of one of four types including ½, 7/12, ?, ¾. A parity check matrix H of the LDPC code is configured by arranging elements of 1's of an information matrix, which are determined based on a parity check matrix initial value table of the parity check matrix H representing positions of elements of 1's of the information matrix corresponding to an information length according to the code length and the coded rate for every 72 columns, in a column direction at a period of 72 columns. The parity check matrix initial value table, for example, is used for digital broadcasting for mobile terminals.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: August 11, 2015
    Assignee: SONY CORPORATION
    Inventors: Yuji Shinohara, Atsushi Kikuchi, Makiko Yamamoto, Takashi Yokokawa
  • Patent number: 9099157
    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for confirming data validity. In one case, a system is disclosed that includes an adjacent track interference confirmation circuit. The adjacent track interference confirmation circuit is operable to receive an indication of an adjacent track interference; determine a causal connection between the adjacent track interference and a mis-alignment of a read head and a track on a storage medium from which a data set corresponding to the indication of the adjacent track interference is derived; and provide a re-write signal where even after reduction of the mis-alignment the indication of adjacent track interference repeats.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: August 4, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Eui Seok Hwang, Shaohua Yang
  • Patent number: 9099159
    Abstract: A disk drive is disclosed comprising a disk comprising a plurality of servo tracks defined by servo sectors, a head actuated over the disk, and control circuitry comprising a read channel. A plurality of data tracks are defined relative to the servo tracks, wherein each data track comprises a plurality of segments. The read channel is configured into a read mode in order to first read a first segment of a first data track. During the first read, a quality metric is generated at periodic points along the first segment. After the first read, the read channel is configured into a non-read mode for a predetermined interval. After the predetermined interval, the read channel is configured into the read mode in order to second read the first segment of the first data track and generate the quality metric at the periodic points along the first segment.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: August 4, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kevin S. Curran, Anthony E. Pione, Jinghuan Chen
  • Patent number: 9092138
    Abstract: Embodiments of methods and systems comprise collecting data associated with a library or library components and storing the collected data in repository. By collecting data associated with a library or library components and storing the collected data in a repository, the degradation of library components can be monitored and the reliability of library components determined, allowing unreliable components to be bypassed or replaced, enhancing the reliability of the library and preventing data loss.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: July 28, 2015
    Assignee: KIP CR P1 LP
    Inventor: Robert C. Sims
  • Patent number: 9058109
    Abstract: Embodiments of methods and systems comprise identifying failing media and/or drives for a media library. Error data can be collected from media libraries. For each tape exhibiting an error rate of interest, a determination can be made whether the tape would still have been of interest had it not been loaded in certain drives. This information can be analyzed to identify failing drives or tapes.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: June 16, 2015
    Assignee: KIP CR P1 LP
    Inventors: William H. Moody, II, Robert C. Sims, Brian J. Bianchi
  • Patent number: 9053747
    Abstract: A disk drive is disclosed comprising a head actuated over a disk comprising a plurality of tracks, wherein each track comprises a plurality of data sectors. A test pattern is written to at least one data sector in at least one track, and the test pattern is read from the disk to generate a noisy read signal comprising added noise. An estimated data sequence is detected from the noisy read signal, and an amplitude of the added noise is increased until a failure detection metric reaches a metric threshold. A failure threshold is generated based on the amplitude of the added noise when the failure detection metric reaches the metric threshold, and a failure condition of the disk drive is predicted based on the failure threshold.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: June 9, 2015
    Assignee: Western Digitial Technologies, Inc.
    Inventors: Baoliang Zhang, Carl E. Barlow, Chun Sei Tsai
  • Patent number: 9042045
    Abstract: A disk drive is disclosed including a disk having a plurality of sectors, and a head actuated over the disk. A defect threshold is initialized, and a first sector is read to generate a first read signal. The first read signal is processed to detect a defect in the first sector relative to the defect threshold. After detecting the defect, the defect threshold is adjusted and the first sector is reread to generate a second read signal. The second read signal is processed to detect the defect in the first sector relative to the adjusted defect threshold.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: May 26, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dean V. Dang, Kek Ming Chua, King S. Goh, Prakash Balasubramaniam, Ming Jin
  • Patent number: 9036284
    Abstract: Systems and methods are disclosed for isolated bands of fractional tracks in data storage devices, particularly devices employing shingled magnetic recording. In one embodiment, a device may comprise a data storage medium including a first data storage area including tracks overlapped in a shingled manner and having a first circumferential portion of a track to store data, a second data storage area, and a guard area disposed between the first data storage area and the second data storage area, the guard area including a second circumferential portion of the track as a partial guard track. In some embodiments, the guard area may include at least one sector in the first circumferential portion of the track, such that at least one sector of the guard area is interposed between data storage sectors of the first data storage area.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: May 19, 2015
    Assignee: Seagate Technology LLC
    Inventor: Timothy R. Feldman
  • Patent number: 9030771
    Abstract: A media drive includes drive side circuitry that, in response to a request to validate compressed data read from media, validates packets of the compressed data while compressed and, in response to detecting end of data on the media without having detected an unrecoverable corrupt one of the packets and without decompressing the compressed data, generates a message indicating that the compressed data read from the media has been validated.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: May 12, 2015
    Assignee: Oracle International Corporation
    Inventor: David G. Hostetter
  • Patent number: 9030772
    Abstract: Disclosed herein are methods and apparatuses that provide for variable data density on a disc data storage medium, where the variable data density may have a circumferential definition and a radial definition. In some examples, devices and methods may include measuring a read or write performance attribute on a disc data storage medium and selectively setting a data density rate that may vary in a circumferential direction for the disc data storage medium based on the read or write performance attribute. In other examples, apparatuses can include a data storage device having a disc data storage medium and a controller configured to measure a performance attribute of the disc data storage medium and to selectively set different Bits Per Inch (BPI) for data storage within different areas of the disc.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: May 12, 2015
    Assignee: Seagate Technology LLC
    Inventor: Tae Young Kim
  • Patent number: 9025264
    Abstract: Methods for measuring media performance associated with adjacent track interference are provided. One such method includes iteratively writing data to a target track for each of a plurality of n frequencies, measuring a first signal amplitude and a first noise for each of the n sectors on the target track, writing an aggressor track pattern proximate the target track, measuring a second signal amplitude and a second noise for each of the n sectors on the target track, calculating a weighted sum for each of the signal amplitude measurements for each of the plurality of n frequencies, and calculating a weighted sum for each of the noise measurements for each of the plurality of n frequencies, and repeating the writing the aggressor track pattern, the measuring the second signal amplitude and the second noise, and calculating the weighted sums for preselected numbers of times.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: May 5, 2015
    Assignee: WD Media, LLC
    Inventors: Mrugesh Desai, Harold H. Gee, Mark A. Nichols
  • Patent number: 9025267
    Abstract: A data storage device is disclosed comprising a disk comprising a plurality of data tracks, and a head comprising a first read element and a second read element. A first data track is read using the first read element to generate a first read signal, and the first read signal is sampled to generate first signal samples. A first branch metric is generated in a first trellis sequence detector when detecting a first data sequence based on one of the first signal samples. A second data track adjacent the first data track is read using the second read element to generate a second read signal, and the second read signal is sampled to generate second signal samples. A second branch metric is generated in a second trellis sequence detector when detecting a second data sequence based on one of the second signal samples and the first branch metric.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: May 5, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alvin J. Wang, Shafa Dahandeh