Impedance Insertion Patents (Class 361/58)
  • Patent number: 7339772
    Abstract: Embodiments of the present invention provide methods and circuitry for protecting a circuit during hot-swap events. Hot swap protection circuitry includes as overcurrent detection circuit which decouples power from a load. Circuitry is provided to detect ground-fault conditions. Noise detection circuitry is provided to reduce noise in the power that is delivered to the load.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: March 4, 2008
    Assignee: Ixys Corporation
    Inventor: Sam Seii Ochi
  • Patent number: 7327542
    Abstract: In a current limiter for limiting currents in case of a fault including an additional device comprising an additional electric valve connected in series and being conductive in the same direction as the associated main valve, two series-connected valve branches arranged in opposition bypass two series connected current limiting inductors and both additional valves are bypassed by a similar passively complex connection for limiting current in the case of a fault, wherein the current limiter is not noticeable during normal operation, but, in the event of a fault, effectively limits the short circuit to a predetermined extent.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: February 5, 2008
    Assignee: Forschungazentrum Karlsruhe GmbH
    Inventors: Klaus-Peter Juengst, Mathias Noe, Grigory Kuperman
  • Patent number: 7324315
    Abstract: A protection device is enclosed. The device has a first MOSFET (Q 10), a second MOSFET (Q 11) and a third JFET (Q 12) with their conductive paths in series with the JFET (Q 12) being located between the MOSFETS (Q 10, Q 11). The source of the first MOSFET (Q 10) is connected to the gate of the second MOSFET (Q 11) and the source of the second MOSFET (Q 11) is connected to the gate of the first MOSFET (Q 10). The MOSFETS (Q 10, Q 11) and JFET (Q 12) together form a variable resistance circuit block connectable between an input and an output The gate of the JFET (Q 12) being coupled to the input and the output by respective current sources.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: January 29, 2008
    Assignee: Fultec Pty Ltd
    Inventor: Richard Allen Harris
  • Patent number: 7321102
    Abstract: A float switch system for limiting to desirable levels current and energy entering a tank of combustible liquid comprises: a float switch disposed within the tank; an interface circuit external to the tank and coupled through wiring to the float switch; a passive transient suppression circuit coupled to the wiring external and in proximity to the tank, and operative to limit current and energy entering the tank over the wiring to the desirable levels; and a control circuit coupled to the float switch through the transient suppression circuit and to the interface circuit, the control circuit operative to monitor the status of the float switch with current within the desirable current level and to energize the interface circuit based on the switch status.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: January 22, 2008
    Assignee: Simmonds Precision Products, Inc.
    Inventors: Thomas Bruce Fox, William Jon Darling, Rollin Winter Brown, Lawrence Carl Maier
  • Publication number: 20070230076
    Abstract: An alternating current system 10 has a primary circuit 11 which forms a primary winding 18 on a core 16. A secondary winding 24 is connected with a current source 26 or, alternatively, with an impedance 60. The core 16 is threaded by a superconducting coil 20 having a current source 22. In normal use, current in the coil 20 provides a DC bias level of flux in the core 16, and the source 26 is varied to maintain substantially constant flux, thereby minimising losses in the primary circuit 11. In fault conditions, current in the coil 20 is reduced or removed to increase voltage losses across the coil 18, thereby limiting fault current. The impedance 60 can also be switched into circuit, creating further current limiting by virtue of the transformer effect of the windings 18, 24.
    Type: Application
    Filed: March 27, 2007
    Publication date: October 4, 2007
    Inventors: Stephen M. Husband, David R. Trainer
  • Patent number: 7274549
    Abstract: Compact and integral arrangements for an energy-conditioning arrangement having various predetermined energy pathways utilized in part for the purpose of conditioning energies of either one or multiple of circuitry. Some energy-conditioning arrangement variants can be operable to provide multiple, energy-conditioning operations.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: September 25, 2007
    Assignee: X2Y Attenuators, LLC
    Inventor: William M. Anthony
  • Patent number: 7268991
    Abstract: A system to protect electrical circuits from rapid changes of voltage associated with a fault in an electrical load comprises an inductor placed in series between a drive circuit and load. The inductor is designed to be inefficient or lossy when the inductor core is magnetised. Magnetisation of the core only occurs when a rapid change in voltage is applied across the inductor coils. Because the inductor is inefficient, the induced impedance in the inductor increases rapidly during a fault event. The overall impedance of the circuit increases rapidly and the rapid change in voltage is dissipated at a rate associated with the CR constant of the circuit.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: September 11, 2007
    Assignee: E2V Technologies (UK) Limited
    Inventors: Emma Louise Innes, Stephen Mark Iskander
  • Patent number: 7259951
    Abstract: A semiconductor device comprises an output transistor for controlling current that flows between a first terminal and a second terminal, a detection transistor connected in parallel with the output transistor, a detection resistor connected in series with the detection transistor, for detecting current that flows through the detection transistor as detection voltage and of which the resistance value is set in proportion to the potential difference between the first terminal and the second terminal and an over-current protection transistor for decreasing the ON current of the output transistor and the detection transistor according to the increase of the detection voltage.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: August 21, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Takao Arai
  • Patent number: 7256977
    Abstract: This invention aims at preventing a thunderbolt attack detecting circuit from determining that no thunderbolt is approaching because the thunderbolt attack detecting circuit turns to its initial condition due to power interruption caused by an approaching thunderbolt and is changed over into a normal condition in the thunderbolt approaching status maintained. This thunderbolt disaster protecting apparatus includes a thunderbolt attack detecting circuit for determining whether or not any thunderbolt is approaching by detecting a thunderbolt signal and a switching mechanism for changing over to the normal condition in which a protection object device is connected to an electrical path or to thunderbolt resisting condition in which the protection object device is separated from the electric path.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: August 14, 2007
    Assignee: Nippon Kouatsu Electric Co., Ltd.
    Inventor: Ryosaku Nakata
  • Publication number: 20070171589
    Abstract: In a zapping circuit of the present invention, resistances each formed of a polysilicon film or a tungsten silicon film are used as zapping elements. As driver elements for partially or completely fusing the resistances, low breakdown voltage MOS transistors are used. Using the MOS transistors makes it possible to reduce a region in which to form the driver elements for zapping, and to thus reduce an IC chip area.
    Type: Application
    Filed: January 5, 2007
    Publication date: July 26, 2007
    Inventor: Seiji Otake
  • Patent number: 7239492
    Abstract: A control system for at least one vacuum interrupter gap in a high-voltage switching device includes at least one non-reactive control resistor disposed in parallel with the vacuum interrupter. The non-reactive control resistor merges concentrically onto the vacuum interrupter chamber and is mechanically and electrically coupled thereto.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: July 3, 2007
    Assignee: ABB Patent GmbH
    Inventors: Markus Heimbach, Thomas Betz, Max Claessens
  • Patent number: 7230456
    Abstract: A low current consumption detector circuit, and its applications are described herein.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: June 12, 2007
    Assignee: Intel Corporation
    Inventor: Matthew G. Dayley
  • Patent number: 7203051
    Abstract: The present invention is related to electronic equipment having a controlling unit and a subordinate unit, and more particularly, to an apparatus for controlling power and signal of electronic equipment having a controlling unit and a subordinate unit which can reduce power consumption by turning off power to an unused subordinate unit at a certain period of time, and effectively reducing leakage current that flows from the controlling unit to the subordinate unit in the apparatus for extending battery usage time, and prevent distortion of waveforms of the subordinate unit's input end being sent from the controlling unit.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: April 10, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Heui-Do Lim
  • Patent number: 7145759
    Abstract: An overcurrent protection circuit for low-voltage, high-current electrical systems comprises a Positive Temperature Coefficient (PTC) resistor in series with an auto-reset thermal breaker. The breaker allows for intermittent current within an assumed product usage duty cycle, and repeatedly trips and resets on sustained high current usage or during a short-circuit fault. The PTC resistor limits current in the system to a low value when the temperature rises to the PTC resistor's trip point. The PTC resistor protects the system from thermal damage during the non-breaker-tripped portions of sustained high current use, or during continuous low-current use. The use of both the PTC resistor and auto-reset breaker provides thermal overcurrent protection while allowing for performance claims based on an assumed duty cycle of product use.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: December 5, 2006
    Assignee: Shallco, Inc.
    Inventor: Roderick M. Francis
  • Patent number: 7116537
    Abstract: A surge current prevention circuit and DC power supply for preventing surge current in various operation applications with a small circuit configuration. A power switch connects an external power supply and a load. A first PMOS transistor is connected to a constant current supply. A second PMOS transistor, which forms a current mirror, is connected to a first and second NMOS transistor. A third PMOS transistor is connected to the first and second NMOS transistor, a third NMOS transistor, and fourth and fifth NMOS transistors. A control input is connected to the third NMOS transistor. The first NMOS transistor is connected to the fourth NMOS transistor. An external power supply is connected to the second NMOS transistor. The load is connected to the fourth NMOS transistor.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: October 3, 2006
    Assignee: Freescale Semiconductor, INC
    Inventor: Hiroyuki Kimura
  • Patent number: 7113381
    Abstract: An overcurrent protection circuit for low-voltage, high-current electrical systems comprises a Positive Temperature Coefficient (PTC) resistor in series with an auto-reset thermal breaker. The breaker allows for intermittent current within an assumed product usage duty cycle, and repeatedly trips and resets on sustained high current usage or during a short-circuit fault. The PTC resistor limits current in the system to a low value when the temperature rises to the PTC resistor's trip point. The PTC resistor protects the system from thermal damage during the non-breaker-tripped portions of sustained high current use, or during continuous low-current use. The use of both the PTC resistor and auto-reset breaker provides thermal overcurrent protection while allowing for performance claims based on an assumed duty cycle of product use.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: September 26, 2006
    Assignee: Shallco, Inc.
    Inventor: Roderick M. Francis
  • Patent number: 7113383
    Abstract: A predetermined amalgamation of electrodes formed or manufactured at least in part, by predetermined, sequential manufacturing operations into a balanced and shielding electrode structure. The balanced total electrode structure also uses a grouping of identically configured, and balanced positioned, shielding electrodes that are amalgamated in sequential combination with predetermined, complimentary balanced shielded electrodes groupings and other predetermined elements that are together, practicable to provide predetermined multiple energy conditioning functions operable upon portions of propagating energy as well simultaneously being operable to provide a common, voltage reference function operable for at least dynamic circuit operations.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: September 26, 2006
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony A. Anthony, William M. Anthony, James P. Muccioli
  • Patent number: 7110227
    Abstract: The present invention relates to an interposer substrate for interconnecting between active electronic componentry such as but not limited to a single or multiple integrated circuit chips in either a single or a combination and elements that could comprise of a mounting substrate, substrate module, a printed circuit board, integrated circuit chips or other substrates containing conductive energy pathways that service an energy utilizing load and leading to and from an energy source. The interposer will also possess a multi-layer, universal multi-functional, common conductive shield structure with conductive pathways for energy and EMI conditioning and protection that also comprise a commonly shared and centrally positioned conductive pathway or electrode of the structure that can simultaneously shield and allow smooth energy interaction between grouped and energized conductive pathway electrodes containing a circuit architecture for energy conditioning as it relates to integrated circuit device packaging.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: September 19, 2006
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony A. Anthony, William M. Anthony
  • Patent number: 7110235
    Abstract: Circuit arrangement embodiments that use relative groupings of energy pathways that include shielding circuit arrangements that can sustain and condition electrically complementary energy confluences.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: September 19, 2006
    Assignee: XZY Altenuators, LLC
    Inventors: Anthony A. Anthony, Jr., William M. Anthony
  • Patent number: 7106570
    Abstract: Components embodiments that can sustain and condition complementary energy propagations and confluences of multiple circuitry.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: September 12, 2006
    Assignee: XZY Altenuators, LLC
    Inventors: Anthony A. Anthony, Jr., William M. Anthony
  • Patent number: 7099135
    Abstract: An inrush current limiter circuit (20) includes a detection circuit (30) that produces a control signal (VDRIVE) from a sense current (ISENSE). A power transistor responds to the control signal and has a source (51) coupled to an input node (12) to receive a supply voltage (ground) and a drain (53) for routing a load current (ILOAD) to an output node (45) as a protection signal (VSW). A sense transistor responds to the control signal and has a source scaled to the source of the power transistor and coupled to the input node to route a portion of the load current to the output node as the sense current.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: August 29, 2006
    Assignee: Semiconductor Components Industries, L.L.C
    Inventors: Alan Ball, David Briggs, Suzanne Nee, Stephen Robb
  • Patent number: 7072159
    Abstract: A current limiter circuit which exhibits a low dropout voltage. The current limiter circuit is suitable for protecting process control equipment operating on a current loop. The current limiter circuit includes an interface for coupling to the current loop, and a current source element coupled to the process control equipment. The current source element comprises a current limiter circuit to limit the current flowing to the process control equipment, and a voltage reference circuit coupled to the current limiter circuit provides a predetermined voltage reference during operation of the current source element.
    Type: Grant
    Filed: March 5, 2003
    Date of Patent: July 4, 2006
    Assignee: Siemens Milltronics Process Instruments Inc.
    Inventor: Claude Mercier
  • Patent number: 7068010
    Abstract: A motor power supply for and a method of operating a poly-phase AC motor with power provided from an AC power source through a DC-conversion circuit and an inverter. An output voltage of the DC-conversion circuit is sensed and a controller controls an inrush current limiting resistance to be selectively bypassed according to a first value of the output voltage and controls a pair of switches in an overvoltage protection circuit to return energy stored in the DC-conversion circuit to the AC power source according to second and third values of the output voltage. An operation of the switches is synchronously controlled according to a phase of the AC power source. The overvoltage protection circuit eliminates an overvoltage in the DC-conversion circuit due to energy regenerated by the motor and passed through the inverter to the DC-conversion circuit.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: June 27, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jang-hyoun Youm
  • Patent number: 7064943
    Abstract: A boost-type switching power device which obtains a dc output by connecting a rectifying diode to the output side of an inductance element, connected in series to a main switching element, the device including: a control circuit which controls the operation of the main switching element by using a feedback signal in accordance with the dc output; and a constant-current circuit comprising a plurality of active elements, which are provided between the the rectifying diode and the output terminal; and wherein, when there is an overload on the output side, the operation of the active elements comprising the constant-current circuit controls the control circuit, switching the main switching element off and thereby stopping the boost function, and, in addition, the output is controlled by the constant-current circuit.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: June 20, 2006
    Assignee: Toko Kabushiki Kaisha
    Inventor: Tetsushi Otake
  • Patent number: 7042303
    Abstract: The present invention is a component carrier (132) consisting of a plate of insulating material having a plurality of apertures (140) for accepting the leads of a thru-hole differential and common mode filter (130). Another embodiment consists of a surface mount component carrier (10) comprising a disk (16) of insulating material having a plurality of apertures (24). The same concept for the above described carrier is also incorporated into several alternate embodiments, either independently, embedded within electronic connectors. The overall configuration and electrical characteristics of the concepts underlying the present inventions are also described as an energy conditioning circuit assembly which encompasses the combination of differential and common mode filters and component carriers optimized for such filters.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: May 9, 2006
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony A. Anthony, William M. Anthony
  • Patent number: 7031127
    Abstract: Output current of an amplifier is limited by clamping the voltage at the gate of one or more of the transistors in the output stage. A drive signal is provided to the gate of a p-type transistor in an example output stage. Another p-type transistor is activated in a short-circuit protection circuit when the drive signal is below a pre-determined level, whereby the short-circuit protection circuit is activated to clamp the drive signal. Similarly, an n-type transistor in another short-circuit protection circuit may be configured to clamp another drive signal for an n-type output stage. The short-circuit protection methodology may be applied to output stages such as in class A and class AB amplifiers.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: April 18, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Danny D'Aquino, Mehmet Aslan
  • Patent number: 7031130
    Abstract: A device for protecting a voltage source and a load supplied with power by the voltage source, comprises a switching element interposed between the voltage source and the load and is associated with a current limiting circuit including a measuring unit for measuring the current provided by the source and a control unit for controlling the switching element so as to prevent the current from exceeding a predetermined current threshold, and a voltage limiting circuit adapted to control the switching element so as to prevent the voltage supplied to the load from exceeding a predetermined voltage threshold.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: April 18, 2006
    Assignee: Agence Spatiale Europeenne
    Inventors: Giulio Simonelli, Philippe Alfred Perol
  • Patent number: 7027279
    Abstract: A harmonic mitigating device also functions as a phase converter for supplying single-phase non-linear loads, or as a phase shifting device for three-phase non-linear loads with multiple inputs to create a quasi multi-pulse system. A multiple-winding reactor or a plurality of single-winding reactors, and at least one capacitor, are connected in a crosslink circuit between the reactor windings, or between the reactor windings and another line. At least one reactive element comprising a line winding is connected to each phase or to the neutral and in series with a non-linear load, which provides a high reactance to harmonic currents, and at least one crosslink circuit comprising a second reactive element connected between the second end of the line winding and a capacitor which is connected to any other line in the system.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: April 11, 2006
    Assignee: 1061933 Ontario Inc.
    Inventors: Michael I. Levin, Anthony H. Hoevenaars, Igor V. Volkov
  • Patent number: 7005858
    Abstract: A method is disclosed for minimizing damage from electrostatic discharge (ESD) during long-term testing of electronic components and assemblies. The method includes conducting a stress-test, during which a protection circuit is engaged, which shields components and assemblies from ESD. Then at least one functional test is conducted, at which time, the protection circuit is disengaged. Also disclosed is a system for conducting long-term testing of electronic components and assemblies while providing protection from ESD. The system includes a testing circuit for providing current to the components and assemblies during the long-term testing which includes at least one stress-testing phase and at least one functional testing phase. Also included is a protection circuit for protecting the components and assemblies during said stress-testing phase of said long-term testing.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: February 28, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventor: Jih-Shiuan Luo
  • Patent number: 6985341
    Abstract: Circuitry provides various protection mechanisms to an external circuit using actively controlled elements. The controlled elements may by controlled to provide overcurrent, overvoltage, or undervoltage protection to an external circuit.
    Type: Grant
    Filed: April 24, 2001
    Date of Patent: January 10, 2006
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Jay Prager
  • Patent number: 6977802
    Abstract: The disclosure relates to the lightning protection of the transmitters in a transmission system. An etched circuit with lightning protection comprises at least one main line connected to a connector adapted to the output of a transmission antenna of the transmission system working at a fixed frequency or in a narrow frequency band around the fixed frequency. The circuit comprises a main line and at least one first line connected to the main line and substantially equivalent to an open circuit with respect to the main line for the stated frequency. The circuit can also perform a harmonic filtering function, thus increasing compactness by using a single circuit for both functions.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: December 20, 2005
    Assignee: Thales
    Inventor: Jean-Paul Chatenet
  • Patent number: 6970338
    Abstract: By using a plurality of diodes and resistors, an overcurrent protector is implemented in a power supply device that supplies drive power to a peripheral device. The overcurrent protector blocks drive power from a power supply source from being supplied to the peripheral device when an overcurrent is applied from the power supply device to the peripheral device. The diodes and resistors are incorporated into the power supply device to form the circuit thereof. Since the power supply device is not added with a separate circuit for preventing an overcurrent from being applied to the peripheral device, there is no increase in the cost due to additional parts used for implementing the separate circuit. Since a smaller number of parts are used to implement the overcurrent protector, it is easy to design the device, while preventing a decrease in the reliability due to errors in the additional parts.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: November 29, 2005
    Assignee: Hyundai Mobis Co., Ltd.
    Inventor: Beom Jun Ju
  • Patent number: 6970337
    Abstract: A floating symmetrical current limiter device blocks large bipolar input signals to the input circuit of an instrumentation device by transitioning between a low-impedance mode and a high-impedance mode. The current limiter device includes a signal path and a control path that are each coupled between an input terminal and an output terminal. The signal path has a low impedance that passes small differential signals across the limiter from the input terminal to the output terminal. The control path is responsive to large bipolar signals that appear across the limiter terminals by transitioning between a voltage divider and a constant-current source-based bias that controls the impedance of the signal path to become a large impedance, thereby blocking the large bipolar input signal from the output terminal.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: November 29, 2005
    Assignee: Linear X Systems Inc.
    Inventor: Chris N. Strahm
  • Patent number: 6965504
    Abstract: An ESD protection apparatus for a high-voltage input pad comprises a modulator connected between the input pad and a snapback device with first and second guard rings surrounding the modulator, third guard ring surrounding the snapback device, and first and second guard ring control circuits to control the guard rings such that the protection apparatus has higher triggering and holding voltages under normal operation and lower triggering and holding voltages under ESD event.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: November 15, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Meng-Huang Liu, Chun-Hsiang Lai, Shin Su, Tao-Cheng Lu
  • Patent number: 6963476
    Abstract: A method for manufacturing resettable fuses has acts of forming multiple first and second bottom electrodes in pairs on a substrate, laminating a fuse layer on the substrate, forming multiple top electrodes respectively over the pairs of bottom electrodes, forming multiple conductive holes respectively through the top electrodes and the second bottom electrodes, removing the substrate, optionally forming isolation and contact elements and separating individual resettable fuses. Thereby, the manufacturing process and the structure of the resettable fuse are simplified, and the hold current of the resettable fuse is increased.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: November 8, 2005
    Inventor: Jung-Chien Chang
  • Patent number: 6963478
    Abstract: An input section of an RF interface is shown in conjunction with a tuner circuit. The input, in one embodiment, is constructed using co-planner wave guide techniques and serves to provide low return loss, low insertion loss, high voltage protection, all within a single housing without causing RF interference problems.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: November 8, 2005
    Assignee: Microtune (Texas) L.P.
    Inventors: Joel Stephen Michon, Kevin John Lynaugh, Hans Habermeier
  • Patent number: 6954346
    Abstract: The invention provides electrical filters, circuits including the filters, connectors including the filters, and methods of making and using the same wherein the filter includes a G conductor, an A conductor; and a B conductor, and wherein the three conductors are conductively isolated from one another when said filter is not connected in a circuit.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: October 11, 2005
    Assignee: XZY Attenuators, LLC
    Inventor: Anthony Anthony
  • Patent number: 6950291
    Abstract: The present invention provides magnetic structure, particularly an isolation transformer, which includes a shield to prevent radiation of electromagnetic interference (“EMI”). The magnetic structure includes a support structure, or bobbin, on which are mounted windings formed from electrical conductors. The windings are electrically connected to termination points, which provide the electrical interconnections for the magnetic structure. A magnetic core can be included in the support structure to provide optimal magnetic properties to the device. An EMI shield formed from a metallic foil such as copper is wrapped around the winding to prevent the radiation of EMI. The EMI shield is connected to a shield pin in the support structure by a conductive strap such that the shield pin is electrically connectable to a fixed potential through a safety rated capacitor to provide a low impedance path for currents induced in the EMI shield.
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: September 27, 2005
    Assignee: Lucent Technologies Inc.
    Inventors: Joao Luiz Andres, Michael Ray Bell
  • Patent number: 6950293
    Abstract: The present invention relates to a passive electronic component architecture employed in conjunction with various dielectric and combinations of dielectric materials to provide one or more differential and common mode filters for the suppression of electromagnetic emissions and surge protection. The architecture allows single or multiple components to be assembled within a single package such as an integrated circuit or connector. The component's architecture is dielectric independent and provides for integration of various electrical characteristics within a single component to perform the functions of filtering, decoupling, fusing and surge suppression, alone or in combination.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: September 27, 2005
    Assignee: X2Y Attenuators, LLC
    Inventor: Anthony A. Anthony
  • Patent number: 6944005
    Abstract: A surge-protected coaxial termination includes a metallic outer body, a center conductor extending through a central bore of the outer body, and a spark gap created therebetween to discharge high-voltage power surges. A pair of dielectric support insulators support the center conductor on opposite sides of the spark gap. High impedance inductive zones surround the spark gap to form a T-network low pass filter that nullifies the additional capacitance of the spark gap. An axial, carbon composition resistor is disposed inside the outer body, and inside the dielectric insulator to absorb the RF signal, and prevent its reflection. The resistor extends co-axially with the center conductor, and one end of the resistor is electrically coupled thereto. A blocking chip capacitor extends radially from the opposite end of the resistor to the grounded outer body.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: September 13, 2005
    Assignee: Corning Gilbert Inc.
    Inventor: John A. Kooiman
  • Patent number: 6934136
    Abstract: Electrostatic discharge protection devices formed at a face of a semiconductor substrate, integrated with a component sensitive to electrostatic discharge, wherein the protection device is interdigitated with the component. The invention is applicable to many kinds of components, for example to a noise-decoupling capacitor shaped as an nMOS transistor with thin dielectric, or to an input buffer shaped as an nMOS transistor, or to an antenna shaped as an nMOS transistor. The protection device includes an nMOS transistor. The insulator of the gates, preferably silicon dioxide, is thin and in need of protection against ESD damage. The interdigitation may be configured in one or more planes. Further, the protection device may lie in a single plane spaced apart from the plane defined by the components. The protection device may also partially be merged with the component.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: August 23, 2005
    Assignee: Texas Instrument Incorporated
    Inventor: Charvaka Duvvury
  • Patent number: 6930870
    Abstract: The semiconductor device is inserted between a power source and a load. A current flowing between an external drain terminal D and an external source terminal S is controlled in accordance with a control voltage applied between an external gate terminal G and the external source terminal S. In addition, the semiconductor device has a main MOSFET 1 and a detecting MOSFET 2 each of which is inserted between the external drain terminal D and the external source terminal S, a protective circuit 3 which protects the main MOSFET 1 by a protective transistor 5 when the abnormality is detected thereby, and an impedance element 4 inserted between the protective MOSFET 5, and a junction connecting the external gate terminal G to a gate electrode of the detecting MOSFET 2.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: August 16, 2005
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Takeshi Nobe, Shigeo Akiyama, Noriteru Furumoto, Takuya Sunada
  • Patent number: 6927958
    Abstract: Active transient suppression apparatus coupleable in series with an electrical pathway into a potentially explosive environment for limiting current, voltage and energy thereto comprises: an impedance element coupleable in series with the electrical pathway; a protection circuit comprising: at least one semiconductor element including a current conduction channel in series with the impedance element in the electrical pathway; and a driver circuit operative in response to a drive signal to switch the at least one semiconductor element to a non-conducting state; and a sense circuit coupled to the impedance element for sensing current conducted therethrough and generating a signal proportionally representative of the sensed current, the generated signal becoming the drive signal as it reaches a threshold level. The active transient suppression apparatus may be embodied in a system for determining a quantity of fuel in a container.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: August 9, 2005
    Assignee: Simmonds Precision Products, Inc.
    Inventor: Thomas Joseph Nostrand
  • Patent number: 6922320
    Abstract: Embodiments of the present invention provide methods and circuitry for protecting a circuit during hot-swap events. Hot swap protection circuitry includes as overcurrent detection circuit which decouples power from a load. Circuitry is provided to detect ground-fault conditions. Noise detection circuitry is provided to reduce noise in the power that is delivered to the load.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: July 26, 2005
    Assignee: Ixys Corporation
    Inventor: Sam Seiichiro Ochi
  • Patent number: 6920027
    Abstract: A power system controller design for controlling fault current or load flow current by applying a variable inductive impedance. The device comprising multiple stages of transformers connected such that their primary coils are in series and carry the primary power. Their secondary circuits containing a device for interruption of secondary current. The secondary circuit of each stage having a small part of the primary energy flowing through them. Under normal conditions the interrupter allows secondary current to flow, producing no impedance on primary side. Upon operation of interrupter, inductive impedance appears across primary. Operation of single stages producing low inductive impedance on primary circuit. Operation of multiple stages producing higher inductive impedance on primary circuit. In a preferred embodiment, the transformers have saturating cores such that operation of single stages saturates their cores, producing low inductive impedance on primary circuit.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: July 19, 2005
    Inventor: Felix Torres
  • Patent number: 6917504
    Abstract: An apparatus and method for adaptively controlling power supplied to a hot-pluggable subsystem controls the inrush current of the hot-pluggable subsystem when the subsystem is coupled to another system that supplies power, and optionally other signal connections. The apparatus and method adaptively control a pass device by detecting the voltage at the gate of the pass device during initial charging of the gate. The gate voltage may be sampled and used subsequently to control the operation of the pass device, and short-circuit conditions may be detected by determining that the miller effect does not change the charging of the gate capacitance. Automatic restart circuitry can be included to generate multiple startup attempts, and under-voltage lockout circuitry and power-on-reset timers can be used to provide a robust solution. The apparatus and method can be adapted to provide a three terminal device that does not require a feedback connection from a power supply output.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: July 12, 2005
    Assignee: Supertex, Inc.
    Inventors: James Hung Nguyen, Sang Ton Ngo, David Chalmers Schia, Ladislas G. Kerenyi, Khai Minh Le
  • Patent number: 6909585
    Abstract: Protection circuits (1) to be located between power supplies (2) and further circuitries (20,30) for protecting further circuitries (20,30) against voltage irregularities and comprising main transistors (7) coupled to switching circuits (10) for rendering main transistors (7) operative/non-operative can be made more allround by providing them with comparators (11) for controlling gate voltages of main transistors (7) via switches (12,13) to get protection against small negative voltage pulses and voltage fluctuations. Said switches (12,13) comprise two switches (12,13) for interrupting a reference voltage generated by a reference voltage source and for supplying a nearby ground voltage to said gate. A diode (14) between switch (13) and gate allows negative voltages at said gate for simplifying the introduction of further stages. Thick oxide transistors (15) protect further circuitries (20,30) and main transistors (7) against large negative voltage pulses.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: June 21, 2005
    Assignee: Ami Semiconductor Belgium BVBA
    Inventors: Ludek Broulim, Stefan Van Roeyen
  • Patent number: 6898062
    Abstract: An ESD protection circuit for a semiconductor integrated circuit (IC) having protected circuitry, includes an SCR having at least one finger. Each finger includes a PNP transistor and an NPN transistor, where an emitter of the PNP and NPN transistors is respectively coupled between an I/O pad of the IC and ground, a base of the PNP transistor being coupled to a collector of the NPN transistor, and a base of the NPN transistor being coupled to a collector of the PNP transistor. The NPN transistor of each finger further includes a first gate for triggering said finger. A PMOS transistor includes a source and a drain respectively coupled to the I/O pad of the IC and the first gate of the NPN transistor. Further, a gate of the PMOS transistor is coupled to a supply voltage of the IC.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: May 24, 2005
    Assignee: Sarnoff Corporation
    Inventors: Cornelius Christian Russ, John Armer, Markus Paul Josef Mergens, Phillip Czeslaw Jozwiak
  • Patent number: 6894884
    Abstract: An amalgamation of selected energy pathways and other elements formed at least in-part by sequential manufacturing operations and made operable to be coupled and/or formed as part of a predetermined assembly and/or assemblies and/or assembly variations practicable and/or operable for sustaining electrically opposing and/or complementary energy portion confluences that can be themselves made operable by the arrangement amalgam to undergo portions of energy conditioning as a portion of an energized circuit.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: May 17, 2005
    Assignee: XZY Attenuators, LLC
    Inventors: Anthony A. Anthony, Jr., William M. Anthony
  • Patent number: RE39855
    Abstract: A hot swappable system is described. It included software controlled hot swapping operations which provided a graceful booting or power-down of the system. In the even of force insertion or extraction of the system blades, a set of hardware features (such as using different pin lengths in the connectors and dampening resistor) prevents these types of operations from damaging the system hardware or affecting the operation states of other blades within the system.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: September 25, 2007
    Assignee: Intel Corporation
    Inventor: Hong W. Wong