Mounting Pad Patents (Class 361/808)
  • Patent number: 11495528
    Abstract: A device includes an interposer, a plurality of conductive through vias (TVs), a conductive element, and a redistribution line (RDL). The conductive TVs extend from a bottom surface of the interposer to a top surface of the interposer. The conductive element is over the bottom surface of the interposer. The RDL is over the top surface of the interposer. The RDL, the conductive TVs, and the conductive element are connected to form an inductor.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: November 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Wen-Shiang Liao
  • Patent number: 11296052
    Abstract: A device package has substrates disposed on top of one another to form a stack, and pads formed on at least one of the top surface and the bottom surface of each of the substrates. The device package has interconnects electrically coupling at least one of the top surface and the bottom surface of each substrate to at least one of the top surface and the bottom surface of another substrate. The device package has pillars disposed between at least one of the top surface and the bottom surface of one or more substrates to at least one of the top surface and the bottom surface of other substrates. The device package also has adhesive layers formed between at least one of the top surface and the bottom surface of one or more substrates to at least one of the top surface and the bottom surface of other substrates.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: April 5, 2022
    Assignee: Intel Corporation
    Inventors: Preston T. Meyers, Javier A. Falcon, Shawna M. Liff, Joe R. Saucedo, Adel A. Elsherbini, Albert S. Lopez, Johanna M. Swan
  • Patent number: 11125386
    Abstract: According to one aspect of the disclosure a steam trap system and a method of operation is provided. The steam trap system includes a steam trap body and a disk operably coupled to the steam trap body, the disk being made from a magnetic material. A cap is coupled to the steam trap body adjacent the disk, the cap being made from a nonmagnetic material. A hall effect sensor operably coupled to the cap, the hall effect sensor being configured to generate a signal in response to movement of the disk.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: September 21, 2021
    Assignee: CONSOLIDATED EDISON COMPANY OF NEW YORK, INC.
    Inventor: Thomas Edison Slanover
  • Patent number: 11088114
    Abstract: A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: August 10, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Owen R. Fay, Kyle K. Kirby, Akshay N. Singh
  • Patent number: 10886190
    Abstract: A semiconductor device is disclosed. In one example, the semiconductor device includes: an electronic component having a top surface, a bottom surface, and two end portions; a plurality of contacts disposed on the top surface; and a plurality of metal nodes disposed on the plurality of contacts. The plurality of contacts includes two end contacts disposed at the two end portions respectively and at least one intermediate contact disposed between the two end contacts. The plurality of metal nodes includes two end metal nodes disposed on the two end contacts respectively and at least one intermediate metal node disposed on the at least one intermediate contact.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: January 5, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Chieh Yang, Yung-Chow Peng, Chung-Peng Hsieh, Sa-Lly Liu
  • Patent number: 10804244
    Abstract: A semiconductor package structure includes a redistribution (RDL) layer, a first chip, at least one second chip, an encapsulant and a third chip. The redistribution layer has a first surface and a second surface opposite to each other. The first chip is over the first surface of the redistribution layer and electrically connected to the redistribution layer. The second chip is over the first surface of the redistribution layer. The second chip includes a plurality of through via structures. The encapsulant is over the first surface of the distribution layer, wherein the encapsulant surrounds the first chip and the second chip. The third chip is over the encapsulant and electrically connected to the first chip through the through via structures of the second chip and the redistribution layer.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: October 13, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shin-Puu Jeng, Feng-Cheng Hsu, Shuo-Mao Chen
  • Patent number: 10585315
    Abstract: The present invention relates to a display panel and display apparatus thereof. The display panel comprises: a first substrate having an outer surface and an inner surface, wherein a bonding region is formed on a peripheral region of the outer surface, a plurality of through micro-holes are formed on the bonding region, a conductive material is filled in the through micro-holes, and an electrode layer is formed on the inner surface; and a flexible printed circuit (FPC) film is electrically connecting the bonding region and electrode layer on the inner surface of the first substrate by the conductive material.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: March 10, 2020
    Assignees: HKC CORPORATION LIMITED, CHONGQING HKC OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Yu-Jen Chen
  • Patent number: 10262953
    Abstract: A semiconductor device includes a heat dissipating unit that includes a primary part made of a first metal material and an embedded part that is embedded in a front surface of the primary part and that is made of a second metal material, a front surface of the heat dissipating unit having a mounting region on which a rear surface of a semiconductor element substrate is mounted so as to dissipate heat generated by the semiconductor element; and a sealing member that seals the semiconductor element, the substrate, and a sealed region of the front surface of the heat dissipating unit, wherein the embedded part is formed in the sealed region, and an absolute difference of the linear expansion coefficient of the second metal material and that of the sealing member is less than or equal to 25% of a value of the linear expansion coefficient of the sealing member.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: April 16, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Kenichiro Sato
  • Patent number: 10109616
    Abstract: An embodiment includes an apparatus comprising: a substrate; a first die including a processor core; a second die not including a processor core; and a third die including memory cells; wherein: (a)(i) the first die has a smaller minimum pitch than the second die; (a)(ii) a first vertical axis intersects the substrate and the first and second dies but not the third die; and (a)(iii) a second vertical axis intersects the substrate and the second and third dies but not the first die. Other embodiments are described herein.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: October 23, 2018
    Assignee: Intel Corporation
    Inventor: Omkar G. Karhade
  • Patent number: 10044339
    Abstract: A piezoelectric device has an insulated container including a frame portion. Four external connection terminals to be solder-bonded to an external substrate each have a shape with a bent portion in plan view in which the external connection terminal is extending from one of the four corners on a bottom surface of the frame portion in a long-side direction and a short-side direction of an outer peripheral edge of the frame portion. The four external connection terminals are spaced from an opening end of a recess with an electrode-absent region interposed therebetween. The four external connection terminals each have a plurality of angular parts in plan view, and at least one of the plurality of angular parts is in proximity to the inner peripheral edge of the frame portion in an arc shape or a chamfered shape at each of the four corners thereof.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: August 7, 2018
    Assignee: Daishinku Corporation
    Inventors: Hidenori Takase, Masashi Hirai
  • Patent number: 9761435
    Abstract: A process for forming a semiconductor package. The process comprises forming a first leadframe strip mounted upon an adhesive tape. The first leadframe strip is at least partially encased in a first mold compound thereby forming a molded leadframe strip. At least one flip chip semiconductor device is mounted on the molded leadframe strip. The semiconductor device has conductive masses attached thereon to effectuate electrical contact between the semiconductor device and the molded leadframe. The conductive masses can be substantially spherical or cylindrical. Liquid encapsulant is dispensed on the semiconductor device to encapsulate the flip chip semiconductor device. A cavity is formed between the semiconductor device and the molded leadframe. The molded leadframe strip, the semiconductor device, and the conductive masses are at least partially encased in a second mold compound.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: September 12, 2017
    Assignee: UTAC THAI LIMITED
    Inventors: Saravuth Sirinorakul, Somchai Nondhasitthichai
  • Patent number: 9698132
    Abstract: A chip package stack up includes a processor chip package that has a top surface and a bottom surface, an interposer, disposed above and connected to the processor chip package top surface; a memory chip package disposed above the interposer and connected to the processor chip package through the interposer; and a processor chip package heat spreader having a bottom surface adhered to the processor chip package top surface, and having an extending portion that extends outwardly from an edge of the processor chip package.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: July 4, 2017
    Assignee: Motorola Mobility LLC
    Inventors: Roger Ady, Morris Bowers, Paul Crosbie
  • Patent number: 9510453
    Abstract: A package carrier suitable for carrying at least a chip is provided. The package carrier includes an insulating layer, a patterned circuit layer, a plurality of conductive connection structures, a plurality of pads, a solder resist layer and a surface treatment layer. The insulating layer has a first surface and a second surface opposite to each other. The patterned circuit layer is embedded in the second surface and has a bonding surface. The second surface and the bonding surface are coplanar, and the patterned circuit layer comprises at least one die pad. The conductive connection structures are embedded in the insulating layer and connected to the patterned circuit layer. The pads are disposed on the first surface and connected to the conductive connection structures respectively. The solder resist layer is disposed on the second surface, and the surface treatment layer is disposed on the bonding surface.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: November 29, 2016
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Patent number: 9369175
    Abstract: The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elastomer. A barrier/seed layer is deposited, a first photoresist mask is created exposing the barrier/seed layer where this layer overlies the contact pad and, contiguous therewith, over a surface area that is adjacent to the contact pad and emanating in one direction from the contact pad. The exposed surface of the barrier/seed layer is electroplated for the creation of interconnect traces. The first photoresist mask is removed from the surface of the barrier/seed layer. A second photoresist mask, defining the solder bump, is created exposing the surface area of the barrier/seed layer that is adjacent to the contact pad and emanating in one direction from the contact pad.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: June 14, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jin-Yuan Lee, Ming-Ta Lei, Ching-Cheng Huang, Chuen-Jye Lin
  • Patent number: 9036363
    Abstract: Embodiments of devices and methods of their manufacture include coupling first and second package surface conductors to a package surface with an intra-conductor insulating structure between the package surface conductors. The package surface conductors extend between and electrically couple sets of pads that are exposed at the package surface. Elongated portions of the package surface conductors are parallel with and adjacent to each other. The intra-conductor insulating structure is coupled between the package surface conductors along an entirety of the parallel and adjacent elongated portions, and the intra-conductor insulating structure electrically insulates the elongated portions of the package surface conductors from each other. Some embodiments may be implemented in conjunction with a stacked microelectronic package that includes sidewall conductors and an intra-conductor insulating structure between and electrically insulating the sidewall conductors from each other.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: May 19, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael B. Vincent, Zhiwei Gong
  • Patent number: 9025340
    Abstract: Embodiments of methods for forming microelectronic device packages include forming a trench on a surface of a package body between exposed ends of first and second device-to-edge conductors, and forming a package surface conductor in the trench to electrically couple the first and second device-to-edge conductors. In one embodiment, the package surface conductor is formed by first forming a conductive material layer over the package surface, where the conductive material layer substantially fills the trench, and subsequently removing portions of the conductive material layer from the package surface adjacent to the trench. In another embodiment, the package surface conductor is formed by dispensing one or more conductive materials in the trench between the first and second exposed ends (e.g., using a technique such as spraying, inkjet printing, aerosol jet printing, stencil printing, or needle dispense). Excess conductive material may then be removed from the package surface adjacent to the trench.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: May 5, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jason R. Wright, Michael B. Vincent, Weng F. Yap
  • Patent number: 9001520
    Abstract: Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing structure formed separately from a trace routing structure, wherein the glass routing structure is incorporated with the trace routing substrate, either in a laminated or embedded configuration. Also disclosed are embodiments of a microelectronic package including at least one microelectronic device disposed proximate to the glass routing structure of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects. Further, disclosed are embodiments of a microelectronic structure including at least one microelectronic device embedded within a microelectronic encapsulant having a glass routing structure attached to the microelectronic encapsulant and a trace routing structure formed on the glass routing structure.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: April 7, 2015
    Assignee: Intel Corporation
    Inventors: Qing Ma, Johanna M. Swan, Robert Starkston, John S. Guzek, Robert L. Sankman, Aleksandar Aleksov
  • Patent number: 8991040
    Abstract: A reusable electronic circuit assembling system facilitates assembly and testing of electronic circuits. The system has at least one baseboard and one or more assembling blocks magnetically or mechanically attached to the baseboard. Each assembling block has at least two electrically connected conductive clips located separately in the opening holes of the assembly block. Discrete electronic components are connected by selectively inserting the electrodes of the to-be-connected electronic components into the clips of the assembling blocks. A complete circuit is constructed by attaching the above block-component assemblies on the baseboard and connecting them in accordance with the desired circuit diagram.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: March 31, 2015
    Assignee: 5eTek, LLC
    Inventor: Erli Chen
  • Publication number: 20150055315
    Abstract: An inductive component is disclosed. The inductive component comprises a magnetic body and a coil in the magnetic body, wherein a first protrusion and a second protrusion are formed on the bottom surface of the magnetic body, wherein the first protrusion comprises a first electrode disposed on the peak surface of the first protrusion, and the second protrusion comprises a second electrode disposed on the peak surface of the second protrusion, wherein the first electrode and the second electrode are electrically connected to a first end and a second end of the coil, and a space is formed by the first protrusion, the second protrusion and the bottom surface of the magnetic body for accommodating electronic devices.
    Type: Application
    Filed: November 4, 2014
    Publication date: February 26, 2015
    Inventors: Bau-Ru Lu, Kai-Peng Chiang, Da-Jung Chen, Tsung-Chan Wu
  • Patent number: 8952271
    Abstract: There is provided a circuit board to which a solder ball composed of a lead (Pb)-free solder is to be connected, a semiconductor device including an electrode and a solder ball composed of a lead (Pb)-free solder disposed on the electrode, and a method of manufacturing the semiconductor device, in which mounting reliability can be improved by enhancing the bonding strength (adhesion strength) between the solder ball composed of a lead (Pb)-free solder and the electrode.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: February 10, 2015
    Assignee: Fujitsu Limited
    Inventors: Masaharu Furuyama, Daisuke Mizutani, Seiki Sakuyama, Toshiya Akamatsu
  • Patent number: 8897034
    Abstract: The present invention discloses a splitter plate and an electronic apparatus. The splitter plate includes a splitter plate main body, and further includes a turnover positioning apparatus, and the turnover positioning apparatus is hinged on a side of the splitter plate main body; the turnover positioning apparatus is configured to, after a half-height board is assembled to a subrack, abut against the half-height board and connect to the subrack to fasten the half-height board to the subrack.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: November 25, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yinzhong Tang, Guangjing Wang
  • Publication number: 20140254124
    Abstract: Presented herein are stud bump bonding techniques for electrically connecting an elongate conductor, such as a wire or pin, to a bonding pad. A plurality of stud bumps are bonded to a surface of a bonding pad and an elongate electrical conductor is positioned in proximity to the plurality of stud bumps. The elongate conductor is bonded to one or more of the stud bumps.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 11, 2014
    Inventors: Milind Raje, Robert Bennett, Andrew Mudie, Gary Mark Ignacio
  • Patent number: 8737073
    Abstract: A Light Emitting Diode (LED) module includes a circuit board having a front side and a back side, a heat sink coupled to the back side of the circuit board, a thermal pad disposed on a front side of the circuit board, an LED disposed on the front side of the circuit board. The LED is in thermal contact with the thermal pad. The module further includes a heat spreading device placed over the thermal pad and in thermal contact with the thermal pad.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: May 27, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Wei-Yu Yeh, Chih-Hsuan Sun
  • Patent number: 8630097
    Abstract: Disclosed herein are a power module using sintering die attach and a manufacturing method of the same. The power module includes: a substrate having an insulating layer formed on a surface of a metal plate; a circuit layer formed on the substrate and including a wiring pattern and an electrode pattern; a device mounted on the wiring pattern; a sintering die attach layer applying a metal paste between the wiring pattern and the device and sintering the metal paste to bond the wiring pattern to the device; and a lead frame electrically connecting the device to the electrode pattern, whereby making it possible to simplify and facilitate the process, increase electrical efficiency and improve radiation characteristics, and manufacture firm and reliable power module.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: January 14, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Hyun Kim, Yong Hui Joo, Seog Moon Choi
  • Patent number: 8587954
    Abstract: An electronic device includes a bottom plate, a circuit board, and a securing assembly. The circuit board is located on the bottom plate. The securing assembly comprises a positioning member, a locking member, and a linking member. The positioning member is mounted to the bottom plate and located between the bottom plate and the circuit board. The locking member is locked to the positioning member, to secure the circuit board to the bottom plate. The linking member is located on the positioning member and connected to the circuit board and the bottom plate to electronically connect the circuit board to the bottom plate.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: November 19, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Chung-Cheng Hsieh, Li-Ping Chen
  • Publication number: 20130294042
    Abstract: The present disclosure teaches a power module that includes a chip, a first substrate, and one or more electrically conductive inserts disposed between the chip and the first substrate. The inserts can be corrugated metal sheets, metal tubes, metal wires, or metal rods. One or more of those inserts form a layer in the planar direction of a first interstitial space between the chip and the first substrate.
    Type: Application
    Filed: May 7, 2013
    Publication date: November 7, 2013
    Inventors: Guo-Quan LU, David Berry, Yunhui Mei
  • Patent number: 8531849
    Abstract: Embodiments disclosed herein may relate to supply voltage or ground connections for integrated circuit devices. As one example, two or more supply voltage bond pads on an integrated circuit die may be connected together via one or more electrically conductive interconnects.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: September 10, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Mostafa Naguib Abdulla, Steven Eskildsen
  • Patent number: 8525042
    Abstract: A printed circuit board on which a surface mount electronic device is mounted. The printed circuit board includes a substrate on which land arrangements are disposed in an array. Each land arrangement includes a core portion and drawing portions. The drawings are disposed along diagonal directions relative to the core portions of the array of the land arrangements.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: September 3, 2013
    Assignee: Fujitsu Limited
    Inventors: Mitsunori Abe, Takashi Fukuda
  • Patent number: 8526161
    Abstract: An electronic device may have buttons, a display, and a vibrator unit. Buttons may be included in electronic devices such as glass buttons, metal buttons, buttons that are assembled on printed circuit boards, and buttons that are partly formed from antenna structures. Button coatings may be used to improve the sliding performance of metal-on-metal buttons. A layer of polymer may be interposed between a button plate and a housing structure. A glass button member may have an underside on which a layer of patterned ink is formed. Elastomeric members may be used to reduce button rattle. Portions of a button may be provided with conductive features that form portions of an antenna.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: September 3, 2013
    Assignee: Apple Inc.
    Inventors: Trent Weber, Michael B. Wittenberg, Michelle A. Yu, Scott Myers, Kurt Stiehl
  • Publication number: 20130215591
    Abstract: Method and apparatus for bonding an electrical circuit component onto a substrate. A first electrically conductive bonding pad is formed on the component, and a second electrically conductive bonding pad is formed on the substrate. One of said first and second bonding pads is physically split into at least two parts, with electrical discontinuity between the two parts. An electrically conductive bond is formed between the first and second bonding pads such that electrical continuity is established from one part of the one bonding pad, through the other of the bonding pads, and through the second part of the one bonding pad. The integrity of the electrically conductive bond is evaluated by testing electrical continuity between the at least two parts.
    Type: Application
    Filed: December 17, 2012
    Publication date: August 22, 2013
    Applicant: TRW Automotive US LLC
    Inventor: TRW Automotive US LLC
  • Publication number: 20130194770
    Abstract: A microelectromechanical vibration isolation system includes a microelectromechanical structure having a plurality of fin apertures etched therethrough, and a plurality of fins each disposed within a respective one of the plurality of fin apertures and spaced apart from the microelectromechanical structure so as to define a fluid gap therebetween. The fluid gap is configured to provide squeeze film damping of vibrations imparted upon the microelectromechanical structure in at least two dimensions. The system further includes a frame surrounding the microelectromechanical structure, and a plurality of springs each coupled to the microelectromechanical structure and to the frame. The plurality of springs is configured to support the micromechanical structure in relation to the frame.
    Type: Application
    Filed: January 26, 2012
    Publication date: August 1, 2013
    Applicant: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Jonathan Bernstein, Marc Weinberg
  • Publication number: 20130094168
    Abstract: A standardized wall mounting is provided for mounting control units of system components in an aircraft cabin with a fastening unit and at least one plug unit. The fastening unit is designed for guiding the control unit during an installation movement of the control unit on the wall mounting. The plug unit is designed for producing a plug connection between the control unit and the wall mounting during the installation movement of the control unit on the wall mounting.
    Type: Application
    Filed: October 25, 2012
    Publication date: April 18, 2013
    Applicant: AIRBUS OPERATIONS GMBH
    Inventor: AIRBUS OPERATIONS GMBH
  • Publication number: 20130088128
    Abstract: A device designed to reduce temperature rise in its control board. The device includes a switching element; a coil; a smoothing capacitor; an electrical connection member for electrically connecting the switching element with the smoothing capacitor and the coil; a control board that mounts a control element; a control signal line for electrically connecting the switching element with the control board; and a switching element placing portion for placing the switching element thereon. The electrical connection member is arranged between the switching element and the control board; the smoothing capacitor and the coil are arranged, with respect to the electrical connection member, on a side of the switching element; and end surfaces of the smoothing capacitor and the coil are positioned, with respect to the electrical connection member, apart from a plane where the switching element and the switching element placing portion are adjoined together.
    Type: Application
    Filed: February 23, 2011
    Publication date: April 11, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masatsugu Nakano, Yoshihito Asao
  • Publication number: 20130088844
    Abstract: The invention relates to a base of a display device, comprising a base body, a first wing connected to one side of the base body and a second wing connected to the other side of the base body. The base body comprises a pillar which supports the display device. The first wing and the second wing are hinged on base body in a swivelable manner so that the first wing and the second wing can swivel relative to the base body. Alternatively, the first wind and the second wing are detachably connected to the base body so that the first wing and the second wing can form different aspects relative to the base body. As a result, the first wing and the second wing can be adjusted relative to the base body in terms of positions and aspects according to requirements.
    Type: Application
    Filed: July 16, 2012
    Publication date: April 11, 2013
    Inventors: Wei-Lu Zeng, Mei-Can Fang, Lei Wang
  • Patent number: 8404983
    Abstract: A removable electric controller for a garage door opener includes a base unit, a cover and a control box unit. A box lid of the control box unit is slidably connected to a connecting surface of the cover. A guide insertion end of a control circuit board of the control box unit is connected to a main connecting port module of a circuit terminal connecting plate on the base unit. The cover and the control box unit are detachable. A driving member, a light source member, an inductive circuit line and a power member of the base unit are connected to wiring port modules of the circuit terminal connecting plate, so that the wiring is in the way of modulization. The control circuit board of the control box unit can be replaced with ease, providing a convenient and simply assembly.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: March 26, 2013
    Assignee: Rhine Electronic Co., Ltd.
    Inventor: Kun Shi Tseng
  • Patent number: 8391022
    Abstract: A mezzanine board alignment and mounting device includes a multi-stage pin connected to a main board near a mezzanine board connector disposed on the main board. The multistage pin includes a base adapted to connect to the main board, a point distal to the base adapted to pass through an opening on a mezzanine board, and a support disposed between the base and the point. A diameter of the point widens towards the support. A diameter of the support is wider than a diameter of the opening. When the point is fully inserted through the opening in the mezzanine board, the mezzanine board is aligned properly to connect with the mezzanine board connector on the main board.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: March 5, 2013
    Assignee: Oracle America, Inc.
    Inventors: Timothy W. Olesiewicz, David W. Hartwell, Brett C. Ong
  • Patent number: 8379391
    Abstract: A memory module with attached transposer and interposers to provide additional surface area for the placement of memory devices is disclosed. The memory module includes a memory board with a first surface, a second surface and an edge with a set of electrical contacts. A transposer is attached to each surface of the memory board, and an interposer is attached to each transposer on the opposite surface of the transposer from the memory board. The interposer has space to allow placement of memory devices on both a first surface between the interposer and the memory board, and on a second surface of the interposer away from the memory board.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: February 19, 2013
    Assignee: Smart Modular Technologies, Inc.
    Inventors: Mike H. Amidi, Robert S. Pauley, Satyanarayan Shivkumar Iyer
  • Patent number: 8350161
    Abstract: According to one of the invention, a circuit board comprises a conductive layer. The conductive layer includes a first land portion, a second land portion apart from the first land portion in a plan view, and a line portion connecting the first land portion and the second land portion to each other. The line portion includes lead portions through which a current is to flow and an opening portion arranged between the lead portions. The opening portion penetrates the conductive layer in a thickness direction.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: January 8, 2013
    Assignee: Kycera Corporation
    Inventors: Kimihiro Yamanaka, Manabu Ichinose, Satoshi Nakamura
  • Patent number: 8335087
    Abstract: A wireless data terminal device comprises a detachable USB connector and a main circuit board, where at least two redundancy grounding connections are provided between the detachable USB connector and the main circuit board, and the grounding points of the at least two redundancy grounding connections are not adjacent to each other. A method for improving the radio performance of the wireless data terminal device is further provided. With the wireless data terminal device or the method for improving the radio performance of the wireless data terminal device, the connection of the grounding plane of the wireless data terminal device with the grounding plane of a computer is effectively enhanced. Therefore, the radio performance of the wireless data terminal device is improved.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: December 18, 2012
    Assignee: Huawei Device Co., Ltd.
    Inventors: Yanping Xie, Shuhui Sun, Qizhi Zhan, Shuqiang Gong, Chaoyan Zhang
  • Publication number: 20120307467
    Abstract: An electrical component includes a plurality of core devices arranged within a housing so as to be electrically isolated from one another. For each of the plurality of core devices, a first contact pad and a second contact pad is formed on an outside surface of the housing. The first and second contact pads are electrically connected to a respective core device of the plurality of core devices.
    Type: Application
    Filed: June 3, 2011
    Publication date: December 6, 2012
    Inventors: Luis A. Navarro, Mario G. Sepulveda, Patrick J. Hibbs, Martin G. Pineda, Martyn A. Matthiesen, Anthony Vranicar, Dong Yu
  • Publication number: 20120293976
    Abstract: A removable electric controller for a garage door opener includes a base unit, a cover and a control box unit. A box lid of the control box unit is slidably connected to a connecting surface of the cover. A guide insertion end of a control circuit board of the control box unit is connected to a main connecting port module of a circuit terminal connecting plate on the base unit. The cover and the control box unit are detachable. A driving member, a light source member, an inductive circuit line and a power member of the base unit are connected to wiring port modules of the circuit terminal connecting plate, so that the wiring is in the way of modulization. The control circuit board of the control box unit can be replaced with ease, providing a convenient and simply assembly.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 22, 2012
    Inventor: Kun Shi TSENG
  • Publication number: 20120250185
    Abstract: An electronic component container includes an electronic component; a holder including a holder base part and ribs standing on the holder base part to form a container of the electronic component; and a supporting plate including a supporting plate base part and fixed to the holder. Further, the holder further includes latch protrusions protruding from the ribs above the holder base part; the supporting plate includes cutout sections so as to avoid interference with the latch protrusions when the supporting plate base part is first placed on the holder base part at a mounting position; and the supporting plate base part is latched between the latch protrusions and the holder base part.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 4, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Masaki Ishikawa
  • Patent number: 8279621
    Abstract: A plurality of AC_LED units are coupled and disposed on a single chip to form an AC_LED system in single chip. Alternatively, an AC LED system in single chip with four metal contacts is also disclosed.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: October 2, 2012
    Assignee: Epistart Corporation
    Inventors: Ming-Te Lin, Wen-Yung Yeh, Chia-Chang Kuo, Hsi-Hsuan Yen, Sheng-Pan Huang
  • Patent number: 8279617
    Abstract: A pad layout structure of a driver IC chip of a liquid crystal display device includes dummy power pads and dummy ground pads, which are disposed in corners of the driver IC chip and are connected to main power pads and main ground pads by metal lines in a chip-on-film (COF) package. Accordingly, it is possible to reduce the resistance of power supply lines and ground lines, to minimize a power dip of a block located far away from the main power pads and main ground pads, and to prevent a failure in power application, which may occur due to a decrease of adhesive strength at a specific position, by dispersing the adhesion positions of the power pads and ground pads.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: October 2, 2012
    Assignee: Silicon Works Co., Ltd.
    Inventors: Joung Cheul Choi, Joon Ho Na, Dae Seong Kim
  • Publication number: 20120235542
    Abstract: To facilitate positioning of an external terminal and ensure sufficient solder joint strength at the time of mounting a piezoelectric device on a mounting board by soldering. In a crystal device of the present invention, an external terminal is formed, for example, at four corners on an external bottom surface of a base having a rectangular shape as seen in a plan view, and the external terminals include two active terminals arranged opposite to each other on a diagonal line, and two ground terminals arranged opposite to each other on another diagonal line crossing the diagonal line. An arbitrary sign, character, or figure is marked on a mounting surface of at least one ground terminal of external terminals to determine the direction of the active terminal.
    Type: Application
    Filed: March 5, 2012
    Publication date: September 20, 2012
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventor: Takehiro TAKAHASHI
  • Publication number: 20120230001
    Abstract: An electronic device includes an interposer, a first chip being mounted on a first surface of the interposer, the first chip having a first surface facing the first surface of the interposer and a second surface opposite to the first surface of the first chip, a second chip being mounted on a second surface of the interposer opposite to the first surface of the interposer, the second chip having a first surface facing the second surface of the interposer and a second surface opposite to the first surface of the second chip, a first metal plate being connected to the second surface of the first chip, a second metal surface being provided over the second surface of the second chip, and a via penetrating through the interposer and connected to the first metal plate and the second metal plate.
    Type: Application
    Filed: January 12, 2012
    Publication date: September 13, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuya TAKAHASHI, Kenji KOBAE, Shuichi TAKEUCHI, Yoshiyuki SATOH, Kimio NAKAMURA
  • Patent number: 8248814
    Abstract: A PCB includes an outer layer and an inner layer. An electronic component is mounted on the outer layer. The outer layer further defines a first pad, a second pad, a third pad, a fourth pad, and a number of via holes. The electrical performances of the first pad and the second pad are the same to that of the inner layer. The first pad and the second pad are conducted to the electronic component. The third pad and the fourth pad are respectively conducted to the first pad and the second pad through the electronic component. The electrical performances of the third pad and the fourth pad are different from that of the inner layer. The via holes are respectively electrically connected to the third pad and the fourth pad.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: August 21, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Chun-Po Chen, Chi-Wen Chen
  • Patent number: 8238114
    Abstract: A printed wiring board includes multiple conductive layers having conductive circuits, multiple resin insulation layers having openings and including the uppermost resin insulation layer positioned as the outermost layer of the resin insulation layers, multiple via conductors formed in the openings, respectively, and connecting the conductive circuits in the conductive layers, and multiple component-loading pads formed of a copper foil and positioned to load an electronic component. The resin insulation layers and the conductive layers are alternately laminated, and the component-loading pads are formed on the uppermost resin insulation layer.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: August 7, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Ayao Niki, Kazuhisa Kitajima
  • Patent number: 8217274
    Abstract: A wiring member comprising a substrate, a copper wiring layer having an electrical resistivity of not larger than 4×10?6 ?cm in directly or indirectly contact with the substrate, an aluminum diffusion layer, contiguous to the copper wiring layer, having an aluminum concentration gradient descending towards the inside, and an aluminum oxide layer contiguous to and covering the aluminum diffusion layer, wherein a ratio of a thickness of the copper wiring layer to a thickness of the aluminum diffusion layer is 1.5 to 5. The disclosure is also concerned with a method of manufacturing the wiring member and an electronic device.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: July 10, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Yamamoto, Takashi Naito, Takuya Aoyagi, Yuuichi Sawai, Takahiko Kato
  • Patent number: 8199517
    Abstract: Provided are a flexible printed circuit board (PCB), which can contribute to the reduction of damage to wiring layers and wiring defects regardless of a decrease in the width of wiring layers and can thus contribute to the miniaturization of various products, a method of fabricating the flexible PCB, and a display device having the flexible PCB. The flexible PCB includes a base film, one or more first pad patterns formed on the base film, one or more second pad patterns formed on the base film and connected to the one or more first pad patterns, a cover film formed on the one or more first pad patterns and the base film and exposing the one or more second patterns, and a plurality of expanded portions corresponding to the boundaries between the one or more first pad patterns and the one or more second pad patterns and having a greater width than the one or more first pad patterns and the one or more second pad patterns.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: June 12, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Min Cho, Gyung-Hyun Ko, Heung-Suk Chin