Including P-n Junction (e.g., A Diode, A Zener Diode, Or Transistor) Patents (Class 361/91.5)
  • Patent number: 11177651
    Abstract: A limiter comprising of a step-up circuit with an input node and an output node for electrically stepping up an output signal at the output node from an input signal at the input node. A threshold switch circuit is connected to the step-up circuit for limiting peak voltages of the output signal from the step-up circuit.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: November 16, 2021
    Assignee: SOFTRONICS, LTD.
    Inventor: Robert H. Sternowski
  • Patent number: 11075515
    Abstract: A device comprises a rectifier configured to convert an alternating current voltage into a direct current voltage, a first overvoltage protection apparatus connected to inputs of the rectifier and a second overvoltage protection apparatus connected to an output of the rectifier, wherein the first overvoltage protection apparatus and the second overvoltage protection apparatus are controlled based upon a switching frequency of the device.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: July 27, 2021
    Assignee: NuVolta Technologies (Hefei) Co., Ltd.
    Inventors: Sichao Liu, Jinbiao Huang
  • Patent number: 11025249
    Abstract: A switch having a drain, a source, and a control. The switch comprising a depletion-mode transistor including a first, a second, and a control terminal and an enhancement-mode transistor including a first, a second, and a control terminal. The first terminal of the depletion-mode transistor is the drain of the switch and the control of the depletion-mode transistor is coupled to the source of the switch. The control of the enhancement-mode transistor is coupled to the control of the switch, the second terminal of the enhancement-mode transistor is the source of the switch. The switch comprises a clamp circuit to clamp a voltage of the first terminal of the enhancement-mode transistor to a threshold, the clamp circuit comprises a resistor and a pn-junction device coupled between the first and second terminals of the enhancement-mode transistor and between the second terminal and the control of the depletion-mode transistor.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: June 1, 2021
    Assignee: Power Integrations, Inc.
    Inventors: Hartley Horwitz, Sorin Georgescu, Kuo-Chang Robert Yang
  • Patent number: 10965116
    Abstract: The present invention discloses an overvoltage-proof circuit capable of preventing damage caused by an overvoltage at moments of starting and/or stopping operation. An embodiment of the overvoltage-proof circuit includes a protected circuit and a protecting circuit. The protected circuit receives a power supply voltage to operate, and includes: a protected component, in which an upmost voltage that the protected component can withstand is lower than the power supply voltage; and at least one operational switch(es) operable to enable or disable the protected circuit according to an enabling signal. The protecting circuit is coupled to the protected component, and starts protecting the protected circuit from an overvoltage before a transition of the enabling signal, in which the overvoltage is greater than the upmost voltage.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: March 30, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chia-Wei Yu, Hung-Chen Chu, Yung-Tai Chen
  • Patent number: 10826488
    Abstract: A switch device includes a common node that is connected to end nodes, such as that of computer interface ports. The switch device includes several switch circuits that can be connected in series to form a switch path between the common node and an end node. A switch circuit can include a main switch, such as a transistor that can be configured to withstand a positive or negative voltage surge by automatically changing the connection of its gate.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: November 3, 2020
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Lei Huang, Na Meng, Kenneth P. Snowdon
  • Patent number: 10826315
    Abstract: In some embodiments, a wireless power charging circuit includes a wireless power receiver configured to receive wireless power from a receive coil and to produce a first voltage; an open loop capacitor divider coupled to receive the first voltage from the wireless power receiver and configured to provide a second voltage, the second voltage being reduced from the first voltage; and a linear battery charger coupled to receive the second voltage from the open loop capacitor and configured to provide a charging voltage to provide to a battery coupled to the system.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: November 3, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Rui Liu, Lijie Zhao
  • Patent number: 10784787
    Abstract: A circuit includes a first field-effect transistor and a second field-effect transistor. The first field-effect transistor includes a first diode with drain, source, gate and first additional electrodes. The second field-effect transistor includes a second diode with drain, source, gate and second additional electrodes. A first switch selectively connects the gate and drain electrodes of the first field-effect transistor. A second switch selectively connects the gate and drain electrodes of the second field-effect transistor. A control circuit controls the first and second switches. The first additional electrode is coupled to the gate electrode of the second field-effect transistor, and the second additional electrode is coupled to the gate electrode of the first field-effect transistor.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: September 22, 2020
    Assignee: STMICROELECTRONICS (TOURS) SAS
    Inventors: Bertrand Rivet, Greca Jean Charles, Frederic Lanois
  • Patent number: 10770909
    Abstract: A switching power converter is provided with an overvoltage protection circuit that monitors the differential data signal voltages in a data interface such as a USB data interface powering a load device to detect soft short conditions.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: September 8, 2020
    Assignee: DIALOG SEMICONDUCTOR INC.
    Inventors: Jianming Yao, Yong Li, Dickson Wong
  • Patent number: 10566787
    Abstract: Unique systems, methods, techniques and apparatuses of inrush current detection and reduction are disclosed. One exemplary embodiment is a method for transmitting power to a load comprising operating a solid-state switching device of a power distribution network device with a microcontroller-based controller, the solid-state switching device including a gate and structured to receive a signal with the gate so as to control the switching device to receive power from a power source and selectively provide power including an output current to the load; detecting an overcurrent condition in the output current; operating the solid-state switching device in order to determine the load is a capacitive load in a charging condition in response to detecting an overcurrent condition; and operating the solid-state switching device so as to reduce the magnitude of the output current during the charging condition.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: February 18, 2020
    Assignee: ABB S.P.A.
    Inventors: Rostan Rodrigues, Taosha Jiang, Yu Du
  • Patent number: 10511165
    Abstract: The invention relates to a circuit assembly for protecting a unit to be operated from a supply network against overvoltage, comprising an input having a first and a second input connection, which are connected to the supply network, an output having a first and a second output connection, to which the unit to be protected can be connected, and a protection circuit, which is provided between the first and the second input connections in order to limit the voltage present at the first and the second input connections. According to the invention, the protection circuit has a power semiconductor, in particular an IGBT, wherein a series circuit consisting of a diac, i.e., a bidirectional electrode, and a Zener element is connected between the collector and the gate of the power semiconductor, wherein the sum of the Zener voltage and the diac voltage results in a clamping voltage for the power semiconductor, which lies above the voltage of the supply network and defines the protection level.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: December 17, 2019
    Assignee: DEHN + SÖHNE GMBH + CO. KG
    Inventors: Franz Schork, Ralph Brocke, Thomas Böhm, Dominik Donauer
  • Patent number: 10381877
    Abstract: An electrical energy receiving end capable of overvoltage protection and a wireless electrical energy transmission device are provided. An electrical energy receiving coil is divided into a first receiving coil and a second receiving coil, so that under normal operation the first receiving coil and the second receiving coil jointly resonate with an impedance matching network to receive energy. When the electrical energy receiving end has an overvoltage, the first receiving coil and the impedance matching network (or the second receiving coil and the impedance matching network) form a loop, and due to the impedance mismatch, the energy received by the electrical energy receiving end is greatly reduced to solve the problem of overvoltage at the electrical energy receiving end.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: August 13, 2019
    Assignee: Ningbo WeiE Electronic Technology Co., Ltd.
    Inventor: Hengyi Su
  • Patent number: 10381787
    Abstract: An electronic device includes a first switch configured to connect a first sideband use (SBU) terminal of a Universal Serial Bus Type-C (USB-C) controller to a first SBU terminal of a USB-C receptacle. The electronic device also includes a second switch configured to connect a second sideband use (SBU) terminal of the USB-C controller to a second SBU terminal of the USB-C receptacle. The electronic device further includes a voltage protection circuit configured to deactivate one or more of the first switch and the second switch when a voltage exceeding a predetermined threshold is detected. The voltage protection circuit includes a first set of diodes coupled to the first SBU terminal of the USB-C controller and a second set of diodes coupled to the second SBU terminal of the USB-C controller.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: August 13, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Nicholas Alexander Bodnaruk, Derwin W. Mattos
  • Patent number: 10342077
    Abstract: Provided are an LED driving circuit and a tube lamp. A grounding terminal of a rectifying unit of the LED driving circuit is electrically connected to a first ground wire, and an input terminal of an impedance detection and protection unit is electrically connected to a second input terminal of a first filtering unit. The grounding terminal is electrically connected to the first ground wire. The impedance detection and protection unit is configured to detect an impedance between the second input terminal of the first filtering unit and the first ground wire, so as to control the second input terminal of the first filtering unit to connect to or disconnect from the first ground wire according to a magnitude of the detected impedance.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: July 2, 2019
    Assignee: CH LIGHTING TECHNOLOGY CO., LTD.
    Inventors: Jizhong Pu, Caiying Gan, Jiaming Zhou
  • Patent number: 10230354
    Abstract: A method for voltage balancing series-connected power switching devices (IGBTs) each connected in parallel with a respective diverter having controllable impedance to controllably conduct current diverted from the associated power switching device, the method comprising the step of controlling each diverter to follow a series of at least two successively higher impedance states during an OFF period of the power switching devices. The series of impedance states for each diverter comprises a first impedance and then a second, higher impedance, the first impedance occurring in response to an indication of a start of the OFF period. The first impedance state preferably occurs during a tail current of the power switching device in parallel with the respective diverter and the second or later impedance state during a leakage current of that power switching device.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: March 12, 2019
    Assignee: MASCHINENFABRIK REINHAUSEN GMBH
    Inventors: Robert John Leedham, Mark Snook
  • Patent number: 10205380
    Abstract: In one implementation, a power converter with over-voltage protection includes a power switch coupled to a power supply through a tank circuit, and a control circuit coupled to a gate of the power switch. The control circuit is configured to turn the power switch OFF based on a current from the tank circuit, thereby providing the over-voltage protection to the power converter. In one implementation, the power converter is a class-E power converter. In one implementation, the control circuit is configured to sense the current from the tank circuit based on a voltage drop across a sense resistor coupled to the power switch.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: February 12, 2019
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Thomas J. Ribarich, Jorge Cerezo, Ajit Dubhashi
  • Patent number: 10187054
    Abstract: A switch having a first terminal, a second terminal and a control terminal. The switch includes a normally-on device with a first terminal, a second terminal, and a control terminal. The first terminal of the normally-on device is the first terminal of the switch. The control terminal of the normally-on device is coupled to the second terminal of the switch. A normally-off device includes a first terminal, a second terminal, and a control terminal. The control terminal of the normally-off device is coupled to the control terminal of the switch. The second terminal of the normally off-device is the second terminal of the switch. The first terminal of the normally-off device is coupled to the second terminal of the normally-on device. A clamp circuit is coupled across the normally-off device. The clamp circuit is coupled to clamp a voltage of the first terminal of the normally-off device to a threshold.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: January 22, 2019
    Assignee: Power Integrations, Inc.
    Inventors: Hartley Horwitz, Sorin Georgescu, Kuo-Chang Robert Yang
  • Patent number: 10026557
    Abstract: A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: July 17, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Hiroki Yamamoto, Keishi Watanabe, Hiroshi Tamagawa
  • Patent number: 9928979
    Abstract: A circuit arrangement for activating a control device includes: a first switch in a main current path, via which the control device is activated; an alternative current path; and a control logic which compares a voltage present for activating the control device to a threshold voltage and opens the first switch if the threshold voltage falls below so that a higher volume of an interference current effectuated by the present negative voltage flows via the alternative current path.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: March 27, 2018
    Assignee: ROBERT BOSCH GMBH
    Inventors: Martin Kaiser, Carsten Hermann, Ralph Bauer, Johannes Kunst
  • Patent number: 9848472
    Abstract: An LED device with energy compensation includes a first LED driving circuit, a second LED driving circuit, and a capacitor. The first LED driving circuit includes a first LED driver and a plurality of first LED groups controlled by the first LED driver. The second LED driving circuit including a second LED driver and a plurality of second LED groups controlled by the second LED driver. The second LED driving circuit is connected in parallel with the first LED driving circuit. The capacitor has a first terminal coupled to the second LED driving circuit and a second terminal coupled to one of the first LED driving circuit and the second LED driver. A power source is coupled to the first LED driving circuit, the second LED driving circuit, and the first terminal of the capacitor for applying an AC power to the first terminal of the capacitor.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: December 19, 2017
    Assignee: ALFASEMI INC.
    Inventors: Yu-Cheng Chang, Chang-Hung Hsieh
  • Patent number: 9759880
    Abstract: Tower systems suitable for use at cellular base stations include a tower, an antenna mounted on the tower, a remote radio head mounted on the tower and a power supply. A power cable having a power supply conductor and a return conductor is connected between the power supply and the remote radio head. A shunt capacitance unit that is separate from the remote radio head that is electrically coupled between the power supply conductor and the return conductor of the power cable.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: September 12, 2017
    Assignee: CommScope Technologies LLC
    Inventors: John C. Chamberlain, Jose Rabello
  • Patent number: 9641092
    Abstract: Provided is a power converter 3 that directly converts polyphase AC power to AC power. A converter circuit has a plurality of first switching elements 311, 313 and 315 that are connected to each phase R, S or T of the polyphase AC power to enable switching for turning on current-carrying bidirectionally, and a plurality of second switching elements 312, 314 and 316 that are connected to each phase to enable switching for turning on current-carrying bidirectionally. The converter circuit comprises input lines R, S and T connected to each input terminal, and output lines P and N connected to each output terminal. Parts of wiring 347 and 348 of protection circuits 32 are located between output lines P and N. The wiring distance between each protection circuit 32 and the corresponding switching element can be shortened.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: May 2, 2017
    Assignees: NISSAN MOTOR CO., LTD., NAGAOKA UNIVERSITY OF TECHNOLOGY
    Inventors: Hironori Koyano, Takamasa Nakamura, Masao Saito, Kouji Yamamoto, Tsutomu Matsukawa, Manabu Koshijo, Junichi Itoh, Yoshiya Ohnuma
  • Patent number: 9564485
    Abstract: A switch driving circuit electrically opens and closes a switch circuit including two N-channel type semiconductor switching elements series connected in a reverse direction, thereby electrically opening and closing a path between a DC power supply and an inverter circuit. The switch driving circuit has a reference potential point in common with the inverter circuit and supplies an opening/closing control signal to the switch circuit. The switch driving circuit includes a half bridge circuit including two semiconductor switching elements series connected between a driving power supply and the reference potential point. Two protection diodes are connected in parallel to the semiconductor switching elements respectively. At least one current blocking diode is configured to block current from flowing from the reference potential point through the diode to the switch circuit side when the DC power supply is connected to the inverter circuit in reverse polarity.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: February 7, 2017
    Assignees: KABUSHIKI KAISHA TOSHIBA, NSK Ltd.
    Inventors: Sari Maekawa, Shigeru Fukinuki, Shin Kumagai
  • Patent number: 9276397
    Abstract: A drive control method based on detected dielectric breakdown is provided. The drive control method includes individually determining whether dielectric breakdown of high voltage components occurs according to whether a switch for electrically connecting a high voltage battery and other high voltage components is opened and a condition of each of the high voltage components when dielectric resistance of a vehicle is measured to determine that dielectric breakdown of a high voltage system occurs. An operation of the high voltage components, the dielectric breakdown of which occurs, is stopped according to a determination result, when dielectric breakdown of high voltage components, which do not affect vehicle driving among the high voltage components, occurs.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: March 1, 2016
    Assignee: Hyundai Motor Company
    Inventors: Jong Hu Yoon, Mi Ok Kim
  • Patent number: 9257949
    Abstract: The invention relates to a “push-pull” amplifier, comprising an input (12) and an output (14), which includes: a main amplification branch comprising two amplification transistors (18, 20) connected in opposite series between two supply voltages (V+, V?), the amplifier output (14) being connected between the two transistors (18, 20), and a control circuit (22, 24) for each amplification transistor (18, 20) connected to the input (12) to each receive as an input the signal to be amplified. The main amplification branch comprises, between each transistor (18, 20) and the output (14), a member having a nonlinear response (38, 40) and means (30, 32) for introducing at the input of the control circuit (22, 24) of each transistor (18, 20), a nonlinear compensating signal suitable for bringing about the circulation of a minimum current in the member having a nonlinear response (38, 40).
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: February 9, 2016
    Assignee: DEVIALET
    Inventors: Mathias Moronvalle, Pierre-Emmanuel Calmel
  • Patent number: 9196817
    Abstract: This patent document discloses high voltage switches that include one or more electrically floating conductor layers that are isolated from one another in the dielectric medium between the top and bottom switch electrodes. The presence of the one or more electrically floating conductor layers between the top and bottom switch electrodes allow the dielectric medium between the top and bottom switch electrodes to exhibit a higher breakdown voltage than the breakdown voltage when the one or more electrically floating conductor layers are not present between the top and bottom switch electrodes. This increased breakdown voltage in the presence of one or more electrically floating conductor layers in a dielectric medium enables the switch to supply a higher voltage for various high voltage circuits and electric systems.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: November 24, 2015
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Roger W. Werne, Stephen Sampayan, John Richardson Harris
  • Patent number: 9076858
    Abstract: An integrated circuit includes a first pad configured to carry a signal, a first receiver having an input node, a second receiver having an input node, a first pass gate, and a second pass gate. The first pass gate is coupled between the first pad and the input node of the first receiver. The first pass gate is configured to be turned on when the signal on the first pad is greater than a first voltage level. The second pass gate is coupled between the first pad and the input node of the second receiver. The second pass gate is configured to be turned on when the signal on the first pad is less than a second voltage level.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: July 7, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Chung-Hui Chen
  • Publication number: 20150131189
    Abstract: A circuit breaker for high voltage direct current (HVDC) power transmission includes a module with a pair of terminals for connection to an electrical network, and four of conduction paths. Each first conduction path includes a mechanical switch connected in series with at least one first semiconductor switch to selectively allow current to flow between the first and second terminals through the first conduction path in a first mode of operation or commutate current from the first conduction path to the second conduction path in a second mode of operation. The second conduction path also has a semiconductor switch to selectively allow current to flow between the terminals through the second conduction path or commutate current from the second conduction path to the third conduction path in the second mode of operation.
    Type: Application
    Filed: March 1, 2012
    Publication date: May 14, 2015
    Applicant: ALSTOM TECHNOLOGY LTD
    Inventors: Colin Charnock Davidson, Colin Donald Murray Oates, Alistair Burnett
  • Patent number: 9025290
    Abstract: A protective circuit includes a first jack, a second jack, a first control unit, a detecting circuit, and a logic control circuit. The first jack is connected to a power supply, and includes a grounding wire and a live wire. The second jack is connected to a load, and includes a grounding wire and a live wire. The first control unit includes a first relay, the first relay is connected to the live wire of the first jack and the live wire of the second jack. The detecting circuit detects whether the grounding wire of the first jack is grounded, and outputs indication signals accordingly. The logic control circuit outputs a control signal to the first control unit according to the indication signals to turn on/off the first relay, for allowing the live wire of the first jack to be connected to/disconnected from the live wire of the second jack.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: May 5, 2015
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Wan-Hong Zhang, Hong-Ru Zhu
  • Patent number: 9013848
    Abstract: A protection circuit for a power transistor includes a first transistor connected in parallel with the power transistor and having a control terminal connected to a first power supply voltage through a first resistive element; and a first set of diodes connected between a first terminal and a control terminal of the first transistor. In operation, the voltage at the first terminal of the first transistor is clamped to a clamp voltage and the first transistor is turned on to conduct current in a forward conduction mode when an over-voltage condition occurs at a first terminal of the power transistor.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: April 21, 2015
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventor: Sik K. Lui
  • Patent number: 9006863
    Abstract: A diode string voltage adapter includes diodes formed in a substrate of a first conductive type. Each diode includes a deep well region of a second conductive type formed in the substrate. A first well region of the first conductive type formed on the deep well region. A first heavily doped region of the first conductive type formed on the first well region. A second heavily doped region of the second conductive type formed on the first well region. The diodes are serially coupled to each other. A first heavily doped region of a beginning diode is coupled to a first voltage. A second heavily doped region of each diode is coupled to a first heavily doped region of a next diode. A second heavily doped region of an ending diode provides a second voltage. The deep well region is configured to be electrically floated.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: April 14, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Peng Hsieh, Jaw-Juinn Horng
  • Publication number: 20150098162
    Abstract: Apparatus and methods are provided for bootstrap and over voltage protection (OVP) combination clamping. In one embodiment, method is provided to use the same bootstrap capacitors and bootstrap terminals for an over voltage protection circuit. In one embodiment, an integrated circuit for a wireless power receiver comprises a first rectifier input terminal RX1, a second rectifier input terminal RX2, a first bootstrap terminal HSB1, a second bootstrap terminal HSB2. A first and a second bootstrap circuit are coupled to HSB1 and HSB2 to power the rectifier circuit in a regular mode. A over voltage protection (OVP) circuit is coupled between HSB1 and HSB2. The OVP circuit is turned on to connect HSB1 and HSB2 together in an OVP mode.
    Type: Application
    Filed: October 9, 2013
    Publication date: April 9, 2015
    Applicant: Active-Semi, Inc.
    Inventor: James A. Kohout
  • Patent number: 8988840
    Abstract: Provided is an overcharge prevention circuit for clamping a voltage value of an electric power generation unit in an overcharged state to a constant value, in which the number of elements is small and which does not consume electric power unnecessarily. The overcharge prevention circuit includes: a backflow prevention diode; a clamping transistor having a gate connected to a cathode of the backflow prevention diode, a source connected to an anode thereof, and a drain connected to an overcharge prevention switch. Upon detection of overcharge, a current is discharged via the clamping transistor and the overcharge prevention switch, thereby clamping a potential of the electric power generation unit to around a voltage of an electricity storage unit.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 24, 2015
    Assignee: Seiko Instruments Inc.
    Inventors: Makoto Mitani, Kotaro Watanabe
  • Patent number: 8982524
    Abstract: A low forward voltage drop transient voltage suppressor utilizes a low-reverse-voltage-rated PN diode electrically connected in parallel to a high-reverse-voltage-rated Schottky rectifier in a single integrated circuit device. The transient voltage suppressor is ideally suited to fix the problem of high forward voltage drop of PN diodes and high leakage of low reverse breakdown of Schottky rectifiers. The low-reverse-voltage PN rectifier can be fabricated through methods such as 1) double layers of epi (with higher concentration layer epi in the bottom) or 2) punch through design of PN diode by base with compression.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: March 17, 2015
    Assignee: Vishay General Semiconductor, LLC
    Inventors: Lung-Ching Kao, Pu-Ju Kung, Yu-Ju Yu
  • Patent number: 8981482
    Abstract: A device used as an ESD protection structure, which is a modified N-type LDMOS device is disclosed. A conventional LDMOS includes only one N-type heavily doped region as a drain in an N-type lightly doped region (11), while the device of the invention includes a P-type heavily doped region (22) in an N-type lightly doped region (11), dividing the N-type heavily doped region into two N-type heavily doped regions (21, 23) unconnected and independent to each other. The N-type heavily doped region (21) close to the gate (14) has no picking-up terminal. The N-type heavily doped region (23) away from the gate (14) together with the P-type heavily doped region (22) is picked up and connected to an input/output bonding pad.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: March 17, 2015
    Assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corporation
    Inventor: Xiang Gao
  • Patent number: 8982520
    Abstract: A system and method for efficient input/output (I/O) port overvoltage protection of a high-speed port. An interfacing system for connecting peripheral devices to a computing system comprises ports for conveying serial communications bi-directional signals and an overvoltage protection circuit. The protection circuit prevents an overvoltage condition on one port in response to an overvoltage event on a corresponding second port. In one embodiment, the interfacing system connects USB peripheral devices to an automotive infotainment system comprising an automotive battery potiential greater than a USB power supply. In addition, the overvoltage protection circuit is able to transmit signals between the two ports without signal attenuation defined by an industry standard specification such as Universal Serial Bus (USB) Implementers Forum (IF) eye pattern diagram test.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: March 17, 2015
    Assignee: Standard Microsystems Corporation
    Inventors: Alexei A. Predtetchenski, Hans L. Magnusson
  • Publication number: 20150061530
    Abstract: A light source driving apparatus, a display apparatus and a driving method thereof are disclosed. The light source driving apparatus includes a tapped-inductor boost converter (TIBC) circuit, the TIBC circuit including: a switching unit configured to be turned on and off in accordance with a preset cycle; a tapped inductor configured to transfer a current from a primary side to a secondary side as the switching unit is turned on; and a snubber configured to include a clamp capacitor and clamp diode configured to clamp a voltage of the switching unit, a resonance capacitor configured to perform a resonance as being charged and discharged corresponding to a switching cycle of the switching unit, and first and second resonance diodes configured to charge and discharge the resonance capacitor. Thus, the TIBC circuit provided with the lossless snubber can prevent the voltage stress from increasing during the resonance since the voltage of the switching unit is clamped.
    Type: Application
    Filed: April 25, 2014
    Publication date: March 5, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jeong-il KANG
  • Publication number: 20150055262
    Abstract: A snubber circuit includes a capacitor and a buffer device. The buffer device has a first terminal and a second terminal. The first terminal is electrically connected to the capacitor. When the buffer device operates in a first conduction mode, a charge current flows from the second terminal to the first terminal through the buffer device. When the buffer device switches from the first conduction mode to a second conduction mode, the buffer device generates a discharge current which flows from the first terminal to the second terminal through the buffer device over a specific period of time, such that after the buffer device enters the second conduction mode, a relative maximum voltage level appearing first at the second terminal is lower than a voltage level at the first terminal.
    Type: Application
    Filed: August 22, 2014
    Publication date: February 26, 2015
    Inventor: Kuo-Fan Lin
  • Patent number: 8958189
    Abstract: A high voltage semiconductor switch includes a first field-effect transistor having a source, a drain and a gate, and being adapted for switching a voltage at a rated high-voltage level, the first field-effect transistor being a normally-off enhancement-mode transistor, a second field-effect transistor having a source, a drain and a gate, connected in series to the first field-effect transistor, the second field-effect transistor being a normally-on depletion-mode transistor; and a control unit connected to the drain of the first field-effect transistor and to the gate of the second field-effect transistor and being operable for blocking the second field-effect transistor if a drain-source voltage across the first field-effect transistor exceeds the rated high-voltage level.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: February 17, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Joachim Weyers, Franz Hirler, Anton Mauder
  • Publication number: 20150043116
    Abstract: A high voltage semiconductor switch includes a first field-effect transistor having a source, a drain and a gate, and being adapted for switching a voltage at a rated high-voltage level, the first field-effect transistor being a normally-off enhancement-mode transistor, a second field-effect transistor having a source, a drain and a gate, connected in series to the first field-effect transistor, the second field-effect transistor being a normally-on depletion-mode transistor; and a control unit connected to the drain of the first field-effect transistor and to the gate of the second field-effect transistor and being operable for blocking the second field-effect transistor if a drain-source voltage across the first field-effect transistor exceeds the rated high-voltage level.
    Type: Application
    Filed: August 9, 2013
    Publication date: February 12, 2015
    Applicant: Infineon Technologies Austria AG
    Inventors: Joachim Weyers, Franz Hirler, Anton Mauder
  • Publication number: 20150043118
    Abstract: An input protection circuit changes the voltage of a signal to be input to an input circuit to a predetermined voltage or less and outputs the signal. The input protection circuit includes a first NMOS transistor and a second NMOS transistor. The first NMOS transistor includes a source to which an input signal is input, a gate to which a voltage based on a first voltage is applied, and a drain that outputs the signal to the input circuit based on the input signal and the gate voltage. The second NMOS transistor includes a source and a gate to each of which the voltage based on the first voltage is applied, and a drain that outputs a second voltage to the input circuit.
    Type: Application
    Filed: August 7, 2014
    Publication date: February 12, 2015
    Inventors: Hidehiko YAJIMA, Satoru KODAIRA
  • Publication number: 20150043117
    Abstract: A charger with over-voltage and over-current protection and a method for using the same are provided. The charger comprises a first interface, a second interface, a voltage stabilizing unit, a control unit, an input voltage sampling unit, a switch unit, and a current sampling unit. The voltage stabilizing unit receives an input voltage of an external power supply and provides a constant working voltage to the control unit. The input voltage sampling unit detects the input voltage real-timely. The current sampling unit detects charging current of the battery rod real-timely. The control unit determines whether the input voltage detected by the input voltage sampling unit generates over-voltage or not, or determines whether the charging current detected by the current sampling unit generates over-current or not, and controls the switch unit to turn on or turn off according to the determination results.
    Type: Application
    Filed: October 17, 2013
    Publication date: February 12, 2015
    Inventor: Zhiyong Xiang
  • Patent number: 8952456
    Abstract: A representative electrostatic discharge (ESD) protection circuit includes a silicon-controlled rectifier comprising an alternating arrangement of a first P-type semiconductor material, a first N-type semiconductor material, a second P-type semiconductor material and a second N-type semiconductor material electrically coupled between an anode and a cathode. The anode is electrically coupled to the first P-type semiconductor material and the cathode is electrically coupled to the second N-type semiconductor material. The ESD protection circuit further includes an inductor electrically coupled between the anode and the second P-type semiconductor material or between the cathode and the first N-type semiconductor material.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: February 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Do Ker, Chun-Yu Lin
  • Publication number: 20150036252
    Abstract: A semiconductor driving device includes a negative surge detection circuit and a level shifter circuit. The negative surge detection circuit detects whether the negative surge occurs at a connection point between a P-side SW element and N-side SW element. The level shifter circuit maintains a driving voltage used in driving the P-side SW element upon the negative surge detection circuit detecting occurrence of the negative surge.
    Type: Application
    Filed: April 3, 2014
    Publication date: February 5, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Motoki IMANISHI, Kenji SAKAI, Takaki NAKASHIMA
  • Patent number: 8941962
    Abstract: A snubber circuit includes: at least one impedance component, a capacitor, and a Bipolar Junction Transistor (BJT). The snubber circuit is utilized for protecting electric/electronic components, reducing high frequency interference and spike voltage, and enhancing efficiency. In particular, the at least one impedance component in the snubber circuit can be at least one zener diode, where regarding protecting electric/electronic components, reducing high frequency interference and spike voltage, and enhancing efficiency, the performance of the snubber circuit in a situation where the zener diode is utilized is better than that of the snubber circuit in a situation where other types of impedance components are utilized. An associated method of using a BJT in a snubber circuit is also provided.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: January 27, 2015
    Assignee: FSP Technology Inc.
    Inventor: Kuo-Fan Lin
  • Patent number: 8934207
    Abstract: A protective circuit for protecting an input or an output of an electrical apparatus against an overvoltage, wherein a series circuit is arranged at the input or the output, the series circuit includes a first transistor and a second transistor, each transistor comprises a gate terminal, a drain terminal and a source terminal, and the drain terminal of the first transistor is connected to a first terminal point and the source terminal of the second transistor is connected to the input or the output and the source terminal of the first transistor is connected to the drain terminal of the second transistor. In addition, the gate terminal of the first transistor is connected via a first resistor to a first pole of a voltage source and the gate terminal of the second transistor is connected via a second resistor to a second pole of the voltage source.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: January 13, 2015
    Assignee: Siemens Aktiengesellschaft
    Inventor: Thomas Nötzold
  • Patent number: 8916935
    Abstract: A device includes a High-Voltage N-Well (HVNW) region have a first edge, and a High-Voltage P-Well (HVPW) region having a second edge adjoining the first edge. A first Shallow N-well (SHN) region is disposed over a lower portion of the HVNW region, wherein the first SHN region is spaced apart from the first edge by an upper part of the HVNW region. A second SHN region is disposed over a lower portion of the HVPW region, wherein the second SHN region is laterally spaced apart from the second edge. A Shallow P-well (SHP) region is disposed over the lower portion of the HVPW region, and is between the first SHN region and the second SHN region. The SHP region has a p-type impurity concentration higher than a p-type impurity concentration of the HVPW region. An isolation region is disposed over and contacting the SHP region.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: December 23, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chien-Fu Huang
  • Patent number: 8913357
    Abstract: An ESD circuit is disclosed. The ESD circuit includes a pad and a ground and a sensing element coupled between the pad and ground for sensing an ESD current. The sensing element generates an active sense output signal when an ESD current is sensed and an inactive sense output signal when no ESD current is sensed. The ESD circuit also includes a bypass element comprising a bi-polar junction transistor. The bypass element is coupled in parallel to the sensing element between the pad and ground. The active sense output signal causes the bypass element to be activated to provide a current path between the pad and ground.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: December 16, 2014
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Da-Wei Lai, Mahadeva Iyer Natarajan
  • Patent number: 8908345
    Abstract: In a stacked chip system, an IO circuit connected to a TSV pad for IO and a switch circuit constitute an IO channel in each chip, the IO channels as many as the maximum scheduled number of stacks are coupled together and connected to constitute an IO group, and the chip has one or more such IO groups. Each TSV pad for IO is connected with a through via to an IO terminal at the same position in a chip of another layer. On an interposer, if the actual number of stacks is less than the maximum scheduled number of stacks, connection pads for IO in adjacent IO groups on the interposer are connected via a conductor.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: December 9, 2014
    Assignee: Hitachi,Ltd.
    Inventors: Futoshi Furuta, Kenichi Osada
  • Patent number: 8902557
    Abstract: A fault protector for an opto-electronic device includes a MOSFET having an integral body-diode. A capacitor is connected between a drain and a gate of the MOSFET, and a resistor is connected between the gate and a source of the MOSFET. The drain of the MOSFET is connectable to a first terminal of an opto-electronic device, and the source of the MOSFET is connectable to a second terminal of the opto-electronic device. The device overcomes problems of previously known techniques by preventing a reverse-bias voltage from exceeding an absolute maximum specified by a manufacturer, and also prevents ESD or other power-related faults from exceeding the maximum forward-bias voltage of the laser diode, while not adding significant resistance or capacitance to the laser diode, thereby not complicating the task of driving the laser diode.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: December 2, 2014
    Inventor: William R. Benner, Jr.
  • Publication number: 20140334050
    Abstract: At least one of an electrical circuit, and arc suppression device, and an arc suppressor includes a pair of terminals, an event detection element, and a non-linear current shunt element in series with the event detection element.
    Type: Application
    Filed: May 7, 2014
    Publication date: November 13, 2014
    Inventor: Reinhold Henke