Molecular Or Atomic Patents (Class 365/151)
  • Patent number: 10916579
    Abstract: An optoelectronic device including light-emitting diodes (LED), each light-emitting diode including a semiconductor element corresponding to a nanowire, a microwire, and/or a nanometer- or micrometer-range pyramidal structure, and a shell at least partially covering the semiconductor element and adapted to emit a radiation and for each light-emitting diode, a photoluminescent coating including a single quantum well, multiple quantum wells or an heterostructure, covering at least part of the shell and in contact with the shell or with the semiconductor element and adapted to convert by optical pumping the radiation emitted by the shell into another radiation.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: February 9, 2021
    Assignee: Aledia
    Inventors: Wei Sin Tan, Philippe Gilet
  • Patent number: 10910031
    Abstract: According to certain implementations of the present disclosure, an input circuit provides one or more reference paths and bit paths for sense amplifier circuit operations. In one implementation, the input circuit includes a reference path, a bit path, and a CMOS resistor. The reference path includes a first MTJ device and a first access device, where the reference path is coupled to the sense amplifier via a first input terminal. The bit path includes a second MTJ device and a second access device, where the bit path is coupled to the sense amplifier via a second input terminal. In certain implementations, the CMOS resistor is coupled to one of the reference path or the bit path.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: February 2, 2021
    Assignee: Arm Limited
    Inventors: El Mehdi Boujamaa, Cyrille Nicolas Dray
  • Patent number: 10885979
    Abstract: A method is presented for mitigating conductance drift in intercalation cells for neuromorphic computing. The method includes forming a first electro-chemical random access memory (ECRAM) structure over a substrate and forming a second ECRAM over the substrate, the first and second ECRAMs sharing a common contact. The common contact can be either a source contact or a drain contact. Each of the first and second ECRAMs can include a tungsten oxide layer, an electrolyte layer, and a gate contact.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: January 5, 2021
    Assignee: International Business Machines Corporation
    Inventors: Jianshi Tang, Praneet Adusumilli, Reinaldo Vega, Takashi Ando
  • Patent number: 10886466
    Abstract: The present invention relates to a variable resistor comprises a first electrode, a second electrode, and a resistive switching layer disposed between the first electrode and the second electrode, wherein the resistive switching layer has a Brown-Millerite structure crystallized in an inclined orientation across the first electrode and the second electrode as an initial structure.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: January 5, 2021
    Assignee: HANKUK UNIVERSITY OF FOREIGN STUDIES RESEARCH BUSINESS FOUNDATION
    Inventors: Chang-Uk Jung, Susant Kumar Acharya, Venkata Raveendra Nallagatla, Bo Wha Lee, Chunli Liu
  • Patent number: 10867718
    Abstract: Provided herein are mechanically interlocked air-stable persistent organic radicals. The radical compositions may access a multiplicity of radical, cationic redox states as well as a fully cationic redox state. A composition comprises a first ring mechanically interlocked with a second ring or a salt thereof, wherein the first ring comprises a 4,4?-bipyridinium subunit or a derivative thereof and a diazapyrenium subunit or a derivative thereof and the second ring comprises a 4,4?-bipyridinium subunit or a derivative thereof. In some embodiments, the second ring further comprises a diazapyrenium subunit or a derivative thereof. Methods of preparing the compositions are also provided.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: December 15, 2020
    Assignee: Northwestern University
    Inventors: Zhichang Liu, Junling Sun, James Fraser Stoddart
  • Patent number: 10700273
    Abstract: In a first aspect of the present disclosure, there is provided a nonvolatile memory device comprising: two electrodes; and a protein switching layer interposed between the two electrodes and including an amino acid, wherein then a voltage is applied to one of the electrodes, the amino acid chelates with an active electrode material to form a conductive filament, wherein the formation of the conductive filament allows a resistance state of the device to vary.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: June 30, 2020
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Sungjoo Lee, Woo-Seok Choe, Sung Kyu Jang
  • Patent number: 10580976
    Abstract: A phase change memory device includes first conductive rails laterally extending along a first horizontal direction over a substrate, a rectangular array of memory pillar structures overlying top surfaces of the first conductive rails, and second conductive rails laterally extending along a second horizontal direction and overlying top surfaces of the rectangular array of memory pillar structures. Each memory pillar structure includes a vertical stack of structural elements including, from one end to another, a selector-side conductive element, a selector element, a selector-memory conductive element, a phase change memory element, and a memory-side conductive element. At least one structural element within the vertical stack is a laterally constricted structural element having laterally recessed sidewalls relative to sidewalls of a respective immediately vertically underlying structural element.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: March 3, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Yuji Takahashi, Vincent Shih, Christopher Petti
  • Patent number: 10426857
    Abstract: Systems, devices, methods, and compositions are described for providing an actively controllable implant configured to, for example, monitor, treat, or prevent microbial growth or adherence to the implant.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: October 1, 2019
    Assignee: Gearbox, LLC
    Inventors: Edward S. Boyden, Roy P. Diaz, Roderick A. Hyde, Jordin T. Kare, Elizabeth A. Sweeney, Lowell L. Wood
  • Patent number: 10368146
    Abstract: Systems and methods are provided for environment sensing. The system includes a sensor node having a sensor. The sensor includes a sensing material configured to be in contact with an ambient environment. The system includes a remote system having a communication circuit and a controller circuit. The communication circuit is configured to be wirelessly communicatively coupled to the sensor node. The controller circuit electrically coupled to the communication circuit. The controller circuit configured to receive an impedance response of the sensing material and analyze the impedance response of the sensing material at frequencies that provide a linear response of the sensing material to an analyte of interest and at least partially reject effects of interferences.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: July 30, 2019
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Radislav Alexandrovich Potyrailo, Daniel White Sexton, Steven Go
  • Patent number: 10328688
    Abstract: A dampening fluid useful in offset ink printing applications contains water and a surfactant whose structure can be altered. The alteration in structure aids in reducing accumulation of the surfactant on the surface of an imaging member. The surfactant can be decomposed, switched between cis-trans states, or polymerizable with ink that is subsequently placed on the surface.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: June 25, 2019
    Assignees: Xerox Corporation, Palo Alto Research Corporation
    Inventors: Naveen Chopra, Peter Gordon Odell, Steven E. Ready, Eric Peeters, Timothy D. Stowe, Ashish Pattekar, David K. Biegelsen
  • Patent number: 10304733
    Abstract: Carbon nanotube template arrays may be edited to form connections between proximate nanotubes and/or to delete undesired nanotubes or nanotube junctions.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: May 28, 2019
    Assignee: DEEP SCIENCE, LLC
    Inventors: Roderick A. Hyde, Muriel Y. Ishikawa, Nathan P. Myhrvold, Clarence T. Tegreene, Charles Whitmer, Lowell L. Wood, Jr.
  • Patent number: 10161748
    Abstract: An ultrasonic measurement apparatus includes: a first phasing addition circuit that receives electric signals output from a plurality of reception ultrasonic elements, shifts the plurality of electric signals in a time axis direction to combine the plurality of electric signals, and outputs a composite signal; a second electro-optical conversion unit and a second light emitting unit that receive the composite signal, convert the composite signal into an optical signal, and output the optical signal; an optical cable through which the optical signal is transmitted; and a second light receiving unit and a second photoelectric conversion unit that receive the optical signal and converts the optical signal into an electric signal. The second light emitting unit outputs the optical signal after the first phasing addition circuit outputs the composite signal.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: December 25, 2018
    Assignee: Seiko Epson Corporation
    Inventor: Yoshio Arai
  • Patent number: 10060860
    Abstract: Nanomaterials fabricated to pharmaceutical dosage forms are disclosed. The nanomaterials are useful to provide a plurality of analysis to the dosage form. Consequently, the nanomaterials provide a means to perform quality testing on a continuous basis throughout the supply chain, including the cold chain whereby manufacturers and distributors can achieve greater product integrity and longer shelf life and ultimately minimize cost. The end user benefits in obtaining the highest quality drugs at the time of need.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: August 28, 2018
    Assignee: SMP Logic Systems
    Inventor: Shane M. Popp
  • Patent number: 10038141
    Abstract: Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, precursors, in a gaseous form, may be utilized in a chamber to build a film of correlated electron materials comprising various impedance characteristics.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: July 31, 2018
    Assignee: ARM Ltd.
    Inventors: Carlos Alberto Paz de Araujo, Kimberly Gay Reid, Lucian Shifren
  • Patent number: 9911743
    Abstract: Under one aspect, a method of making a nanotube switch includes: providing a substrate having a first conductive terminal; depositing a multilayer nanotube fabric over the first conductive terminal; and depositing a second conductive terminal over the multilayer nanotube fabric, the nanotube fabric having a thickness, density, and composition selected to prevent direct physical and electrical contact between the first and second conductive terminals. In some embodiments, the first and second conductive terminals and the multilayer nanotube fabric are lithographically patterned so as to each have substantially the same lateral dimensions, e.g., to each have a substantially circular or rectangular lateral shape. In some embodiments, the multilayer nanotube fabric has a thickness from 10 nm to 200 nm, e.g., 10 nm to 50 nm. The structure may include an addressable diode provided under the first conductive terminal or deposited over the second terminal.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: March 6, 2018
    Assignee: Nantero, Inc.
    Inventors: Claude L. Bertin, Thomas Rueckes, X. M. Henry Huang, Ramesh Sivarajan, Eliodor G. Ghenciu, Steven L. Konsek, Mitchell Meinhold, Jonathan W. Ward, Darren K. Brock
  • Patent number: 9893282
    Abstract: A resistive memory element comprises a first electrode, an active material over the first electrode, a buffer material over the active material and comprising longitudinally extending, columnar grains of crystalline material, an ion reservoir material over the buffer material, and a second electrode over the ion reservoir material. A memory cell, a memory device, an electronic system, and a method of forming a resistive memory element are also described.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: February 13, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Christopher W. Petz, Yongjun Jeff Hu, Scott E. Sills, D. V. Nirmal Ramaswamy
  • Patent number: 9849437
    Abstract: A method is provided for modifying a surface of a solid conducting material, which includes applying a potential difference between this surface and a surface of another conducting solid material positioned facing it, and wherein, simultaneously, the surface (S) is put into contact with a liquid medium comprising in solution triarylamines (I): while subjecting these triarylamines (I) to electromagnetic radiation, at least partly converting them at into triarylammonium radicals. Also provided is a conducting device which includes two conducting metal materials, the surfaces of which, (S) and (S?) respectively, are electrically interconnected through an organic material comprising conducting fibrillar organic supramolecular species comprising an association of triarylamines of formula (I).
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: December 26, 2017
    Assignees: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (C.N.R.S.), UNIVERSITE DE STRASBOURG
    Inventors: Nicolas Giuseppone, Jean-François Dayen, Vina Faramarzi, Emilie Moulin, Frederic Niess, Bernard Doudin
  • Patent number: 9707523
    Abstract: A membrane filter 26 is disclosed comprising cellulous material 23 allowing the transition of fluid therethrough, and, in a substantially dry state, said membrane comprising also a salt of deoxycholic acid. Optionally, the air side of the membrane (the side facing away from the screen or belt used to manufacture the membrane) faces the sample fluid during use of the membrane. A method of manufacture of the membrane material is disclosed also, employing deoxycholic acid as a surfactant, to improve the recovery rate of the membrane filter in use.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: July 18, 2017
    Assignee: Whatman GmbH
    Inventors: Klaus Hochleitner, Suzana Kiel
  • Patent number: 9612690
    Abstract: There is provided an sensing device, comprising: a substrate; a sensor ink printed onto the substrate; a conductive polymer ink printed onto the sensor ink; a conductive carbon paste formed on the polymer ink; and a conductive silver ink printed on the conductive carbon paste. There is also provided a sensing device for processing a signal generated by the input device, the sensing device comprising: an operational amplifier to amplify the signal; a filter to filter signal noise from the signal; an adder to apply an offset and attenuation to the signal; a microcontroller comprising an analog to digital converter to convert the signal into a digital output signal.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: April 4, 2017
    Assignees: FH-OÖ Forschungs and Entwicklungs GmbH, Joanneum Research Forschungsgesellschaft MBH
    Inventors: Martin Zirkl, Barbara Stadlober, Michael Haller, Patrick Greindl, Christian Rendl
  • Patent number: 9577127
    Abstract: A composite material for fluorescent quantum dot micro-nano packaging. The composite material comprises fluorescent quantum dots, a mesoporous particle material having a nanometer lattice structure, and a barrier layer, wherein the fluorescent quantum dots are distributed in the mesoporous particle material, and the barrier layer is coated on the outer surface of the mesoporous particle material. In the composite material according to the invention, the quantum dot aggregation can be effectively retarded, with the barrier layer coated on the surface the water-oxygen micromolecule erosion is prevented, the compatibility and stability of the composite fluorescent particles is improved, and the service life of the composite material for fluorescent quantum dot micro-nano packaging is thus greatly improved.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: February 21, 2017
    Assignee: Tianjin Zhonghuan Quantum Tech Co., Ltd.
    Inventors: Kai Wang, Wei Chen, Junjie Hao, Xinhai Zhang, Xiaowei Sun
  • Patent number: 9543003
    Abstract: Memory arrays and methods of forming the same are provided. An example memory array can include at least one plane having a plurality of memory cells arranged in a matrix and a plurality of plane selection devices. Groups of the plurality of memory cells are communicatively coupled to a respective one of a plurality of plane selection devices. A decode logic having elements is formed in a substrate material and communicatively coupled to the plurality of plane selection devices. The plurality of memory cells and the plurality of plane selection devices are not formed in the substrate material.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: January 10, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Jong Won Lee, Gianpaolo Spadini
  • Patent number: 9543536
    Abstract: An organic molecular memory in an embodiment includes a first conducive layer, a second conductive layer, and an organic molecular layer provided between the first conductive layer and the second conductive layer, the organic molecular layer having an organic molecule, the organic molecule having a linker group bonded to the first conductive layer, a ? conjugated chain bonded to the linker group, and a phenyl group bonded to the ? conjugated chain opposite to the linker group and facing the second conductive layer, the ? conjugated chain including electron-accepting groups or electron-donating groups arranged in line asymmetry with respect to a bonding direction of the ? conjugate chain, the phenyl group having substituents R0, R1, R2, R3, and R4 as shown in the following formula, the substituent R0 being an electron-accepting group or an electron-donating group.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: January 10, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Tanaka, Hideyuki Nishizawa, Shigeki Hattori, Koji Asakawa
  • Patent number: 9514809
    Abstract: Memory arrays and methods of forming the same are provided. An example memory array can include at least one plane having a plurality of memory cells arranged in a matrix and a plurality of plane selection devices. Groups of the plurality of memory cells are communicatively coupled to a respective one of a plurality of plane selection devices. A decode logic having elements is formed in a substrate material and communicatively coupled to the plurality of plane selection devices. The plurality of memory cells and the plurality of plane selection devices are not formed in the substrate material.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: December 6, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Jong Won Lee, Gianpaolo Spadini
  • Patent number: 9472595
    Abstract: The present invention is directed to a magnetic random access memory (MRAM) comprising an MRAM die having a front side that includes therein a plurality of perpendicular magnetic tunnel junction (MTJ) memory elements and a back side; and a sheet of permanent magnet disposed in close proximity to the MRAM die with a sheet surface facing the front side or back side of the MRAM die. The sheet of permanent magnet has a permanent magnetization direction substantially perpendicular to the sheet surface facing the MRAM die and exerts a magnetic field that eliminate or minimize the offset field of the magnetic free layer. The MRAM die and the sheet of permanent magnet may be encapsulated by a package case. The MRAM may further comprise a soft magnetic shield disposed on a side of the MRAM die opposite the sheet of permanent magnet.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: October 18, 2016
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Bing K. Yen, Yiming Huai, Ebrahim Abedifard
  • Patent number: 9368198
    Abstract: A memory device can include a plurality of two terminal conductive bridging random access memory (CBRAM) type memory elements; at least one program transistor configured to enable a program current to flow through at least one memory element in response to the application of a program signal at its control terminal and a program bias voltage to the memory element; and an erase load circuit that includes at least one two-terminal diode-like load element, the erase load circuit configured to enable an erase current to flow through the load element and at least one memory element in a direction opposite to that of the program current.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: June 14, 2016
    Assignee: Adesto Technologies Corporation
    Inventors: Deepak Kamalanathan, Juan Pablo Saenz Echeverry, Venkatesh P. Gopinath
  • Patent number: 9345135
    Abstract: Electronic devices may include a first substrate including circuitry components within the substrate, a microscale bond pad on a surface of the substrate, and a via electrically connecting the microscale bond pad to one of the circuitry components. A distance between centers of at least some adjacent circuitry components of the circuitry components may be a nanoscale distance. A second substrate may be electrically connected to the microscale bond pad. Methods of forming electronic devices may involve positioning a first substrate adjacent to a second substrate and electrically connecting the second substrate to a microscale bond pad on a surface of the first substrate. The first substrate may include circuitry components within the first substrate and a via electrically connecting the microscale bond pad to one of the circuitry components. A distance between centers of at least some adjacent circuitry components of the circuitry components may be a nanoscale distance.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: May 17, 2016
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Roy E. Meade, Gurtej S. Sandhu
  • Patent number: 9208864
    Abstract: A memory includes cytokines, such as macromolecule proteins, as a poly-state data storage. Each fold state of multiple fold states of a protein are associated with a data value. Current flow through the protein is associated with a resistance of the protein associated with its current fold state. Application of light, electric fields or heat via an associated element or elements facilitates placement of a protein in a fold state that corresponds to an associated resistance and correlates with an incoming data value. Measuring of current or resistance allows for reading of a data value associated with the protein.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: December 8, 2015
    Assignee: Toshiba America Electronic Components, Inc.
    Inventor: Rakesh Sethi
  • Patent number: 9181089
    Abstract: Carbon nanotubes (CNTs) and carbon nanotube field effect transistors (CNFETs) have demonstrated extraordinary properties and are widely accepted as the building blocks of next generation VLSI circuits. A CNT crossbar based nano-architecture, includes layers of orthogonal carbon nanotubes with electrically bistable and charge holding molecules at each crossing, forming a dense array of reconfigurable double gate carbon nanotube field effect transistors (RDG-CNFETs) and programmable interconnects, which is addressed via a voltage controlled nanotube addressing circuits on the boundaries.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: November 10, 2015
    Assignee: Board of Regents of the University of Texas System
    Inventor: Bao Liu
  • Patent number: 9183916
    Abstract: A non-volatile electro-mechanical diode memory cell is described for implementation of compact (4F2) cross-point memory arrays. The electro-mechanical diode memory cells operate with relatively low set/reset voltages and excellent retention characteristics, and are multi-time programmable. Due to its simplicity, this electro-mechanical diode memory cell is attractive for implementation of three-dimensional memory arrays for higher storage density.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: November 10, 2015
    Assignee: The Regents of the University of California
    Inventors: Tsu-Jae King Liu, Wookhyun Kwon
  • Patent number: 9111788
    Abstract: Memory device constructions include a first column line extending parallel to a second column line, the first column line being above the second column line; a row line above the second column line and extending perpendicular to the first column line and the second column line; memory material disposed to be selectively and reversibly configured in one of two or more different resistive states; a first diode configured to conduct a first current between the first column line and the row line via the memory material; and a second diode configured to conduct a second current between the second column line and the row line via the memory material. In some embodiments, the first diode is a Schottky diode having a semiconductor anode and a metal cathode and the second diode is a Schottky diode having a metal anode and a semiconductor cathode.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: August 18, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Jun Liu
  • Patent number: 9097781
    Abstract: Apparatus, methods, and other embodiments associated with NMR fingerprinting with parallel transmission are described. One example apparatus includes individually controllable radio frequency (RF) transmission (TX) coils configured to apply varying NMR fingerprinting RF excitations to a sample. The NMR apparatus may apply excitations in parallel. An individual excitation causes different resonant species to produce different signal evolutions. The apparatus includes a parallel transmission logic that causes one of the coils to apply a first excitation to the sample and that causes a different coil to apply a second, different excitation to the sample. The excitations are configured to produce a spatial inhomogeneity between a first region in the sample and a second region in the sample that allows a resonant species to produce a first signal evolution in the first region and to produce a second signal evolution in the second region to facilitate de-correlating the signal evolutions.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: August 4, 2015
    Inventor: Mark Griswold
  • Patent number: 9076618
    Abstract: A nanoelectromechanical device is provided. The nanoelectromechanical device includes a nanotube, a first contact, and a first actuator. The nanotube includes a first end, the first end supported by a first structure, a second end opposite the first end, and a first portion. The first actuator is configured to apply a first force to the nanotube, the first force causing the nanotube to buckle such that the first portion couples to the first contact.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: July 7, 2015
    Assignee: ELWHA LLC
    Inventors: Howard L. Davidson, Roderick A. Hyde, Jordin T. Kare, Richard T. Lord, Robert W. Lord, Nathan P. Myhrvold, Clarence T. Tegreene, Charles Whitmer, Lowell L. Wood, Jr.
  • Patent number: 9054702
    Abstract: Providing for a field programmable gate array (FPGA) utilizing resistive random access memory (RRAM) technology is described herein. By way of example, the FPGA can comprise a switching block interconnect having parallel signal input lines crossed by perpendicular signal output lines. RRAM memory cells can be formed at respective intersections of the signal input lines and signal output lines. The RRAM memory cell can include a voltage divider comprising multiple programmable resistive elements arranged electrically in series across a VCC and VSS of the FPGA. A common node of the voltage divider drives a gate of a pass gate transistor configured to activate or deactivate the intersection. The disclosed RRAM memory can provide high transistor density, high logic utilization, fast programming speed, radiation immunity, fast power up and significant benefits for FPGA technology.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: June 9, 2015
    Assignee: CROSSBAR, INC.
    Inventors: Hagop Nazarian, Sang Thanh Nguyen, Tanmay Kumar
  • Patent number: 9019756
    Abstract: In one embodiment, a non-volatile memory bitcell includes a program electrode, an erase electrode, a cantilever electrode connected to a bi-stable cantilever positioned between the program electrode and the erase electrode, and switching means connected to the program electrode arranged to apply a voltage potential onto the program electrode, or to detect or to prevent the flow of current from the cantilever to the program electrode. The switching means may comprise a switch having a first node, a second node, and a control node, wherein voltage is applied to the control node to activate the switch to provide a connection between the first node and the second node. The switching means may comprise a pass-gate. The switching means may comprise an NMOS transistor. The switching means may comprise a PMOS transistor. The switching means may comprise a MEMS switch.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: April 28, 2015
    Assignee: Cavendish Kinetics, Ltd
    Inventor: Robertus Petrus van Kampen
  • Patent number: 9006402
    Abstract: An organic compound has the following chemical structure: wherein R is different from R*; R and R* are independently hydrogen, halogen, nitro or methoxyl; and R1 is a C1-C6 alkyl or a phenyl group. A quaternary data storage device includes a bottom electrode, a top electrode, and the organic film layer sandwiched between the bottom electrode and the top electrode.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: April 14, 2015
    Assignee: Zhangjiagang Institute of Industrial Technologies Soochow University
    Inventors: Jian-Mei Lu, Hua Li
  • Patent number: 8982606
    Abstract: A phase change memory device having a multi-level and a method of driving the same are presented. The disclosed phase change memory device includes variable resistors and shifting units. The variable resistors are interchanged into set and reset states in response to an applied current. The shifting units, which are connected to the variable resistors, shift resistance distribution in the set and reset state of the variable resistors by a predetermined level.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: March 17, 2015
    Assignee: SK hynix Inc.
    Inventors: Hae Chan Park, Se Ho Lee
  • Patent number: 8981356
    Abstract: A molecular memory device has an insulating film with a cavity, the cavity having an upper portion and a lower portion; a first conductive member with a portion exposed at the lower portion of the cavity; a second conductive member with a portion exposed at the upper portion of the cavity; and a resistance varying-type molecular chain disposed in the cavity and bonded with the first conductive member or the second conductive member. The cavity is wider than at least one of the first conductive member along a first direction and the second conductive member along a second direction.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuya Hayashi
  • Publication number: 20150070991
    Abstract: A nonvolatile memory system is described with novel architecture coupling nonvolatile storage memory with random access volatile memory. New commands are included to enhance the read and write performance of the memory system.
    Type: Application
    Filed: July 18, 2014
    Publication date: March 12, 2015
    Inventor: G. R. Mohan Rao
  • Patent number: 8917539
    Abstract: A solid-state, multi-valued, molecular random access memory (RAM) device, comprising an electrically, optically and/or magnetically addressable unit, a memory reader, and a memory writer. The addressable unit comprises a conductive substrate; one or more layers of electrochromic, magnetic, redox-active, and/or photochromic materials deposited on the conductive substrate; and a conductive top layer deposited on top the one or more layers. The memory writer applies a plurality of predetermined values of potential biases or optical signals or magnetic fields to the unit, wherein each predetermined value applied results in a uniquely distinguishable optical, magnetic and/or electrical state of the unit, thus corresponding to a unique logical value. The memory reader reads the optical, magnetic and/or electrical state of the unit.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: December 23, 2014
    Assignee: Yeda Research and Development Co., Ltd.
    Inventors: Milko E. Van Der Boom, Graham De Ruiter
  • Publication number: 20140269015
    Abstract: Hydro-carbon nanorings may be used in storage. Sufficiently cooled, an externally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of electrons. Similarly, an internally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of positrons. When matched streams of positrons and electrons are sufficiently compressed they may form Cooper pairs with magnetic moments aligned to the movement of the stream. Matched adjacent Cooper pairs of electrons and positrons may contain information within their magnetic moments, and as such, may transmit and store information with little or no energy loss. Information may be similarly encoded in magnetic moments of spins of pairs of positrons and electrons, not in the form of Cooper pairs.
    Type: Application
    Filed: May 28, 2014
    Publication date: September 18, 2014
    Inventor: Laurence H. Cooke
  • Patent number: 8811535
    Abstract: A computer-implemented method and system for generating large families of sequences with desirable properties for many applications, including communications and radar applications, applies constraints to a sequence in the Zak space, modulates the constrained sequence in the Zak space, and determines permutations of the modulated sequence in the Zak space. The constraints are associated with predetermined properties, including predetermined autocorrelation and cross-correlation properties. Other embodiments of the computer-implemented method and system transform an input sequence into a transformed sequence using the finite Zak transform and determine at least one other different sequence based on the transformed sequence. The at least one other different sequence can be determined by collecting a plurality of sequences that are finitely supported on an algebraic line in the Zak space and modulating and/or determining permutations of some or all of the sequences.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: August 19, 2014
    Assignee: Mitre Corporation
    Inventors: Andrzej K. Brodzik, Richard Tolimieri
  • Patent number: 8811063
    Abstract: Some embodiments include methods of programming a memory cell. A plurality of charge carriers may be moved within the memory cell, with an average charge across the moving charge carriers having an absolute value greater than 2. Some embodiments include methods of forming and programming an ionic-transport-based memory cell. A stack is formed to have programmable material between first and second electrodes. The programmable material has mobile ions which are moved within the programmable material to transform the programmable material from one memory state to another. An average charge across the moving mobile ions has an absolute value greater than 2. Some embodiments include memory cells with programmable material between first and second electrodes. The programmable material includes an aluminum nitride first layer, and includes a second layer containing a mobile ion species in common with the first layer.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: August 19, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Roy E. Meade, Bhaskar Srinivasan, Gurtej S. Sandhu
  • Patent number: 8773882
    Abstract: Certain embodiments of the present invention are directed to a method of programming nanowire-to-conductive element electrical connections. The method comprises: providing a substrate including a number of conductive elements overlaid with a first layer of nanowires, at least some of the conductive elements electrically coupled to more than one of the nanowires through individual switching junctions, each of the switching junctions configured in either a low-conductance state or a high-conductance state; and switching a portion of the switching junctions from the low-conductance state to the high-conductance state or the high-conductance state to the low-conductance state so that individual nanowires of the first layer of nanowires are electrically coupled to different conductive elements of the number of conductive elements using a different one of the switching junctions configured in the high-conductance state.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: July 8, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Zhiyong Li, Warren Robinett
  • Patent number: 8753967
    Abstract: It is an object to solve inhibition of miniaturization of an element and complexity of a manufacturing process thereof. It is another object to provide a nonvolatile memory device and a semiconductor device having the memory device, in which data can be additionally written at a time besides the manufacturing time and in which forgery caused by rewriting of data can be prevented. It is further another object to provide an inexpensive nonvolatile memory device and semiconductor device. A memory element is manufactured in which a first conductive layer, a second conductive layer that is beside the first conductive layer, and conductive fine particles of each surface which is covered with an organic film are deposited over an insulating film. The conductive fine particles are deposited between the first conductive layer and the second conductive layer.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: June 17, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiharu Hirakata
  • Patent number: 8743578
    Abstract: Hydro-carbon nanorings may be used in storage. Sufficiently cooled, an externally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of electrons. Similarly, an internally hydrogen doped carbon nanoring may be used to create a radial dipole field to contain streams of positrons. When matched streams of positrons and electrons are sufficiently compressed they may form Cooper pairs with magnetic moments aligned to the movement of the stream. Matched adjacent Cooper pairs of electrons and positrons may contain information within their magnetic moments, and as such, may transmit and store information with little or no energy loss.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: June 3, 2014
    Inventor: Laurence H. Cooke
  • Patent number: 8711612
    Abstract: Disclosed is a memory circuit and method of forming the same. The memory circuit comprises a lower metallization layer defining first conducting lines. A continuous magnetic storage element stack is atop the lower metallization layer wherein a bottom electrode of the stack is in direct contact with the first conducting lines. An upper metallization layer is atop the continuous magnetic storage element stack, the upper metallization layer defining second conducting lines, which are in direct contact with said continuous magnetic storage element stack. Localized areas of the continuous magnetic storage element stack define discrete magnetic bits, each energizable through a selected pair of the first and second conducting lines. In a second aspect and a third aspect, the continuous magnetic storage element stack is respectively partially and fully etched through a single mask, to define the discrete magnetic bits.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: April 29, 2014
    Assignee: MagSil Corporation
    Inventor: Krishnakumar Mani
  • Patent number: 8693242
    Abstract: A nanoelectromechanical device is provided. The nanoelectromechanical device includes a nanotube, a first contact, and a first actuator. The nanotube includes a first end, the first end supported by a first structure, a second end opposite the first end, and a first portion. The first actuator is configured to apply a first force to the nanotube, the first force causing the nanotube to buckle such that the first portion couples to the first contact.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: April 8, 2014
    Assignee: Elwha LLC
    Inventors: Howard L. Davidson, Roderick A. Hyde, Jordin T. Kare, Richard T. Lord, Robert W. Lord, Nathan P. Myhrvold, Clarence T. Tegreene, Charles Whitmer, Lowell L. Wood, Jr.
  • Patent number: 8687402
    Abstract: A non-volatile solid state resistive device that includes a first electrode, a p-type poly-silicon second electrode, and a non-crystalline silicon nanostructure electrically connected between the electrodes. The nanostructure has a resistance that is adjustable in response to a voltage being applied to the nanostructure via the electrodes. The nanostructure can be formed as a nanopillar embedded in an insulating layer located between the electrodes. The first electrode can be a silver or other electrically conductive metal electrode. A third (metal) electrode can be connected to the p-type poly-silicon second electrode at a location adjacent the nanostructure to permit connection of the two metal electrodes to other circuitry. The resistive device can be used as a unit memory cell of a digital non-volatile memory device to store one or more bits of digital data by varying its resistance between two or more values.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: April 1, 2014
    Assignee: The Regents of The University of Michigan
    Inventors: Wei Lu, Sung Hyun Jo, Kuk-Hwan Kim
  • Patent number: 8675393
    Abstract: Provided is a method for driving a non-volatile memory element in which a variable resistance element including a first electrode, a second electrode, and a variable resistance layer capable of reversibly changing between a high resistance state and a low resistance state with application of electrical signals having different polarities is connected in series with a current steering element having bidirectional rectifying characteristics with respect to an applied voltage. After the non-volatile memory element is manufactured, the resistance value of the variable resistance layer is reduced from a resistance value in the initial resistance state higher than that in the high resistance state by applying, to the non-volatile memory element, a voltage pulse having the polarity identical to that of the voltage pulse for changing the variable resistance layer from the low resistance state to the high resistance state in the normal operations.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: March 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Koji Katayama, Takeshi Takagi, Mitsuteru Iijima
  • Patent number: 8659940
    Abstract: Physical neural networks based nanotechnology include dendrite circuits that comprise non-volatile nanotube switches. A first terminal of the non-volatile nanotube switches is able to receive an electrical signal and a second terminal of the non-volatile nanotube switches is coupled to a common node that sums any electrical signals at the first terminals of the nanotube switches. The neural networks further includes transfer circuits to propagate the electrical signal, synapse circuits, and axon circuits.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: February 25, 2014
    Assignee: Nantero Inc.
    Inventors: Claude L. Bertin, Brent M. Segal, Darren K. Brock