Abstract: Memory device, comprising a storage material, a first electrode connected to the storage material; and a second electrode associated to the storage material.

Abstract: A nanowire electromechanical switching device is constructed with a source electrode and a drain electrode disposed on an insulating substrate and spaced apart from each other, a first nanowire vertically grown on the source electrode and to which a V1 voltage is applied, a second nanowire vertically grown on the drain electrode and to which a V2 voltage having an opposite polarity to that of the V1 voltage is applied, and a gate electrode spaced apart from the second nanowire, partially surrounding the second nanowire and having an opening that faces the first nanowire in order to avoid disturbing a mutual switching operation of the first nanowire and the second nanowire and to which a V3 voltage having the same polarity as that of the V2 voltage is applied.

Abstract: Write verify methods for resistance random access memory (RRAM) are provided. The methods include applying a reset operation voltage pulse across a RRAM cell to change a resistance of the RRAM cell from a low resistance state to a high resistance state. Then the method includes applying a forward resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance value less than a selected lower resistance limit value. This step is repeated until the high resistance state resistance value is greater than the lower resistance limit value. The method also includes applying a reverse resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance values is greater than a selected upper resistance limit value. The reverse resetting voltage pulse has a second polarity being opposite the first polarity. This step is repeated until all the high resistance state resistance value is less than the upper resistance limit value.

Abstract: A transistor includes: a semiconductor substrate; a channel region arranged on the semiconductor substrate; a source and a drain respectively arranged on either side of the channel region; and a conductive nano tube gate arranged on the semiconductor substrate to transverse the channel region between the source and the drain. Its method of manufacture includes: arranging a conductive nano tube on a surface of a semiconductor substrate; defining source and drain regions having predetermined sizes and traversing the nano tube; forming a metal layer on the source and drain regions; removing a portion of the metal layer formed on the nano tube to respectively form source and drain electrodes separated from the metal layer on either side of the nano tube; and doping a channel region below the nano tube arranged between the source and drain electrodes by ion-implanting.

Abstract: A non-volatile memory device includes lower and upper electrodes over a substrate, a conductive organic material layer between the lower and the upper electrodes, and a nanocrystal layer located within the conductive organic material layer, wherein the nanocrystal layer includes a plurality of nanocrystals surrounded by an amorphous barrier, wherein the device has a multi-level output current according to a voltage level of an input voltage coupled to the lower and the upper electrodes during a data read operation.

Abstract: Embodiments of the present invention are directed to memristor devices that provide nonvolatile memristive switching. In one embodiment, a memristor device includes a first electrode, a second electrode, and a nanowire disposed between the first electrode and the second electrode. The nanowire is configured with an inner region surrounded by an outer layer. The memristor device may also include a mobile dopant confined to the inner region by repulsive electrostatic forces between the outer layer and the mobile dopant. The resistance of the nanowire is determined by the distribution of the mobile dopant in the inner region.

Abstract: A non-volatile bistable nano-electromechanical switch is provided for use in memory devices and microprocessors. The switch employs carbon nanotubes as the actuation element. A method has been developed for fabricating nanoswitches having one single-walled carbon nanotube as the actuator. The actuation of two different states can be achieved using the same low voltage for each state.

Abstract: An information recording/reproducing device includes a recording layer, and a recording circuit which records data to the recording layer by generating a phase change in the recording layer. The recording layer includes a first chemical compound having a spinel structure. The recording layer is AxMyX4 (0.1?x?2.2, 1.0?y?2.0), where A includes one selected from a group of Zn, Cd and Hg, M includes one selected from a group of Cr, Mo, W, Mn and Re, and X includes O.

Abstract: A method is disclosed for driving a phase change memory device including a phase change resistor. The method includes applying a trigger voltage to the phase change resistor for a first write time to preheat the phase change resistor, applying a first write voltage to the phase change resistor for a second write time to control a first state of the phase change resistor, and applying a second voltage to the phase change resistor for a third write time to control a second state of the phase change resistor.

Abstract: A method for fabricating an integrated circuit, the method comprises forming a first electrode, depositing resistance changing material over the first electrode, the resistance changing material having an active zone for switching the resistance of the resistance changing material and an inactive zone, and forming a second electrode over the resistance changing material. The chemical composition of the resistance changing material in the active zone differs from the chemical composition of the resistance changing material in the inactive zone.

Abstract: A computing system for implementing at least one electronic circuit with gain comprises at least one two-dimensional molecular switch array. The molecular switch array is formed by assembling two or more crossed planes of wires into a configuration of devices. Each device comprises a junction formed by a pair of crossed wires and at least one connector species that connects the pair of crossed wires in the junction. The junction has a functional dimension in nanometers, and includes a switching capability provided by both (1) one or more connector species and the pair of crossed wires and (2) a configurable nano-scale wire transistor having a first state that functions as a transistor and a second state that functions as a conducting semiconductor wire. Specific connections are made to interconnect the devices and connect the devices to two structures that provide high and low voltages.

Abstract: The present invention provides dipyrrin substituted porphyrinic macrocycles, intermediates useful for making the same, and methods of making the same. Such compounds may be used for purposes including the making of molecular memory devices, solar cells and light harvesting arrays.

Abstract: A method of encoding data stored in a crossbar memory array, such as a nanowire crossbar memory array, to enable significant increases in memory size, modifies data words to have equal numbers of ‘1’ bits and ‘0’ bits, and stores the modified words together with information enabling the original data to be retrieved upon being read out from memory.

Abstract: Embodiments of the present invention include systems and methods for three-terminal field-emitter triode devices, and memory arrays utilizing the same. In other embodiments, the field-emitter devices include a volume-change material, capable of changing a measurable electrical property of the devices, and/or three-dimensional memory arrays of the same.

Abstract: Provided is a cross-point latch and a method of operating the cross-point latch. The cross-point latch includes a signal line, two control lines crossing the signal line, and unipolar switches disposed at crossing points between the signal line and the control lines.

Abstract: A nanogap switching element is equipped with an inter-electrode gap portion including a gap of a nanometer order between a first electrode and a second electrode. A switching phenomenon is caused in the inter-electrode gap portion by applying a voltage between the first and second electrodes. The nanogap switching element is shifted from its low resistance state to its high resistance state by receiving a voltage pulse application of a first voltage value, and shifted from its high resistance state to its low resistance state by receiving a voltage pulse application of a second voltage value lower than the first voltage value. When the nanogap switching element is shifted from the high resistance state to the low resistance state, a voltage pulse of an intermediate voltage value between the first and second voltage values is applied thereto before the voltage pulse application of the second voltage value thereto.

Abstract: A method of fabricating a nanowire memory device, and a system of controlling nanowire formation used in the same method are provided. In the method of fabricating a nanowire memory device which includes a substrate; an electrode formed on the substrate and insulated from the substrate; and a nanowire having its one end connected with the electrode and formed at a given length, the method comprises: forming an electrode and a dummy electrode to be paired with the electrode on the substrate; forming the nanowire between the electrode and the dummy electrode while measuring a current flowing between the electrode and the dummy electrode, and cutting power applied between the electrode and the dummy electrode when the current measured is a given value; and removing the dummy electrode.

Abstract: A non-volatile memory cell includes a volatile storage device that stores a corresponding logic state in response to electrical stimulus; and a shadow memory device coupled to the volatile storage device. The shadow memory device receives and stores the corresponding logic state in response to electrical stimulus. The shadow memory device includes a non-volatile nanotube switch that stores the corresponding state of the shadow device.

Abstract: An analog access circuit for characterizing chalcogenide memory cells is disclosed. The analog access circuit includes an analog access control module, an address and data control module, and an analog cell access and current monitoring module. The analog access control module selectively controls whether a normal memory access or an analog memory access should be performed on a specific chalcogenide memory cell. The address and data control module allows a normal memory access to the chalcogenide memory cell according to an input address. The analog cell access and current monitoring module performs an analog memory access to the chalcogenide memory cell according to the input address, and monitors a reference current from a sense amplifier associated with the chalcogenide memory cell.

Abstract: A nonvolatile memory cell includes a steering element located in series with a storage element, where the storage element comprises a carbon material. A method of programming the cell includes applying a reset pulse to change a resistivity state of the carbon material from a first state to a second state which is higher than the first state, and applying a set pulse to change a resistivity state of the carbon material from the second state to a third state which is lower than the second state. A fall time of the reset pulse is shorter than a fall time of the set pulse.

Abstract: Using a synthetic molecular spring device in a system for dynamically controlling a system property, such as momentum, topography, and electronic behavior. System features (a) the synthetic molecular spring device having (i) at least one synthetic molecular assembly each featuring at least one chemical unit including at least one: (1) atom; (2) complexing group complexed to at least one atom; (3) axial ligand reversibly physicochemically paired with at least one complexed atom; and (4) substantially elastic molecular linker; and, (ii) an activating mechanism directed to at least one atom-axial ligand pair; and, (b) a selected unit operatively coupled to synthetic molecular assembly, and exhibiting the system property.

Abstract: A vertical device geometry for a carbon-nanotube-based field effect transistor has one or multiple carbon nanotubes formed in a trench.

Abstract: A two terminal memory device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes stimulus circuitry in electrical communication with at least one of the first and second terminals. The circuit is capable of applying first and second electrical stimuli to at least one of the first and second terminal(s) to change the relative resistance of the device between the first and second terminals between a relatively high resistance and a relatively low resistance. The relatively high resistance between the first and second terminals corresponds to a first state of the device, and the relatively low resistance between the first and second terminals corresponds to a second state of the device.

Abstract: Random access memory including nanotube switching elements. A memory cell includes first and second nanotube switching elements and an electronic memory. Each nanotube switching element includes conductive terminals, a nanotube article and control circuitry capable of controllably form and unform an electrically conductive channel between the conductive terminals. The electronic memory is a volatile storage device capable of storing a logic state in response to electrical stimulus. In certain embodiment the electronic memory has cross-coupled first and second inverters in electrical communication with the first and second nanotube switching elements. The cell can operate as a normal electronic memory, or can operate in a shadow memory or store mode (e.g., when power is interrupted) to transfer the electronic memory state to the nanotube switching elements. The device may later be operated in a recall mode where the state of the nanotube switching elements may be transferred to the electronic memory.

Abstract: A data read/write device according to an example of the present invention includes a recording layer, and means for applying a voltage to the recording layer, generating a resistance change in the recording layer, and recording data. The recording layer is composed of a composite compound having at least two types of cation elements, at least one type of the cation element is a transition element having a “d” orbit in which electrons have been incompletely filled, and the shortest distance between the adjacent cation elements is 0.32 nm or less.

Abstract: A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.

Abstract: A nano device includes an array of cells disposed in rows and columns and constructed over a substrate, and an optical circuit disposed over the substrate, wherein the optical circuit is formed by nano elements in a self-assembled process.

Abstract: An object is to provide a higher-performance and higher-reliability memory device and a semiconductor device provided with the memory device at low cost and with high yield. A semiconductor device of the invention has a memory element including an insulating layer and an organic compound layer between first and second conductive layers. When melting, an organic compound of the organic compound layer aggregates due to surface tension of the organic compound. By applying a voltage to the first and second conductive layers, writing to the memory element is carried out.

Abstract: Under one aspect, a covered nanotube switch includes: (a) a nanotube element including an unaligned plurality of nanotubes, the nanotube element having a top surface, a bottom surface, and side surfaces; (b) first and second terminals in contact with the nanotube element, wherein the first terminal is disposed on and substantially covers the entire top surface of the nanotube element, and wherein the second terminal contacts at least a portion of the bottom surface of the nanotube element; and (c) control circuitry capable of applying electrical stimulus to the first and second terminals. The nanotube element can switch between a plurality of electronic states in response to a corresponding plurality of electrical stimuli applied by the control circuitry to the first and second terminals. For each different electronic state, the nanotube element provides an electrical pathway of different resistance between the first and second terminals.

Abstract: Synthetic molecular spring device featuring: (a) a synthetic molecular assembly, SMA, each scalable chemical module including: (i) at least one atom, M, (ii) at least one complexing group, CG, complexed to an atom, M, (iii) at least one axial ligand, AL, reversibly physicochemically paired with at least one atom, M, complexed to a complexing group, CG, (iv) at least one substantially elastic molecular linker, ML, having body and two ends with at least one chemically bonded to another component of SMA; (b) activating mechanism, AM, operatively directed to an atom-axial ligand pair, whereby following activating mechanism, AM, sending activating signal, AS/AS?, to an atom-axial ligand pair for physicochemically modifying the atom-axial ligand pair, there is activating at least one cycle of spring-type elastic reversible transitions between contracted and expanded linear conformational states of molecular linker, ML. Optionally includes (v) chemical connectors, CC, and/or, (vi) binding sites, BS.

Abstract: A nonvolatile carbon nanotube memory device using multiwall carbon nanotubes and methods of operating and fabricating the same are provided. The nonvolatile memory device may include a substrate, at least one first electrode on the substrate, first and second vertical walls on the at least one first electrode spaced from each other, a multiwall carbon nanotube on the at least one first electrode between the first and second vertical walls, second and third electrodes on the first and second vertical walls respectively and at least one fourth electrode spaced a variable distance D (where D?0) from the multiwall carbon nanotubes.

Abstract: This invention provides approaches to improve the signal to noise ratio (S/N) in electrochemical measurements (e.g., amperometry, voltammetry, etc.). In particular, a method is described wherein the faradaic current is temporally dissociated from the charging current associated with reading the charge of a redox-active species (e.g., a self-assembled monolayer (SAM)). This method, designated herein as open circuit potential amperometry (OCPA), quantitatively reads the charge of the redox species bound to (electrically coupled to) an electrode surface, while discriminating against both charging current(s) and amperometric signal(s) that arise, e.g., from diffusion-based species in solution.

Abstract: Write verify methods for resistance random access memory (RRAM) are provided. The methods include applying a reset operation voltage pulse across a RRAM cell to change a resistance of the RRAM cell from a low resistance state to a high resistance state and setting a counter to zero. Then the method includes applying a forward resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance value less than a selected lower resistance limit value and adding one to the counter. This step is repeated until either the counter reaches a predetermined number or until the high resistance state resistance value is greater than the lower resistance limit value. The method also includes applying a reverse resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance values is greater than a selected upper resistance limit value and adding one to the counter.

Abstract: A magnetic element having a ferromagnetic pinned layer, a ferromagnetic free layer, a non-magnetic spacer layer therebetween, and a porous non-electrically conducting current confinement layer between the free layer and the pinned layer. The current confinement layer forms an interface either between the free layer and the non-magnetic spacer layer or the pinned layer and the non-magnetic spacer layer.

Abstract: A nanowire memory device and a method of manufacturing the same are provided. A memory device includes: a substrate; a first electrode formed on the substrate; a first nanowire extending from an end of the first electrode; a second electrode formed over the first electrode to overlap the first electrode; and a second nanowire extending from an end of the second electrode corresponding to the end of the first electrode in the same direction as the first nanowire, wherein an insulating layer exists between the first and second electrodes.

Abstract: A hybrid memory system having electromechanical memory cells is discussed. A memory cell core circuit has an array of electromechanical memory cells, in which each cell is a crossbar junction at least one element of which is a nanotube or a nanotube ribbon. An access circuit provides array addresses to the memory cell core circuit to select at least one corresponding cell. The access circuit is constructed of semiconductor circuit elements.

Abstract: Memory devices and recordable media are disclosed that take advantage of memory effects in the electronic transport in CdSe nanocrystal (NC) quantum dot arrays. Conduction through a NC array can be reduced with a negative voltage and then restored with a positive voltage. Light can also be used to restore or even increase the NC array conduction. The switching of the conduction in CdSe NC arrays and found the behavior to be highly sensitive to the value and duration of the laser and voltage pulses.

Abstract: Devices controlling a phase change storage element and methods for increasing reliability of a phase change storage element. The invention introduces a first operation mode and a second operation mode. A reference phase change storage element is forced a write current for an ideal conduction period in the first operation mode. In the second operation mode, the invention generates a proper conduction period based on the resistance of the reference phase change storage element, and forces the write current into the controlled phase change storage element for the proper conduction period.

Abstract: Under one aspect, a memory array includes word lines; bit lines; memory cells; and a memory operation circuit. Each memory cell responds to electrical stimulus on a word line and on a bit line and includes: a two-terminal non-volatile nanotube switching device having first and second terminals, a semiconductor diode element, and a nanotube fabric article capable of multiple resistance states. The semiconductor diode and nanotube article are between and in electrical communication with the first and second terminals, which are coupled to the word line bit line respectively. The operation circuit selects cells by activating bit and/or word lines, detects a resistance state of the nanotube fabric article of a selected memory cell, and adjusts electrical stimulus applied to the cell to controllably induce a selected resistance state in the nanotube fabric article. The selected resistance state corresponds to an informational state of the memory cell.

Abstract: An apparatus for manipulating or modifying electromagnetic waves or electromagnetic waves or a beam of particles, eg atoms, ions, molecules or charged particles, the apparatus comprising a micro or nano electrical conductor crossbar network having multiple cross-over junctions that define respective scattering points for electromagnetic waves or the particles of the beam. At least one structural parameter of the crossbar network is selectively tuneable to obtain a desired manipulation or modification of said wave or beam when incident on the network in a pre-determined directional electrical conductor crossbar network (10) configured as an atomic beam diffraction grating. The direction of wave propagation of the atomic beam is indicated by the arrow (15).

Abstract: Nanotube-based switching elements with multiple controls and circuits made from such. A switching element includes an input node, an output node, and a nanotube channel element having at least one electrically conductive nanotube. A control structure is disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. The control structure includes a control electrode and a release electrode, disposed on opposite sides of the nanotube channel element. The control and release may be used to form a differential input, or if the device is constructed appropriately to operate the circuit in a non-volatile manner. The switching elements may be arranged into logic circuits and latches having differential inputs and/or non-volatile behavior.

Abstract: The present invention provides dipyrrin substituted porphyrinic macrocycles, intermediates useful for making the same, and methods of making the same. Such compounds may be used for purposes including the making of molecular memory devices, solar cells and light harvesting arrays.

Abstract: In one embodiment, the present invention includes an apparatus having a conductive storage medium to store information in the form of electrostatic charge. The conductive storage medium can be disposed in a non-conductive layer that is formed over a charge blocking layer, which in turn may be disposed over an electrode layer. In one embodiment, a barrier layer may be disposed over the non-conductive layer. Other embodiments are described and claimed.

Abstract: A structure and a method for operating the same. The method comprises providing a resistive/reflective region on a substrate, wherein the resistive/reflective region comprises a material having a characteristic of changing the material's reflectance due to the material absorbing heat; sending an electric current through the resistive/reflective region so as to cause a reflectance change in the resistive/reflective region from a first reflectance value to a second reflectance value different from the first reflectance value; and optically reading the reflectance change in the resistive/reflective region.

Abstract: A data read/write device according to an example of the present invention includes a recording layer, and means for applying a voltage to the recording layer, generating a resistance change in the recording layer, and recording data. The recording layer is composed of a composite compound having at least two types of cation elements, at least one type of the cation element is a transition element having a “d” orbit in which electrons have been incompletely filled, and the shortest distance between the adjacent cation elements is 0.32 nm or less.

Abstract: The write disturb that occurs in polymer memories may be reduced by writing back data after a read in a fashion which offsets any effect on the polarity of bits in bit lines associated with the addressed bit. For example, each time the data is written back, its polarity may be alternately changed. In another embodiment, the polarity may be randomly changed.

Abstract: A nonvolatile memory, such as a write-once memory, includes a memory cell array that has first memory cells and at least one second memory cell. The memory also includes a first writing circuit that is capable of writing data to the first memory cells and the second memory cell, a second writing circuit, and a verify circuit which is capable of confirming whether the data is normally stored in the first memory cells. When the writing of data to one of the first memory cells fails, the second writing circuit is arranged to assign an address of the one of the first memory cells to the second memory cell. The first memory cells and the second memory cell are arranged to irreversibly change their electrical resistance when the data is stored in them. The first memory cells and the second memory cell include an organic compound layer interposed between a pair of electrodes.

Abstract: The invention generally encompasses phosphonium ionic liquids and compositions and their use in many applications, including but not limited to: as electrolytes in electronic devices such as memory devices including static, permanent and dynamic random access memory, as battery electrolytes, as a heat transfer medium, fuel cells and electrochromatic devices, among other applications. In particular, the invention generally relates to phosphonium ionic liquids, compositions and molecules possessing structural features, wherein the molecules exhibit superior combination of thermodynamic stability, low volatility, wide liquidus range and ionic conductivity. The invention further encompasses methods of making such phosphonium ionic liquids, compositions and molecules, and operational devices and systems comprising the same.

Abstract: Two, three dimensional color displays having uniform dispersion of red, green and blue visible light emitting micron particles. Pumping at approximately 976 nm can generate green and red colors having an approximately 4% limit efficiency. One source can generate three colors with approximately limit efficiency. Modulators, scanners and lens can move and focus laser beams to different pixels forming two dimensional color images. Displays can be formed from near infrared source beams that are simultaneously split and modulated with micro electro mechanical systems, spatial light modulators, liquid crystal displays, digital micromirrors, digital light projectors, grating light valves, liquid crystal silicon devices, polysilicon LCDs, electron beam written SLMs, and electrically switchable bragg gratings. Pixels containing: Yb,Tm:YLF can emit blue light, Yb,Er(NYF) can emit green light, and Yb,Er:KYF and Yb,Ef:YF3 can emit red light.

Abstract: Methods and compositions for using an up-conversion phosphor as an emitting material in a reflective displays and Polymer compositions for display mediums, and blue green red (BRG) display mediums. Roles of the pumping duration and character on the temperature and the efficiency of the up-conversion process in (Ytterbium, Erbium or Thulium) co-doped fluoride crystals are set forth. Methods, compositions and display mediums for using up-conversion phosphors in both reflective and transmissive displays in which the substrate and pixel shapes are designed to maximally remove heat deposited in the emitting material and thereby improve the efficiency of up conversion.