Abstract: A digital data propagation delay margin monitoring circuit that includes (a) a digital data propagation unit having a send flip-flop, a combinatorial delay, and a receive flip-flop; and (b) a margin detection circuit having a test flip-flop that receives the same input as the receive flip-flop and is configured to have a set up time margin or a hold time margin that is less than the set up margin or hold time margin of the receive flip-flop by a predetermined amount, depending upon which margin is being monitored. The outputs of the receive flip-flop and the test flip-flop are compared by a comparison circuit which provides an indication of when the outputs of the receive flip-flop and the test flip-flop are different, which indicates that the monitored margin of the receive flip-flop has been reduced to a predetermined margin or less.

Abstract: A two-eyed type optical distance measuring apparatus operable in accordance with a phase difference detecting process to optically measure a distance between the apparatus and an object to be measured is disclosed. To determine the distance between the apparatus and the object to be measured, a phase difference between the phase of a reflected light beam reflected from the object to be measured and the optical phase of a reference light beam derived from partial division of a distance measuring light beam emitted from a light source is detected and calculated.

Abstract: An apparatus for measuring intervals of time, which requires only a simple counter circuit (15) and delay circuit (17), through which electrical pulses travel. The counter circuit (15) counts pulses during the time interval. During each count of the counter circuit (15), the delay circuit (17) tracks the position of the pulse. The output of the two circuits are a counter word and a vernier word, such that the counter word may be multiplied by the period of each pulse, and the product added to the vernier word, to obtain the time interval measurement. The apparatus may also be used for frequency measurement.

Abstract: Circuitry and techniques are for transferring data between the automatic test equipment (ATE) and an integrated circuit under test pursuant to a slow clock that can have an arbitrarily long period, and for operating storage elements in the integrated circuit pursuant to a fast clock having a short period that corresponds to the clock rate at which combinatorial networks in the integrated circuit are to be tested. In one embodiment, input latches at inputs of the integrated circuit receive test data from the ATE, and output latches at the outputs provide test result data for the ATE. Pursuant the alternating single cycles of the slow clock and the fast clock, the delays through combinatorial networks between of a data propagation path between an input latch and an output latch are tested pursuant to the fast clock. In another embodiment, test data is serially scanned into scan registers pursuant to a series of slow clock cycles.

Abstract: The invention relates to time of flight telemetry and has application to detection and imaging systems. Determination takes place of a response time of an optoelectronic measuring chain or cascade (20, 34, 36) able to measure an outward and return time (flight time) of a first light pulse emitted in the direction of an object whose distance is to be determined. This response time, determined by means of a second light pulse emitted and then detected by the measuring chain or cascade, is subtracted from the previously determined outward and return time in order to obtain a corrected time used for calculating the sought distance.

Abstract: A digital synthesizer using Tau (time) synthesis. The digital Tau synthesizer employs a time accumulator to accumulate reference periods at the rising edge of each reference clock signal. The accumulator is then constrained to count reference pulses modulo Tp (the programmed period). The accumulated time is then used to gate out the pulse that occurs just before the desired time and to set up a delay line with the appropriate values for this delay.

Abstract: A time-interval meter (10) employs a counter (16) to count the number of cycles of the output of an oscillator (18) that occur between a pulse on a start input line (12) and a subsequent pulse on a stop input line (14). The result is a coarse measurement. A filter (28) filters the output of the oscillator (18) to produce a sinusoidal signal, and the meter (10) refines the coarse measurement by employing analog-to-digital converters (20 and 22) to measure the values assumed by the sinusoidal signal at the occurrences of the start and stop pulses. A calculation circuit (24) employs an inverse trigonometric function of the converter outputs to determine the difference between the phases of the sinusoidal signal at the occurrences of the start and stop pulses, and it adds the time difference associated with this phase difference to the coarse measurement indicated by the cycle count to yield a total interval duration.

Abstract: An antimetastable state circuit which detects when a data edge is so close to a clock edge that it would result in a metastable state in a time measurement circuit is provided. When a potential metastable state is detected, the antimetastable circuit delays the data edge with respect to the clock edge by a known amount so as to avoid the metastable state. The delayed edge is used to start the time measurement circuit, and the next clock edge is used to stop the time measurement circuit. When the known delay has been added, it is subtracted from the measured time, to produce an accurate measurement of the elapsed time between the rise of the data edge and the rise of the clock edge.

Abstract: An adaptive time period measurement technique which provides full speed for every measurement period with increased resolution afforded from repeated measurements. The time measure is produced by adaptively filtering a number of prior time measures. Each measurement includes a count and a fractional part from a controlled variable delay interposed in the measurement system. This variable delay is controlled over a number of measurements to cover the entire range of one clock cycle, preferably in accordance with a reversed binary progression algorithm. The adaptive filtering is preferably a self-modifying, classic low pass filter with a roll off which depends on the rate of change and direction of change of the measurerd time period. Thus the present invention provides all the resolution feasible based upon the rate of change of the measured quantity.

Abstract: A digital time base with differential period delay uses the difference in period between a master oscillator and a voltage controlled oscillator phase-locked to the master oscillator to achieve small time delay increments. The oscillators are used to drive respective delay generator trigger channels that have programmable counters and state machines. A first programmable counter is a clock counter to generate a lock signal to initiate a delay sequence, the lock signals from the respective channels being input to a phase detector to generate an error signal to keep the VCO phase-locked with the master oscillator. A second programmable counter is a delay counter that is controlled by a delay state machine to generate a delay signal. The delay signal is input to respective trigger state machines to generate the desired trigger signals, the duration of the trigger signals being a function of a third programmable counter.

Abstract: A circuit for a partial-response, maximum likelihood (PRML) magnetic recording channel stretches and shrinks pulses in particular write-data sequences. The circuit maintains precise tracking in the delays among multiple signals by sending them through the same number of identical circuits on the same chip. An external digital code varies the amount of delay in a clock signal so as to stretch and shrink the data pulses by different amounts.

Abstract: The present invention relates to time measurement apparatus and method for measuring, with picosecond precision, intervals between single edged events, where each measured interval comprises the summation of a rough clock count and fine or calibrated vernier counts of measured fractional clock periods before and after each START and STOP event selected from a calibrated vernier memory. The calibrated vernier memory takes the form of a table of linear voltage versus time developed using pseudo-random generated measurement events of random duration and random separation.

Abstract: A time interval counter permits the time interval between a first signal and one of a series of timing signals to be measured to less than .+-.2 nanoseconds without using microwaves and high power-consuming devices. The time interval counter uses a first passive delay time operated from the first signal, which occurs at an unknown interval from the timing signals, to produce a plurality of binary outputs spaced from each other by known equal time intervals that are substantially less than the interval between the timing signals, and a second passive delay line operated by the timing signal, which occurs after the first signal, to produce a plurality of sequential outputs spaced from each other by a plurality of known sub-time intervals that are substantially less than the time interval between the plurality of binary outputs of the first delay line.

Abstract: Time measurement apparatus comprising a delay line having a plurality of taps, each tap having an associated latch. An inverting AND gate has its output connected to an initial tap of the delay line, an input signal having two conditions connected to one of its inputs, and has its other input connected to a later tap of the delay line.The arrangement causes oscillation of the delay line in the presence of the first condition of the input signal. A counter counts the oscillations of the delay line, and the latches are caused to operate simultaneously on the second condition of the input signal.The value stored in the counter and the pattern stored in the latches is used to derive the duration of the first condition.

Abstract: A method of calibration for a voltage to time converter in order to increment delays by a fraction of a clock cycle known as an interpolator period is disclosed. The method of calibration compares differences in measurements of a constant and repetitive input waveform while changing current, base voltage threshold, incremental voltage threshold, or any combination thereof to minimize the calibration error for a predetermined number of interpolator periods designed to equal an integral number of clock cycles.

Abstract: The fabrication of a printed circuit board (26) usually includes the step of testing the board with a testing machine (24) to verify operability. The testing machine accomplishes such testing by transmitting test signals to the board via a transmission line (36) and then analyzing each response signals returned from the board in response to the test signals. To reduce the incidence of error, the testing machine (24) is compensated for the propagation delay of the line (12) which is measured by launching a first string of pulses into one end of the line whose opposite end is left open. A second string of pulses is sinultaneously launched into a programmable delay line (16) which delays each second pulse by an adjustable interval. After the generation of each first and second pulse, a check is made whether the first pulse has been reflected back to the first end of the transmission line at the same time the second pulse reaches the output of the delay line.

Abstract: A signal of a known period is transmitted through a semiconductor device to the set input of a flip-flop. The reset input of the flip-flop receives the original signal delayed by one-half the known period. The inverted and noninverted outputs of the flip-flop are then filtered and input to a leveling circuit and a differential amplifier. The leveling circuit adjusts the outputs of the flip-flop to produce signals of constant known amplitude. The output of the differential amplifier represents the delay of the signal through the semiconductor device.

Abstract: Disclosed is a test system and a method for providing a timing function that dynamically calculates and adjusts the phase delay between an internal timing reference and an externally derived signal. This is accomplished by providing a timing generator for providing a master timing reference signal, first, second and third counters preset at the beginning of each test cycle to each provide a count responsive to the timing reference signal, first and second multiplexers, each associated with one of the first and second counters, and first and second comparators for comparing the contents of each of the first and second multiplexers with the count of an associated counter and producing a timing edge when a count match occurs.

Abstract: An object of the present invention is to provide a time interval measurement circuit having especially high time measurement precision and resolution in time interval measurement between two signals and requiring short measurement time. In order to achieve the above described object, a time interval measurement circuit according to the present invention comprises two parallel transmission lines, differential output drivers connected to both ends of said transmission lines, a plurality of potential difference sensing means so disposed between said transmission lines at predetermined intervals as to generate an output signal upon an excess of potential difference between said two transmission lines over a predetermined level, and means for detecting, on the basis of output signals supplied from said potential difference sensing means, which potential difference sensing means has generated an output signal.

Abstract: A frequency converter receives a signal to be measured and a local oscillation signal supplied from a local oscillator and ouputs an intermediate frequency signal. A phase detector detects a phase of the intermediate frequency signal. An A/D converter outputs a digital value corresponding to a phase detection output. A memory stores a plurality of aperture values. Each of the aperture values is read out with a predetermined frequency band which is incremented at a predetermined step. A first controller causes the local oscillator to oscillate signals having first and second frequencies separated from each other by the aperture value in the vicinity of a desired measurement frequency. An arithmetic unit calculates a group delay time of the signal to be measured in accordance with the two digital values and the aperture value corresponding to the respective phase detection outputs when the local oscillator oscillates the signals having the first and second frequencies.

Abstract: The fabrication of a printed circuit board (26) usually includes the step of testing the board with a testing machine (24) to verify operability. The testing machine accomplishes such testing by transmitting test signals to the board via a transmission line (36) and then analyzing each response signals returned from the board in response to the test signals. To reduce the incidence of error, the testing machine (24) is compensated for the propagation delay of the line (12) which is measured by launching a first string of pulses into one end of the line whose opposite end is left open. A second string of pulses is simultaneously launched into a programmable delay line (16) which delays each second pulse by an adjustable interval. After the generation of each first and second pulse, a check is made whether the first pulse has been reflected back to the first end of the transmission line at the same time the second pulse reaches the output of the delay line.

Abstract: In a device for measuring the time interval between first and second optical pulses, the time interval between the first optical pulse and a first one of the train of reference optical clock pulses which is closest to the first optical pulse, and the time interval between the second optical pulse and a second one of the train of reference optical clock pulses which is closest to the second optical pulse are measured, and the time interval between the first and second optical pulses is calculated according to the time intervals thus measured and the time interval between the first and second reference optical clock pulses.

Abstract: A method and apparatus for measuring the width of pulses in the gigahertz range comprises the steps of splitting an input pulse and delaying one of the pulses prior to their recombination in a directional coupler. The recombined pulse is then measured in a power meter. By varying the delay, maximum and minimum readings from the power meter may be found. The pulse width may then be found as a function of the actual delay, which may be controlled by the user by varying the distance through a waveguide that the delayed pulse must travel.

Abstract: In order to accurately measure time interval Tx from time t.sub.j to time t.sub.k, the pulse widths of a start interpolation pulse and a stop interpolation pulse must be measured accurately. The invention uses two time-to-voltage converters, one for the start interpolation pulse and the other for the stop interpolation pulse, to convert these pulses to corresponding voltage signals to thereby measure the pulse widths. These converters each comprises a high speed circuit which comprises a current switch, a capacitor, a constant current source and a diode. Advantageously, even though the start and stop interpolation pulses occur close to each other, the pulses can be measured accurately. Also, even though the pulses occur at short intervals, the time interval Tx can be measured accurately.

Abstract: An apparatus which successively converts the period defined by successive two pulses of a series of input pulses into a voltage, and in which fractional times between input pulses and clock pulses are converted, by two fractional time-to-voltage converters alternately with each other, into voltage signals and the voltage signals thus alternately yielded by the two converters are alternately applied, by a change-over switch, to a subtractor, wherein a later one of the two successive voltage signals is always subtracted from the earlier one of them, creating a difference signal therebetween. At the same time, the number of clock pulses present between the two input pulses corresponding to the two voltage signals is counted and the count value is converted to analog form, which is added to the difference signal, obtaining the voltage corresponding to the period between the two input pulses.

Abstract: A microprocessor controls a programmable oscillator, directing it to produce digital pulses of variable width and frequency. The microprocessor generates inputs for the device under test and compares its outputs after one clock cycle with expected outputs. The clock cycle is adjusted repeatedly until the device's time to complete is known. Response times for the system both with and without the device under test are measured and the difference reported.

Abstract: A chain of gates is formed on one and the same substrate of integrated circuit to enable the propagation along the chain of a starting signal received at one end of the chain, and a locking circuit formed for example by another chain of gates has outputs connected to the gates of the chain in order to be able to block the state thereof following the reception of a stop signal, so that the number of gates gone through by the starting signal is a linear function of the time elapsed between the reception of the starting signal and the reception of the stop signal.

Abstract: A pulse measurement circuit for measuring timing parameters includes main and delayed trigger generators and a timer for measuring the time between generation of the two trigger signals. The circuit further includes an adjustable delay circuit that senses the main trigger signal and in response enables the delayed trigger generator for triggering after a selectable delay. To measure a timing parameter of a pulse, both trigger generators are first caused to trigger on the first parameter boundary and the time between generation of the two trigger signals is measured. The delayed trigger generator is then caused to trigger on the second parameter boundary while the main trigger generator again triggers on the first parameter boundary. The time difference between generation of the two trigger signals is again measured. The first time is subtracted from the second time to measure the time of the pulse parameter.

Abstract: The distance of a target object is determined from the time of travel of a measuring light pulse which is emitted by a transmitter toward the target object, reflected thereby and received by a receiver. In timed relation with the instant of generation of the measuring light pulse, a start signal for beginning a measuring signal transit time measurement is generated, and, on receipt of the reflected measuring light pulse, a stop signal is generated for terminating this time measurement. A completely independent reference light pulse is generated and forwarded along a reference light path establishing a predetermined time of travel from the transmitter to the receiver, and the respective reference signal transit time is measured which contains the same undesirable additional time spans contained in the measured transit time of the measuring signal.

Abstract: Propagation delay of a signal through a channel is measured by cyclically generating a first step-wave signal for transmission through the channel to a two-input logic element and a second step-wave signal with a controlled delay to the second input terminal of the logic element. The logic element determines which signal is present first at its input terminals and stores a binary signal indicative of that determination for control of the delay of the second signal which is advanced or retarded for the next cycle until both the propagation delayed first step-wave signal and the control delayed step-wave signal are coincident. The propagation delay of the channel is then determined by measuring the time between the first and second step-wave signals out of the controlled step-wave signal generator.

Abstract: An equivalent time pseudorandom sampling system samples a repetitive waveform within each of several narrow acquisition windows bounding repetitive sections of the waveform in order to obtain equivalent time sample data characterizing the shape of the waveform included within the acquisition windows. The period between successive triggering events is measured and sampling is delayed following an initiating triggering event by delay time adjusted according to the measured period so as to maximize the probability that sampling will occur within an acquisition window. The time difference between samples and subsequent triggering event is measured with high accuracy and resolution utilizing a time interval measurement system based on a dual vernier interpolation.

Abstract: This invention is a device which permits the percentage of real time consumed by software tasks of a telecommunications switching system or other process controller to be measured and displayed on a percentage meter. The relative percentages of different real time tasks are displayed by the relative intensities of particular lamps mounted on a control panel of a meter. Non-standard, user defined, software tasks may be selected for display on the meter. Software tasks which over-shoot a predetermined amount of time provide an indication of this by lighting one of a number of different lamps. Each of these lamps measures a predetermined amount of over-shoot time.

Abstract: A timing generating device, in which a period generator generates pulses the average period of which is equal to a preset period, at integral intervals of a reference clock period T, and provides fractional period data which indicates the phase difference between the above pulses and a pulse of the preset period for each of them. From a coarse delay circuit is yielded a pulse delayed behind the former pulse according to coarse delay data in a preset delay amount, which indicates a value greater than the reference clock period T. Fractional delay data in the preset delay amount which indicates a value smaller than the reference clock period, and the fractional period data are added together. By the added output the delayed pulses from the coarse delay circuit is delayed in a fine delay section by a value corresponding to the added value, thus producing a timing pulse.

Abstract: An electronic chronometry system for measuring a time T between a starting instant and a stopping instant which utilizes a ramp vernier having time expansion in order to provide fine counting between a starting instant and a beginning of a clock signal and for measuring a second time between the stopping instant and a second beginning of a clock signal. The device also utilizes a rough counting device to count the number of clock periods between the beginnings of the two clock signals. The system further utilizes a compensation circuitry for determining the nonlinearity in the ramp signal in order to determine the corrective term which must be applied. The corrective term is determined during a calibration cycle as a function of the measured parameters including the first and second time periods which are measured.

Abstract: A time interval measuring apparatus is provided for measuring the time interval between two signals. The two signals are successively brought to synchronization by delaying one of the two signals as they pass through a series of time shift cells connected in tandem. These delays are accumulated in a register, and the total net delay which is required to bring the two signals into synchronization is indicative of the time interval between the two signals. This indication of the time interval between the two signals thus forms the time interval measurement thereof. It can be refined by increasing the number of time shift cells in tandem and using progressively finer delays.

Abstract: An input time signal and clock pulses are provided to a gate, from which the clock pulses are output for a period of time corresponding to the duration of the input time signal, and the clock pulses are applied to a time counter. The time counter is preset, for each measurement, by to a time corresponding to minimum and maximum values of a time interval to be measured and yields a validity signal for a period of time therebetween. The minimum and maximum values of the time interval to be are referenced from the start of the supply of the clock pulses. It is decided and only for whether the validity signal exists at the end of the input time signal, an input time signal that ends during the duration of the validity signal, is its measured duration utilized as valid data.

Abstract: A frequency and time measurement circuit is provided with a delay means for effectively delaying the leading edge of a pulse. A register is clocked by the trailing edge of the pulse to take a snapshot of how far the leading edge of the pulse has progressed through the delay means. During a calibration phase, a reference pulse of constant length is used to take a reference reading. During a measurement phase, the measurement reading is taken on the unknown pulse whose clock frequency or time period is to be determined. By comparing the reference reading with the measurement reading, the relative clock frequency or time of the unknown pulse can be determined.

Abstract: The invention provides a method and an apparatus for determining the difference between the transit times of measuring pulse signals from a transmitter to a receiver along a measuring signal path establishing an unknown time of travel which is representative for a physical quantity of interest, and the transit times of reference pulse signals generated by the same transmitter and forwarded to the same receiver along a reference signal path establishing a known, constant time of travel, whereby for the measurement of each of said transit times the time distance between a trigger signal triggering the generation of the respective measuring pulse or reference pulse signal and a time-significant signal is measured which is generated in a defined time relation to the instant at which the respective pulse signal is received by said receiver.

Abstract: Method and apparatus are provided for measuring the settling time, relative to a reference time, of an analog signal having a varying amplitude. The apparatus includes a pair of comparators U1 and U2 for comparing the amplitude of the analog signal with first and second reference signals V.sub.Ref 1 and V.sub.Ref 2. The comparators U1 and U2 are connected to edge detector 22 which supplies a reset signal to a second counter 26 whenever the amplitude of the analog signal is not between the first and second reference signals. Oscillator 32 drives counters 25 and 26 which count pulses from oscillator beginning at the reference time and continuing until the second counter 26 contains a predetermined count. Because the second counter 26 is reset by the edge detector 22 whenever the analog waveform exceeds either of the reference signals, the difference between counter 25 and counter 26 at any subsequent time after the waveform has settled will be the settling time of the analog waveform.

Abstract: A presettable counter and a substantially identical counter both slaved to a crystal-controlled clock oscillator form a programmable slip counter for providing transition signals with a time interval therebetween in accordance with a coarse delay signal preset into the presettable counter. A programmable logic delay line responsive to a fine delay signal delays one of the transitions so as to impart a precise delay interval between the delayed transition signal and the other transition signal.

Abstract: A vernier system for digitally measuring elapsed time between a start and stop pulse against a system clock reference where the start pulse is synchronized with the clock. Fractional parts of the clock pulse at stop time are interpolated by means of a tapped delay line connected to a plurality of latch circuits which provide the least significant bits by way of a read-only-memory look-up table.

Abstract: A system for measuring the difference in time between two unknown signals utilizing a pair of matched delay lines with taps which are differentially separated in time. Each pair of output taps from the two delay lines is fed to a dc flip flop or other sensor which determines which of the two inputs occurs first in time. When there is a transition in the sequence of input signal timing a ROM determines the particular pair of taps which provided that change in sequence and delivers a series of least significant bits representative thereof.

Abstract: Presented hereby is a means for measuring elapsed time commencing with a start signal, after which first and second items may be removed from respective, individual stands for the performance of specific functions and ending with the return of an item to its specific stand. The apparatus comprises a pair of stands for receiving beverage containers in combination with means to optically sense the presence or absence of containers on their stands and light sequence starting means and time recording means responsive to the optical detectors.

Abstract: An instrument that receives pulses from a primary external source and one or more secondary external sources and determines when there is coincidence between the primary and one of the secondary sources. The instrument generates a finite time window (coincidence aperture) during which coincidence is defined to have occurred. The time intervals between coincidence apertures in which coincidences occur are measured.

Abstract: A plurality of identical signal delay elements are disposed within a hoistway one for each landing floor and cascade connected to a signal generator. Each delay element is located at its position where a signal from the signal generator appears at its output with a time delay corresponding to the associated floor. The delayed signal is detected by a signal detector disposed on an elevator car stopped on or traveling past any of the floor. A time delay measurement device counts clock pulses occurring between the detected signal and the signal from the signal generator to determine a time delay between both signal and therefore the floor on which the elevator car stops, or past which it is traveling.