Space Switch, Per Se (e.g., S Or S-s) Patents (Class 370/380)
  • Publication number: 20020067735
    Abstract: A telecommunication system comprising an existing node with at least an existing switch with physical inlets and a local address space for addressing said physical inlets. At least one additional switch is added to the system, one of said additional switches residing in node that is external to the existing node. The additional switch or switches in the external node have also physical inlets and a local address space or spaces for addressing its switch inlets. A global address space is created which comprises at least the local address spaces of the existing switch and said one additional switch in the external node. The existing node has a connection handler for controlling the existing switch in the existing node and said one additional switch in the external node using the global address space (FIG. 2).
    Type: Application
    Filed: December 12, 2000
    Publication date: June 6, 2002
    Inventors: Johan Erik Lindstrom, Eva Kristina Gorhammar, Torgny Anders Lindberg
  • Publication number: 20020057681
    Abstract: The invention relates to an apparatus for the transmission and the reception of data comprising:
    Type: Application
    Filed: November 9, 2001
    Publication date: May 16, 2002
    Applicant: ALCATEL
    Inventors: Jan Spaenjers, Christiaan Van Der Auwera
  • Publication number: 20020057684
    Abstract: A system and method for provisioning a virtual network is provided. Virtual networks can be automatically formed including switches in networks, such as local and private networks. Once the virtual networks are formed, virtual computing devices can be provisioned in place of physical computing devices that are connected to the switches. A system for provisioning a virtual network including a first virtual subnet and a second virtual subnet is provided. The system includes a first switch; a second switch; a first software process associated with first switch for provisioning the first virtual subnet; a second software process associated with the second switch for provisioning the second virtual subnet; and a communication link connecting the first switch and the second switch.
    Type: Application
    Filed: May 18, 2001
    Publication date: May 16, 2002
    Inventors: Carleton Miyamoto, Chang Lin, William Blume, Jagadish Bandhole
  • Patent number: 6385197
    Abstract: A novel virtual port method and apparatus for use in the communication between multiple nodes in a network system is disclosed. Particularly, the virtual port concept is implemented in a switching unit having a plurality of physical ports. According to the present invention, at least one virtual port can be defined by the user to represent a corresponding number of group of physical ports. In this case, a single virtual port identification can be used by the network manager to identify all the physical ports belonging to a trunking group. By using one virtual port identification address instead of a group of physical port addresses, a tremendous reduction in processing overhead in the network manager can be achieved.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: May 7, 2002
    Assignee: Allied Telesyn International Corp.
    Inventor: Tomoyuki Sugihara
  • Patent number: 6380891
    Abstract: A GPS receiver has a plurality of data demodulator circuits assigned to a plurality of GPS satellites, respectively, and a data memory which stores detailed orbit information of the GPS satellites. The GPS receiver searches for satellites the detailed orbit information of which was stored in the memory previously. When these searched GPS satellites are acquired, the GPS receiver executes satellite frame synchronization determination processing to check for an agreement among predetermined data included in satellite data transmitted from the acquired GPS satellites. When the searched GPS satellites cannot be acquired or the predetermined data do not agree, the GPS receiver executes a single-satellite frame synchronization determination processing to check for an agreement of predetermined data included in a plurality of frames of the satellite data. The GPS receiver starts positioning processing in response to an establishment of agreement to calculate its position.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: April 30, 2002
    Assignee: Denso Corporation
    Inventor: Yuzo Yamashita
  • Patent number: 6370140
    Abstract: A routing architecture which includes a plurality of switching elements grouped so as to provide one or more outputs for a plurality of inputs, wherein the grouping represents a hierarchy of selection levels. The routing architecture may be configured such that at each of the selection levels fewer outputs are provided than inputs are received. The selection levels may be implemented using one or more multiplexers at each of the levels. The routing architecture may be embodied in a programmable logic device which may also include a number of logic blocks. Each of the logic blocks may be coupled to receive at least one of the outputs of the routing architecture and the programmable logic device may be configured so that a subset of the plurality of inputs to the routing architecture are provided by one or more of the logic blocks.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: April 9, 2002
    Assignee: Cypress Semiconductor Corporation
    Inventor: Anup Nayak
  • Publication number: 20020018466
    Abstract: A communication parts of the present invention comprises first and second electronic circuit packages which are employed as an operating system or a waiting system, a switch which changes a system following instruction, a first signal level detect station which detects a signal level of output signals from a transmitter in the first electronic circuit package, a second signal level detect station which detects a signal level of output signals from a transmitter in the second electronic circuit package and a switch control station which changes and controls the switch on the basis of detection result from the first and second signal level detect stations. Consequently, communication parts of the present invention realizes changing a system with a simple structure.
    Type: Application
    Filed: August 1, 2001
    Publication date: February 14, 2002
    Applicant: NEC Corporation
    Inventor: Takahiro Arai
  • Publication number: 20010043612
    Abstract: An arbitration process sets the connections to be made between ingress and egress ports of a crossbar switch of a data switching system. A weight parameter is used for each pair of ingress and egress ports. Connection requests are generated indicating ingress ports to be connected to egress ports. A selection is made among conflicting connection requests, to produce a connection proposal for each egress port. Any connection request for which respective weighting parameter is zero is not selected. When one of the connection requests is realised, the weight parameter corresponding to this connection is decreased by one. All the weight parameters for a given egress port are re-set to default values in the case that there are no connection requests for that egress port with non-zero weights.
    Type: Application
    Filed: May 15, 2001
    Publication date: November 22, 2001
    Inventors: Ian David Johnson, Marek Stephen Piekarski
  • Publication number: 20010030942
    Abstract: A crossbar switch system with redundancy has N+1 cross-bar switches. A first cross-bar switch has first outputs of each of a plurality of nodes applied to N input terminals thereof, an (N+1)th cross-bar switch has Nth outputs of each of the nodes applied to N input terminals thereof, and second to Nth (Ith) cross-bar switches each have first to Nth selection circuits, which are provided at respective input terminals thereof, to each of which are input mutually adjacent (I−1)th and Ith outputs among outputs of each of the nodes. Each (Jth) node has N selection switches, which are provided at input terminals thereof, to each of which are input Jth outputs of two mutually adjacent cross-bar switches among the first to (N+1)th cross-bar switches. In response to a selection control signal output from a failure processing circuit that executes crossbar switch failure processing, each of the selection circuits selects and outputs one of its two inputs.
    Type: Application
    Filed: March 8, 2001
    Publication date: October 18, 2001
    Inventor: Katsuyuki Suzuki
  • Publication number: 20010017859
    Abstract: A time/space switching component is provided with multiple functionality that is essentially composed of a time switching unit (AMUXN, SMN), of a space switching unit (LM, RKMUXM). of a data channel sequence correction unit (BPMUXN, BPN, STN) and of a control unit (CMM). As a result of corresponding mode selection, one thus obtains the different functionalities for a switching network with a single component, resulting in a significant reduction in an overall expenditure for development and manufacture.
    Type: Application
    Filed: December 18, 2000
    Publication date: August 30, 2001
    Inventors: Karsten Laubner, Marcel-Abraham Troost
  • Publication number: 20010006522
    Abstract: A flexible global distributed switch adapted for wide geographical coverage with an end-to-end capacity that scales to several Petabits per second (Pb/s), while providing grade-of-service and quality-of-service control, is constructed from packet-switching edge modules and channel-switching core modules. The global distributed switch may be used to form a global Internet. The global distributed switch enables simple controls, resulting in scalability and performance advantages due to a significant reduction in the mean number of hops in a path between two edge modules. Traffic is sorted at each ingress edge module according to egress edge module. At least one packet queue is dedicated to each egress edge module. Harmonious reconfiguration of edge modules and core modules is realized by time counter co-ordination. The global distributed switch can be enlarged from an initial capacity of a few Terabits per second to a capacity of several Petabits per second, and from regional to global coverage.
    Type: Application
    Filed: December 28, 2000
    Publication date: July 5, 2001
    Inventor: Maged E. Beshai
  • Patent number: 6192048
    Abstract: A method and apparatus which obviates the throughput limitations retries generated by busy conditions of conventional switches which are limited to but a single path between any two ports through the use of a “hunt group” concept whereby multiple paths can be provided between a participating group member and another port. These multiple paths may be associated in groups of, for example, eight, with each grouping of eight paths then comprising a “hunt group” whereby the first available member of the hunt group will be selected to enable the connection should the first be “busy”. The particular embodiment disclosed comprises a plurality of sequentially organized hunt groups starting on a boundary of eight associated with ports 0-7, 8-15, . . . through 248-255.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: February 20, 2001
    Assignee: McData Corporation
    Inventors: Jeffrey J. Nelson, James P. Fugere, Ken N. Jessop
  • Patent number: 6147990
    Abstract: A packet routing technique which is stable for all networks in the presence of input blocking and output blocking. The packets injected within a network are examined and based on a historical perspective of those packets a determination is made on how to route individual packets throughout the network in a stable manner. In particular, in order to achieve complete network stability, individual switches within the network need to choose matchings, i.e., input to output port connections, that reflect the demand on each port-pair within the switches. Thus, if all packets are guaranteed to be in the network for at most a maximum number of time blocks, then a particular switch will have seen all the packets injected in the network at least that maximum number of blocks ago.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: November 14, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Daniel Matthew Andrews, Yihao Zhang
  • Patent number: 6144660
    Abstract: This invention relates to a cross connection element which comprises at least one input, output and branching means for forwarding through predetermined outputs at least some signal components of a first serial data signal received through the input. To provide such a cross connection element that considerably facilitates the management of the data transmission network, the branching means comprise means for transparently forwarding single signal components of a serial data signal received through said input, as serial data signals through the output indicated by the routing data stored in the memory means of the cross connection element. In addition, the cross connection element comprises at least one output for transparently forwarding a single signal component of a first serial data signal indicated by the routing data stored in the memory means.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: November 7, 2000
    Assignee: Nokia Networks Oy
    Inventor: Esa Torma
  • Patent number: 6118781
    Abstract: A multistage switch has an M.times.N switch size selectively connecting M incoming lines and N outgoing lines and consists of S stages of discrete switches each having a switch unit, wherein the discrete switches are permanently cross-connected in accordance with a prescribed rule. Stored connection information regarding the overall multistage switch and the states of connection of the switch units of the discrete switches are retrieved. Then, utilizing the fact that an output terminal of a switch in a cth (where c.ltoreq.S-1) stage of the multistage switch is to be logically connected to an input terminal of a switch in a (c+1)th stage, connection information relating to the overall switch is generated from the results of retrieval. The generated connection information relating to the overall multistage switch is compared with connection information that has been stored in memory in advance, whereby a connection path that has been set for each discrete switch is prevented from being severed accidentally.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: September 12, 2000
    Assignee: NEC Corporation
    Inventor: Yasuharu Sekine
  • Patent number: 6111856
    Abstract: A switching element includes a plurality of input ports and at least one output port, a spacial switching mechanism, and a cell memory in which cells are stored, the cells being classifiable according to at least one given characteristic. It is characterized in that the transmission element includes means to access the cells contained in the cell memory selectively according to the characteristic, a probability memory associating a probability p.sub.i with each possible value i of the characteristic, and a server which chooses the cell to be transmitted from among those contained in the cell memory according to the probabilities (p.sub.i) contained in the probability memory and the presence or absence of a cell in the cell memory for each value (i) of the characteristic.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: August 29, 2000
    Assignee: Alcatel
    Inventors: Mario Huterer, Frederic Berrouet
  • Patent number: 6101183
    Abstract: The outside distribution plant of the invention consists of a remote terminal such as a digital loop carrier, broadband distribution element or the like that receives telecommunications signals from a switching system or other network element. The signals are delivered to a variety of different types of line cards where each of the different types of line cards provide a different type of telecommunications service as is known in the prior art. Connection lines emanating from the line cards are connected to the inputs of a remotely controlled crossbar array where the inputs of the array can be selectively connected to the outputs of the crossbar array. The outputs of the crossbar array are connected to distribution lines that terminate at one of a plurality of feeder distribution interfaces that connect to customer lines that terminate at customer premise equipment.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: August 8, 2000
    Assignee: Lucent Technologies Inc.
    Inventor: Charles Calvin Byers
  • Patent number: 6055233
    Abstract: An augmented ring-banyan network utilizing the adaptive self-routing control algorithm in the ATM switching system comprises qth(.gtoreq.1, interger) augmenting stage having prescribed switch elements each connected to the switch elements of the final stage in said ring-banyan network respectively, and q+1st augmenting stage having prescribed switch elements each connected to said prescribed switch elements of said qth(q.gtoreq.1, interger) augmenting stage respectively, wherein the topology for the output links of each of said switch elements is represented as follows:.beta..sub.1 [(P.sub.l,P.sub.l-1, . . . ,P.sub.1).sub.i ]=(P.sub.l,P.sub.l-1, . . . ,P.sub.1).sub.i+1 connectedwithlink( P.sub.l,P.sub.l-1, . . . ,P.sub.1,1).sub.i.beta..sub.0 [(P.sub.l,P.sub.l-1, . . . ,P.sub.1).sub.i ]=(P.sub.l,P.sub.l-1, . . . ,P.sub.1).sub.i+1 connectedwithlink( P.sub.l,P.sub.l-1, . . . ,P.sub.1,0).sub.iProvided:l=(log.sub.2 N)-1, i.gtoreq.l+1.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: April 25, 2000
    Assignee: SamSung Electronics Co., Ltd.
    Inventor: Jae-Hyun Park
  • Patent number: 6052368
    Abstract: A method and apparatus for forwarding variable-length packets between channel-specific packet processor in a crossbar of a multiport switch involve segmenting variable-length packets into fixed-length payload segments and multiplexing the payload segments with response or request data to form fixed-length switching blocks. The fixed-length switching blocks are transferred to and from the crossbar over respective input and output connections in order to minimize the number of connections between the packet processors and the crossbar. The input and output connections enable the transfer of a current packet through the crossbar while supplying the crossbar with request information necessary to schedule subsequent packets through the crossbar. In a preferred embodiment of the invention, packets are timed to pass through the crossbar one after another in order to utilize the maximum bandwidth of the crossbar.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: April 18, 2000
    Assignee: Cabletron Systems, Inc.
    Inventor: Gunes Aybay
  • Patent number: 6021128
    Abstract: An asynchronous transfer mode switching system for improving switching throughput and averting complicated and difficult timing design. In operation, synchronous cell strings from external transmission lines are converted to asynchronous cell strings which are switched by a space-division switch array. The switched asynchronous cell strings are reconverted to synchronous cell strings for output onto external transmission lines. The space-division switch array comprises a plurality of unit switches in stages, each unit switch having input terminals and output terminals. The unit switches each include a timing control circuit that causes a switching operation to start upon detecting two states concurrently: a stored state of a cell to be switched, and a storage-ready state of a destination for the switched cell. The scheme allows the system to operate in an asynchronous manner.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: February 1, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Hosoya, Morihito Miyagi, Willy Hioe, Akihiko Takase, Takahiko Kozaki, Toshikazu Nishino
  • Patent number: 5999528
    Abstract: A communication system comprising a hub slot adapted to receive any one of a plurality of hub cards for receiving and transmitting data cells; a plurality of universal card slots; a plurality of interface cards insertable in any one of the plurality of universal card slots for receiving incoming ones of the data cells containing data and transmitting outgoing ones of the data cells containing data; an add bus having respective data links connected between individual ones of the universal card slots and the hub slot for receiving the outgoing ones of the data cells from the plurality of interface cards and transmitting the outgoing ones of the data cells to the hub slot; a drop bus having a single data link connected between all of the universal card slots and the hub slot for transmitting the incoming ones of the data cells from the hub slot to the plurality of interface cards; and an arrangement within each of the interface cards for filtering the incoming ones of the data cells from the drop bus and thereby
    Type: Grant
    Filed: October 24, 1996
    Date of Patent: December 7, 1999
    Assignee: Newbridge Networks Corporation
    Inventors: Henry Chow, Michael Gassewitz, Jim Ghadbane, Charles Mitchell, Germain Bisson, Steve Bews
  • Patent number: 5991296
    Abstract: A switch system and method transfer a data packet from a source data port to one or more destination data ports through a switch. The system comprises a source input buffer, a first and a second source input path, a first and a second output path and at least one crosspoint circuit. The source input buffer includes a first and a second data section. The first and the second data sections are coupled to the first and the second input paths respectively. The first and the second input paths couple through the crosspoint circuits at each intersection with the first and the second output paths. The method includes loading the data packets into data sections of an input buffer, transferring each data packet across an input path dedicated for each data section, transmitting each data packet over its input path, and switching the data from the input path to the output path based on a voltage differential.
    Type: Grant
    Filed: February 22, 1996
    Date of Patent: November 23, 1999
    Assignee: Fujitsu, Ltd.
    Inventors: Albert Mu, Jeffrey D. Larson
  • Patent number: 5987028
    Abstract: A system and method are provided for routing received cells through a switch fabric. A plurality of output channels are organized into a plurality of channel groups, wherein each of the channels groups is associated with one or more unique output ports of a Benes network. A plurality of cells destined to one or more of the plurality of channel groups is received at plural input queues. A different output port of the Benes network is selected for one or more of the input queues that contains a cell. Then, one cell is switched from each of one or more input queues through the Benes network to the respective selected output port.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: November 16, 1999
    Assignee: Industrial Technology Research Insitute
    Inventors: Muh-Rong Yang, Gin-Kou Ma
  • Patent number: 5982770
    Abstract: In a check system for checking information indicative of connections in a multistage switching network comprising S stages of switching groups and a main control section for controlling the switching groups, the multistage switching network has a switching size of M by N (M.times.N) that is defined by M input lines and N output lines. Each of the switching groups comprises a plurality of switching sections each of which has a plurality of input terminals, a plurality of output terminals, a switching unit for use in connecting these terminals with each other, and a switch control unit for controlling the switching unit. The main control section comprises a memory unit which stores information indicative of connections between the individual switching sections. The main control section has a function of checking whether an output terminal having a specific number of a switching group in a C-th stage (C.ltoreq.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: November 9, 1999
    Assignee: NEC Corporation
    Inventor: Yasuharu Sekine
  • Patent number: 5960074
    Abstract: A telecomputer network is described. The network comprises a redundant digital microwave communication system, at least one mobile vehicle, and a wireless local area network (LAN). In one embodiment, the microwave communication system transfers information using ethernet packet switching. In one embodiment, the wireless LAN transfers information using the TCP/IP protocol. The mobile vehicle is configured to transfer information as a single nomadic transmission/reception point between the microwave communication system and the wireless LAN.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: September 28, 1999
    Assignee: Curtis Clark
    Inventor: Curtis Clark
  • Patent number: 5940389
    Abstract: A system and method are provided for assigning routing tag bits for routing signals through a Benes network comprising an input stage and an output stage. The input and output stages each comprise a column of 2.times.2 .beta. elements which route an inputted signal to an upper output if the control sequence bit is 0 and to a lower output if the control sequence bit is 1. Each signal inputted to the Benes network is associated with control sequence. For a particular Benes, in a particular control stage of the Benes network, a 0 is assigned to a control sequence bit associated with a signal q.sub.0 received at an upper input of a topmost input stage .beta. element. A 1 is assigned to a control sequence bit associated with a signal q.sub.k received at the same output stage p element as the signal q.sub.0. A 1 is assigned to a control sequence bit associated with a signal q.sub.1 received at a lower input of the topmost input stage .beta. element.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: August 17, 1999
    Assignee: Computer and Communication Research Laboratories
    Inventors: Muh-rong Yang, Gin-Kou Ma
  • Patent number: 5936954
    Abstract: Input port numbers are assigned so as to allow formation of a unit switch having a given scale of module characteristic for a 3-dimensional installation of a switching network in an asynchronous transfer mode on basis of the Banyan network. A multiplicity of unit switches of a small (n.times.n) scale, positioned in a front portion of the switching network, are partitioned in front unit switches. A multiplicity of unit switches of the same small (n.times.n) scale, positioned in a rear portion of the switching network, are partitioned in rear unit switches. Output ports of the front unit switches are coupled in sequence in a crossed manner to input ports of the rear unit switches. Further, the input port numbers of said front unit switches are reassigned in accordance with a given formula, and the output port numbers of said rear unit switches are assigned in sequence from the uppermost position to the lowermost position.
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: August 10, 1999
    Assignee: SamSung Electronics Co., Ltd.
    Inventor: Doug-Young Song
  • Patent number: 5933449
    Abstract: A transceiver includes a first receiver having an input connected to a first I/O port of the transceiver and an output connected to an output port of the transceiver and a second receiver having an input connected to a second I/O port of the transceiver and an output connected to the output port of the transceiver. A first driver has an input connected to an input port of the transceiver and an output connected to the first I/O port, and a second driver has an input connected to the input port of the transceiver and an output connected to the second I/O port.
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: August 3, 1999
    Assignee: Nvision, Inc.
    Inventor: Charles S. Meyer
  • Patent number: 5930256
    Abstract: A self-arbitrating and self-routing ATM (Asynchronous Transfer Mode) switch has a switching fabric consisting of rows and columns of logic groups. The rows of logic groups have addressing logic for routing data packets received at input ports to the columns of logic groups. Arbitration logic in each of the columns of logic groups route data packets received from the addressing logic to their specified output ports. The arbitration logic forming each column of logic groups resolves conflicts between data packets contending for an identical output port. Additional logic in each column of logic groups signals input ports when data packets are successfully received by their specified output ports. Data packets which lose arbitration during a switch cycle are assigned a higher priority and retransmitted to the switching fabric during the next switch cycle.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: July 27, 1999
    Assignee: Xerox Corporation
    Inventors: Daniel H. Greene, Alan G. Bell, Joseph B. Lyles
  • Patent number: 5917426
    Abstract: In a switch network system which has a plurality of network input terminals and a plurality of network output terminals and a plurality of switch matrices between the network input terminals and the network output terminals, network connection data signals which specify paths between the network input terminals and the network output terminals are renewed or regenerated together with interconnection data signals of the switch matrices when any disorder takes place in the network connection data signals and the interconnection data signals. Such regeneration is carried out by retrieving or monitoring actual paths from the network output terminals towards the network input terminals by the use of a route-search and renewal processing unit and switch-search and renewal units. The switch network system may be either a unidirectional network system or a bidirectional network system.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: June 29, 1999
    Assignee: NEC Corporation
    Inventor: Yuuki Yoshifuji
  • Patent number: 5848066
    Abstract: Methods for designing a programmable interconnect matrix having reduced connectivity to achieve maximum routability for the reduced connectivity. An array of multiplexors, each having a multiplexor width w.sub.mux that is less than number of input conductors for the programmable matrix, are coupled to the input conductors of the programmable interconnect matrix such that the number of input signals shared between any two multiplexors is less than the multiplexor width w.sub.mux and such that each input signal has approximately the same number of chances to route. To better ensure the successful routing of input signals by a programmable interconnect matrix designed according to the present methods, improved routing methods are also described. According to a first embodiment, routing is accomplished by swapping successfully routed input signals with a blocked input signal and determining whether the input signal that has been swapped out may be routed through available multiplexors.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: December 8, 1998
    Assignee: Cypress Semiconductor Corp.
    Inventors: Hagop A. Nazarian, Stephen M. Douglass, W. Alfred Graf, S. Babar Raza, Sundar Rajan, Shiva Sorooshian Borzin, Darren Neuman
  • Patent number: 5815489
    Abstract: A self-healing ring switch transmission system uses space division switches disposed upstream and downstream of an add drop switch in order to determine a correspondence with a plurality of ring-switch modes by merely changing the software. This is accomplished by having one output highway of the add drop switch and one output highway of a space division switch connected with an input stage of a selector for selecting one time slot of the two output highways.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: September 29, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Takatori, Yoshihiro Ashi, Hiroyuki Fujita
  • Patent number: 5798580
    Abstract: Contention free switches, networks and global interconnection systems for routing messages from N input sources to M output destinations are disclosed.
    Type: Grant
    Filed: October 9, 1996
    Date of Patent: August 25, 1998
    Inventors: Valentin Morozov, Robert L. Emerald
  • Patent number: 5751764
    Abstract: A switch comprises n I/O ports, where n>2, and a switching core having n inputs connected to the n I/O ports respectively and n outputs connected to the n I/O ports respectively and comprising means operable to connect the ith input, where 1.ltoreq.i.ltoreq.n, to at least the jth output, where 1.ltoreq.j.ltoreq.n and j.notident.i.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: May 12, 1998
    Assignee: Nvision, Inc.
    Inventors: Charles S. Meyer, Neill J. Allen
  • Patent number: 5745486
    Abstract: An ATM switch architecture expandable to multi-terabits/s uses data transfer in a heterogeneous burst of a constant length. It employs rotators connecting stages in a three-stage switch configuration. In one embodiment, the cells are sorted at ingress and a matching process is performed between the first and middle stages. The switch is simple to control and has high performance at both the call and cell levels. It also meets the basic requirements that cells be delivered in the proper order, and that the rate of any individual connection be as high as the inlet-port rate. With a small internal expansion, the switch is non-blocking in the sense that any bit-rate acceptable to both the inlet and outlet ports will be guaranteed a path through the core. This feature is particularly useful in services which may require frequent bit-rate change during the connection time.
    Type: Grant
    Filed: October 26, 1995
    Date of Patent: April 28, 1998
    Assignee: Northern Telecom Limited
    Inventors: Maged E. Beshai, Ernst A. Munter
  • Patent number: 5727160
    Abstract: A preferred embodiment provides a radio port controller in a wireless personal communications system including a first interface module in communication with a radio port, a second interface in communication with a digital switch, and at least one switching transcoder module in communication with the first and second interface modules. A further preferred embodiment provides that the switching transcoder module includes a digital signal processor. The radio port controller preferably has a communication backplane including a plurality of slots, and each slot is preferably adapted to selectively receive either a T1 card interfacing to a T1 line or an E1 card interfacing to an E1 line.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 10, 1998
    Assignee: Hughes Electronics
    Inventors: Kalyan Ganesan, Ranjan Pant, Robert Fischler, Kim Goh, Barrie Saunders, Tayyab Khan
  • Patent number: 5715247
    Abstract: Disclosed is a method of sending and receiving setting information and monitoring information between a monitoring controller and units which construct the multiplexing section of a communication apparatus. In a case where setting information is transferred from the monitoring controller to a prescribed unit, the monitoring controller time-division multiplexes the setting information for the unit and enters the information into a time switch via an incoming line. The time switch switches the time slot position of the setting information and sends the setting information to an outgoing line corresponding to the unit. The unit drops the setting information from the time slot. Further, in a case where monitoring information is transferred from a unit to the monitoring controller, the unit time-division multiplexes the monitoring information to a predetermined time slot and enters the monitoring information into the time switch from a prescribed line.
    Type: Grant
    Filed: March 18, 1996
    Date of Patent: February 3, 1998
    Assignee: NEC Corporation
    Inventors: Hiroichi Nara, Jinichi Yoshizawa
  • Patent number: 5604617
    Abstract: A multi-stage telecommunications switch, such as a "rotator", has 2.sup.n input ports and 2.sup.n output ports, `n` being an integer greater than 1, and is formed from a number n.times.y.sup.(n-1) of y.times.y switching elements where `y` is an integer greater than 1 and the elements are arranged in n stages wherein each switching element within a stage x, where `x` is an integer between 1 and n, changes state every y.sup.(x-1) timeslots to provide switching only in the space domain. The switching elements may be electrical or optical devices.
    Type: Grant
    Filed: August 23, 1994
    Date of Patent: February 18, 1997
    Assignee: GPT Limited
    Inventor: Nigel J. Burton
  • Patent number: 5598408
    Abstract: A massively parallel computer system is disclosed having a global router network in which pipeline registers are spatially distributed to increase the messaging speed of the global router network. The global router network includes an expansion tap for processor to I/O messaging so that I/O messaging bandwidth matches interprocessor messaging bandwidth. A route-opening message packet includes protocol bits which are treated homogeneously with steering bits. The route-opening packet further includes redundant address bits for imparting a multiple-crossbars personality to router chips within the global router network. A structure and method for spatially supporting the processors of the massively parallel system and the global router network are also disclosed.
    Type: Grant
    Filed: January 14, 1994
    Date of Patent: January 28, 1997
    Assignee: MasPar Computer Corporation
    Inventors: John R. Nickolls, John Zapisek, Won S. Kim, Jeffrey C. Kalb, W. Thomas Blank, Eliot Wegbreit, Kevin Van Horn