Having Output Queuing Only Patents (Class 370/417)
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Publication number: 20100238948Abstract: A packet switching system capable of ensuring the sequence and continuity of packets and further compensating for delays in transmission is disclosed. Each of two redundant switch sections has a high-priority queue and a low-priority queue for each of output ports. A high-priority output selector selects one of two high-priority queues corresponding to respective ones of the two switch sections to store an output of the selected one into a high-priority output queue. A low-priority output selector selects one of two low-priority queues corresponding to respective ones of the two switch sections to store an output of the selected one into a low-priority output queue. The high-priority and low-priority output selectors are controlled depending on a system switching signal and a packet storing status of each of the high-priority and low-priority queues.Type: ApplicationFiled: June 4, 2010Publication date: September 23, 2010Applicant: JUNIPER NETWORKS, INC.Inventor: Masahiko HONDA
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Patent number: 7801163Abstract: A method for allocating space among a plurality of queues in a buffer includes sorting all the queues of the buffer according to size, thereby to establish a sorted order of the queues. At least one group of the queues is selected, consisting of a given number of the queues in accordance with the sorted order. A portion of the space in the buffer is allocated to the group, responsive to the number of the queues in the group. A data packet is accepted into one of the queues in the group responsive to whether the data packet will cause the space occupied in the buffer by the queues in the group to exceed the allocated portion of the space.Type: GrantFiled: April 13, 2006Date of Patent: September 21, 2010Inventors: Yishay Mansour, Alexander Kesselman
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Patent number: 7792118Abstract: To use the memory space more effectively, cell memory can be shared by an input link and all output links. To prevent one flow from occupying the entire memory space, a threshold may be provided for the queue. The queue threshold may accommodate the RTT delay of the link. Queue length information about a downstream switch module may be sent to an upstream switch module via cell headers in every credit update period per link. Cell and/or credit loss may be recovered from. Increasing the credit update period reduces the cell header bandwidth but doesn't degrade performance significantly. Sending a credit per link simplifies implementation and eliminates interference between other links.Type: GrantFiled: February 11, 2004Date of Patent: September 7, 2010Assignee: Polytechnic UniversityInventors: Hung-Hsiang Jonathan Chao, Jinsoo Park
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Patent number: 7756133Abstract: The invention relates to a method for processing a sequence of data packets in a receiver apparatus, in particular a sequence of audio and/or video data packets, as well as to a receiver apparatus.Type: GrantFiled: March 30, 2005Date of Patent: July 13, 2010Assignee: Thomson LicensingInventor: Frank Gläser
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Patent number: 7751402Abstract: A network processor that has multiple processing elements, each supporting multiple simultaneous program threads with access to shared resources in an interface. Packet data is received from high-speed ports in segments and each segment is assigned to one of the program threads. Each packet may be assigned to a single program thread, two program threads—one for header segment processing and the other for handling payload segment(s)—or a different program thread for segment of data in a packet. Dedicated inputs for ready status and sequence numbers provide assistance needed for receiving the packet data over a high speed port. The dedicated inputs are used to monitor ready flags from the high speed ports on a cycle-by-cycle basis. The sequence numbers are used by the assigned threads to maintain ordering of segments within a packet, as well as to order the writes of the complete packets to transmit queues.Type: GrantFiled: October 10, 2003Date of Patent: July 6, 2010Assignee: Intel CorporationInventors: Gilbert Wolrich, Debra Bernstein, Matthew J. Adiletta, Donald F. Hooper
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Patent number: 7738473Abstract: A system and method of switching packets and/or cells, which includes a switching apparatus having a plurality of input units that receive at least one packet to be transferred by the switching apparatus. A plurality of output units transfer the packet out of the switching apparatus. A switch unit transfers the packet from one of the input units to one of the output units. Each input unit includes at least one input queue that temporarily holds the packet to be transferred by the switching apparatus. Each input unit also includes a respective unicast credit count unit that allows the packet to be transferred out from the queue when a current unicast credit value determined by the unicast credit count unit is at least predetermined value. Each output unit includes at least one output queue that receives the packet as switched by the switch unit, and which is to be transferred out of the switching apparatus.Type: GrantFiled: April 20, 2006Date of Patent: June 15, 2010Assignee: Forestay Research, LLCInventor: Jacob V. Nielsen
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Patent number: 7729368Abstract: One embodiment relates to a method of processing packets by a network stack. A first data packet is received from a client via a network, and a network buffer is allocated for the data packet. An indication is given that the data packet is ready for reading by an application. In addition, the network buffer is cached in a network buffer cache. Subsequently, response data may be received from the application, and the network buffer may be re-used from the network buffer cache. The response data may be sent in a second data packet to the client via the network. Finally, the network buffer may be freed. Other embodiments, aspects, and features are also disclosed.Type: GrantFiled: January 19, 2007Date of Patent: June 1, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventor: Rakesh Saha
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Patent number: 7649846Abstract: To enable quick movement of communications among links in a link aggregation group, network element use a purge mechanism. A network element implementing the purge mechanism may disable distribution of additional frames to output queues associated with aggregated ports and potentially drop some or all frames from the output queues associated with aggregated ports. In conjunction with the dropping of frames, the network element may exchange one or more marker messages and marker responses with a remote network element. After receiving appropriate responses, the network element may restart distribution of frames to the affected ports.Type: GrantFiled: March 31, 2006Date of Patent: January 19, 2010Assignee: Fujitsu LimitedInventors: Yukihiro Nakagawa, Takeshi Shimizu
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Publication number: 20090290593Abstract: A method and apparatus for implementing output queue-based flow control is provided. The method includes: implementing queue scheduling and flow control by using an output port-based cell queue and by counting the number of cells from different angles. In this system, the flow control and queue management are performed separately. The queue management is directly applied to the cell scheduling. The flow control does not directly depend on the cell statistical results in the queue management. Instead, it is implemented on the basis of the cell statistical results that are obtained according to the cell priority, output port and source chip number of the cells. Therefore, the provided method and apparatus may reduce and simplify the number of queues to be scheduled and implement fine and flexible back pressure control.Type: ApplicationFiled: July 24, 2009Publication date: November 26, 2009Inventors: Wenhua DU, Zhenyao WU, Dezhi TANG, Yanbin LUO
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Patent number: 7586849Abstract: A LAN switch has a backplane matrix in which each controller has a dedicated packet bus for propagating packet data. Each bus has a root interfacing with the transmitting (root) controller and a plurality of leaves interfacing with receiving (leaf) controllers. This configuration enables each controller to simultaneously transmit packet data on the root of a bus and receive packet data off a plurality of leaves of other buses without contention. An efficient filtering and stalling system employed at the receive side of the backplane prevents the highly parallel traffic from causing receive side congestion.Type: GrantFiled: September 21, 2005Date of Patent: September 8, 2009Assignee: Alcatel LucentInventors: Christopher Haywood, Geoffrey C. Stone
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Patent number: 7567508Abstract: A method and system for providing delay bound and prioritized packet dropping are disclosed. The system limits the size of a queue configured to deliver packets in FIFO order by a threshold based on a specified delay bound. Received packets are queued if the threshold is not exceeded. If the threshold is exceeded, a packet having a precedence level less than that of the precedence level of the received packet is dropped. If all packets in the queue have a precedence level greater than that of the packet received, then the received packet is dropped if the threshold is exceeded.Type: GrantFiled: May 23, 2005Date of Patent: July 28, 2009Assignee: Cisco Technology, Inc.Inventors: Anna Charny, Christopher Kappler, Sandeep Bajaj, Earl T. Cohen
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Publication number: 20090141733Abstract: A method for selecting packets to be switched in a collapsed virtual output queuing array (cVOQ) switch core, using a request/acknowledge mechanism. According to the method, an efficient set of virtual output queues (at most one virtual output queue per ingress adapter) is selected, while keeping the algorithm simple enough to allow its implementation in fast state machines. For determining a set of virtual output queues that are each authorized to send a packet, the algorithm is based upon degrees of freedom characterizing states of ingress and egress adapters. For example, the degree of freedom, derived from the collapsed virtual output queuing array, could represent the number of egress ports to which an ingress port may send packet, or the number of ingress ports from which an egress port may receive packets, at a given time.Type: ApplicationFiled: February 3, 2009Publication date: June 4, 2009Applicant: International Business Machines CorporationInventors: Alain Blanc, Rene Glaise, Francois Le Maut, Michel Poret
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Publication number: 20090135844Abstract: Embodiments of a transmit-side scaler and method for processing outgoing information packets using thread-based queues are generally described herein. Other embodiments may be described and claimed. In some embodiments, a process ID stored in a token area may be compared with a process ID of an application that generated an outgoing information packet to obtain a transmit queue. The token area may be updated with a process ID stored in an active threads table when the process ID stored in the token area does not match the process ID of the application.Type: ApplicationFiled: November 27, 2007Publication date: May 28, 2009Inventor: Shrijeet Mukherjee
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Publication number: 20090122805Abstract: Disclosed are, inter alia, methods, apparatus, computer-readable media, mechanisms, and means for instrumenting real-time customer packet traffic. These measured delays can be used to determine whether or not the performance of a packet switching device and/or network meets desired levels, especially for complying with a Service Level Agreement.Type: ApplicationFiled: November 14, 2007Publication date: May 14, 2009Inventors: Gary Paul Epps, David Delano Ward, John H. W. Bettink, Christopher Yates Satterlee, Mohammed Ismael Tatar, Clarence Filsfils
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Patent number: 7526000Abstract: Jitter is compensated on data packets by clock time derived time stamping upon transmission of the data packets. This results in transmission time stamps. The jitter is compensated based on a comparison between the transmission time stamps and generated reception time stamps of the data packets, whereby the reception time stamps are derived from the same clock time as whereof the transmission time stamps are derived. The comparison provides time delay information which is used for calculating a required minimum and maximum buffer size, for absorbing the practically experienced jitter at the receiver end of the transmission medium. The method is also suited for real time applications, such as MPEG, DVB and DSS.Type: GrantFiled: July 4, 2003Date of Patent: April 28, 2009Assignee: Koninklijke Philips Electronics N.V.Inventor: Wilhelmus Jacobus Van Gestel
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Patent number: 7522625Abstract: The present invention provides a method of high speed assemble process capable of dealing with long packets with effective buffer memories usage. A processing method of fragmented packets in packet transfer equipment for transmitting and receiving packet data between terminals through network, includes, receiving fragmented packets, identifying whether the received packet is a packet fragmented into two from original, or a packet fragmented into three or more, for the packet identified as fragmented into two, storing the two fragmented packets into assembly buffer in fragmentation order, on basis of the respective offset values in the packets, and reading out from top, and for the packet fragmented into three or more, chain-connecting the assembly buffers and storing the packets therein in reception order, reading out the packets after deciding the order by comparing chain information and offset values of the fragmented packets within the chain, and then reassembling the packets.Type: GrantFiled: August 25, 2005Date of Patent: April 21, 2009Assignee: Fujitsu LimitedInventors: Hideo Abe, Kenji Fukuda, Susumu Kojima
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Patent number: 7512148Abstract: A weighted round-robin arbitrator for a plurality of data queue includes an arbitration table comprising a plurality of entries. Each entry represents a time slot for the transmission of one data packet from a selected one of the plurality of data queues. There is one arbitration logic circuit for each of the plurality of entries in the arbitration table. Each arbitration logic circuit includes a first multiplexer receiving an output from a first table entry and an output from a second table entry in the arbitration table. A second multiplexer receives empty flags from each of the data queues, the flags indicating that there is no data to the sent from that queue.Type: GrantFiled: December 9, 2003Date of Patent: March 31, 2009Assignee: Texas Instruments IncorporatedInventors: Stephen Li, Brian Tse Deng
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Patent number: 7505405Abstract: A method, apparatus and computer program product are provided for optimizing packet flow control through buffer status forwarding. A sending device includes buffer status information of the sending device in transactions being sent to a receiving device. The receiving device uses the buffer status information of the sending device for selecting transactions to offload.Type: GrantFiled: October 8, 2004Date of Patent: March 17, 2009Assignee: International Business Machines CorporationInventors: Sundeep Chadha, Bernard Charles Drerup
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Patent number: 7500011Abstract: An audio-on-demand communication system provides real-time playback of audio data transferred via telephone lines or other communication links. One or more audio servers include memory banks which store compressed audio data. At the request of a user at a subscriber PC, an audio server transmits the compressed audio data over the communication link to the subscriber PC. The subscriber PC receives and decompresses the transmitted audio data in less than real-time using only the processing power of the CPU within the subscriber PC. According to one aspect of the present invention, high quality audio data compressed according to lossless compression techniques is transmitted together with normal quality audio data. According to another aspect of the present invention, metadata, or extra data, such as text, captions, still images, etc., is transmitted with audio data and is simultaneously displayed with corresponding audio data.Type: GrantFiled: June 5, 2006Date of Patent: March 3, 2009Assignee: RealNetworks, Inc.Inventors: Robert D. Glaser, Mark O'Brien, Thomas B. Boutell, Randy Glen Goldberg
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Patent number: 7474668Abstract: A two stage rate shaping and scheduling system and method is implemented to control the flow of traffic to at least one output interface. The system and method involves initially queuing incoming packets into type-specific queues and applying individual rate shaping rules to each queue. A first stage arbitration is performed to determine how traffic is queued from the type-specific queues to interface-specific queues. Packets that win arbitration and pass the applied rate shaping rules are queued in interface-specific queues. Rate shaping rules are applied to the interface-specific queues. The interface-specific queues are further distinguished by priority and priority-specific and interface-specific rate shaping rules are applied to each queue. A second stage arbitration is performed to determine how different priority traffic that is targeting the same output interface is dequeued in response to interface-specific requests.Type: GrantFiled: May 16, 2003Date of Patent: January 6, 2009Assignee: Alcatel-Lucent USA Inc.Inventors: James Bauman, Eric Anderson, Gunes Aybay, Mike Morrison
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Publication number: 20080317059Abstract: Apparatus and methods for efficient queuing and dequeuing using segmented output buffers comprising sub-buffers and priority queues. Output buffers are monitored for empty sub-buffers. When a newly empty sub-buffer is discovered, a refill request is enqueued in a ranked priority queue wherein the rank of the destination priority queue is based on the number of empty-sub-buffers in the requesting output buffer. All high priority refill requests are dequeued before lower priority refill requests, thereby reducing the possibility of starvation. Optionally, by using simple dequeuing criteria, such as a FIFO discipline, instead of complex algorithms designed to improve fairness, system resources may be conserved thereby improving system throughput.Type: ApplicationFiled: September 2, 2008Publication date: December 25, 2008Applicant: Software Site Applications, Limited Liability CompanyInventor: Pierre Seigneurbieux
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Publication number: 20080317058Abstract: A virtual queuing system and method provides for dynamic control of queue data in accordance with queue control instructions provided by a separate queue control source. The virtual queuing system comprises an interface to a queuing system and an interface to the separate queue control source. The interface to the queuing system provides for obtaining queue data and controlling the queue data in accordance with the queue control instructions provided by a separate queue control source. The interface to the separate queue control source for: i) providing the queue data to the separate queue control source; and ii) obtaining the queue control instructions there from.Type: ApplicationFiled: June 19, 2007Publication date: December 25, 2008Applicant: Virtual Hold Technology, LLCInventor: Mark Williams
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Patent number: 7453897Abstract: According to the invention, a method for processing an audio media stream that originates from a packet communication network is disclosed. In one step, packets are received as they arrive from the packet communication network. The packets are part of the audio media stream. A playout buffer in a media playout device is monitored. It is determined that the playout buffer is filled below a threshold. A portion of the audio media stream is retrieved when the playout buffer is filled below the threshold. The portion is stored in the playout buffer of the media playout device.Type: GrantFiled: September 30, 2002Date of Patent: November 18, 2008Assignees: Global IP Solutions, Inc., Global IP Solutions (GIPS) ABInventors: Niklas Enbom, Fredrik Galschiodt
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Patent number: 7424026Abstract: Disclosed is a device, a computer program and a method to receive and buffer data packets that contain information that is representative of time-ordered content, such as a voice signal, that is intended to be presented to a person in a substantially continuous and substantially uniform temporal sequence; to decode the information to obtain samples and to buffer the samples prior to generating a playout signal. The samples are time scaled as a function of packet network conditions to enable changing the play-out rate to provide a substantially continuous output signal when the data packets are received at a rate that differs from a rate at which the data packets are created. The time scaling operation operates with a base delay that is controlled in a positive sense when the data packets are received at a rate that is slower than a rate at which the data packets are created, and a reserve delay that is managed to provide insurance against an interruption should the base delay become negative.Type: GrantFiled: April 28, 2004Date of Patent: September 9, 2008Assignee: Nokia CorporationInventor: Jani Mallila
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Patent number: 7417962Abstract: The ad-hoc router enables a decentralized IP routing network (mobile of fixed) amongst a set of network devices, and can offer quality of services for voice, video and data applications. The ad-hoc router is divided into a receiving, control/management processing, IP datapath/routing, randomizer, scheduler and transmission blocks. The IP datapath/routing block provides, in addition to the standard datapath routing functionality, per packet labels that uniquely identify the source device of the packet in the network. The scheduler maintains a plurality of QoS queues, which are then dequeued with a WFQ scheduler, which can be based on standard technology or a simplified low-cost implementation. The randomizer uses the labels to route the packets to a queue such that all packets from the source device, indicated by the label, enter the same queue. For greater security, the randomizer uses a random mapping function that is re-computed periodically.Type: GrantFiled: September 15, 2004Date of Patent: August 26, 2008Assignee: ALCATEL LucentInventor: Brian McBride
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Patent number: 7418002Abstract: A method and apparatus for buffering data units in a communication switch that allows for configurable monitoring of the buffer contents is presented. Such an apparatus includes a context table that stores a plurality of independent group identifiers for each connection. Although the group identifiers may include a partition group identifier and a loss group identifier that is dependent on the partition group identifier, additional group identifiers are included in the context table for each connection that are independent of other group identifiers in the context table. Such a context table may be dynamically reconfigured in order to group connections for buffer monitoring operations related to congestion detection, traffic shaping, and data admission with respect to buffering. When a data unit is received corresponding to a particular connection, the context table is referenced to retrieve the set of group identifiers corresponding to that connection.Type: GrantFiled: August 10, 2004Date of Patent: August 26, 2008Assignee: Alcatel-Lucent Canada Inc.Inventors: Robert E. Robotham, Denny Lee, Brent Gene Duckering, Jason Sterne
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Patent number: 7406090Abstract: A method and apparatus to perform buffer management for media processing are described.Type: GrantFiled: June 30, 2003Date of Patent: July 29, 2008Assignee: Intel CorporationInventor: Ling Chen
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Patent number: 7397809Abstract: An improved combined Switching Data Unit (SDU) queuing discipline for unicast and multicast (Protocol Data Unit) PDU forwarding at a switching node is provided. Multicast SDU descriptors are replicated and stored in entries of a First-In/First-Out queue portion of a hybrid output port queue. Unicast SDU descriptors are chained in entries of a linked list queue portion of the hybrid output port queue. Servicing of the hybrid queue uses hybrid queue counters, and inter-departure-counters stored in multicast FIFO queue entries to keep track of the number of unicast SDU linked list entries, to be serviced between the multicast FIFO queue entries. The combined hybrid queue derives storage efficiency benefits from linking unicast PDUs in linked lists and further derives benefits from a simple access to multicast PDU entries.Type: GrantFiled: December 13, 2002Date of Patent: July 8, 2008Assignee: Conexant Systems, Inc.Inventor: Linghsiao Wang
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Publication number: 20080123675Abstract: In a data transmission apparatus, provisions are made to be able to trace the result of processing or discarding of a specific packet from outside the apparatus. More specifically, in a data transmission apparatus that receives data having a header and, based on information carried in the header, performs processing such as destination determination, discard processing, and priority transmission processing on the received data by using a plurality of processing blocks, a memory for storing the processing results supplied from the respective processing blocks in the data transmission apparatus is provided, wherein a flag is appended only to the data that needs tracing and only the processing result of the thus flagged data is stored in the memory, and wherein, after completing the processing, only the processing result of the flagged data is forcefully output outside the apparatus thus enabling the processing result to be retrieved.Type: ApplicationFiled: August 27, 2007Publication date: May 29, 2008Applicant: Fujitsu LimitedInventor: Yoshiki Mizusawa
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Patent number: 7376140Abstract: A method for distributing digital subscriber line (xDSL) data traffic includes receiving xDSL traffic at a DSLAM including a plurality of input ports and a plurality of output queues. Each input port includes a plurality of virtual circuits. Each of the plurality of virtual circuits are dynamically assigned to one of the plurality of output queues. The assignment of any particular virtual circuit to one of the plurality of output queues is independent of which of the plurality of input ports the particular virtual circuit is associated with. In accordance with the particular embodiment, the total number of virtual circuits is greater than a total number of output queues.Type: GrantFiled: March 25, 2002Date of Patent: May 20, 2008Assignee: Cisco Technology, Inc.Inventors: Guillermo A. Franco, Scott W. Shumate, James W. Edwards, III, Michael R. Woodard
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Patent number: 7366177Abstract: Transmissions may be scheduled in communication networks to accommodate the possibilities that target receivers are unavailable to receive.Type: GrantFiled: December 22, 2003Date of Patent: April 29, 2008Inventors: Shahrnaz Azizi, Tejaswini
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Patent number: 7349419Abstract: The present invention relates to determining a queue size for a network router based on the number of voice channels capable of being handled by a particular output link and a desired failure probability for transmitting voice information over that output link. Since it is infeasible to use statistics to calculate the actual queue size, the queue size is approximated as follows. First, an initial queue size is determined based on the desired failure probability and a number of voice channels that is lower than the desired number of channels. This initial number of voice channels is within a range in which the queue, based on the desired failure probability, is calculated. From the initial queue size, the desired queue size is calculated by multiplying the initial queue size by a function that is a ratio of the desired number of voice channels to the initial number of voice channels.Type: GrantFiled: December 30, 2002Date of Patent: March 25, 2008Assignee: Nortel Networks LimitedInventor: Ian R. Philp
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Patent number: 7319860Abstract: An electronic communications device including a user input device for inputting characters; and buffering and communications systems for storing in a buffer characters input by the user input device, and transmitting the content of the buffer over a communications link when there is a pause in input by the user input device for a predetermined time duration. The content of the buffer may also be transmitted over the communications link when the amount of stored characters in the buffer reaches a predetermined size, or when a designated submit key is detected.Type: GrantFiled: November 7, 2002Date of Patent: January 15, 2008Assignee: Research In Motion LimitedInventors: Ian M. Robertson, David F. Tapuska
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Patent number: 7292580Abstract: Data cells of plural classes are transferred from input ports to output ports through a switch by storing the cells at each input port in class-specific virtual output queues (VOQ) within sets of VOQs associated with output ports, and providing credits to VOQs according to class-associated guaranteed bandwidths. When a cell is received at a VOQ having credits, a high-priority request for transfer is generated. If a cell is received at a VOQ that does not have any available credits, a low-priority request for transfer is generated. In response to requests, grants are issued to VOQ sets without regard to class, high-priority requests being favored over low-priority requests. When a grant is received for a particular VOQ set, an arbitrator selects a VOQ from the set, giving priority to VOQs having credits over VOQs without credits, and a cell from the selected VOQ is transferred.Type: GrantFiled: December 18, 2002Date of Patent: November 6, 2007Assignee: LSI CorporationInventors: Gopalakrishnan Ramamurthy, Gopalakrishnan Meempat, William J. Dally
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Patent number: 7277446Abstract: Data packets are received at a communications node. Each of the received data packets is associated with one of a set of different service classes. Packets corresponding to the received data packets are transmitted to recipients. The order in which the data packets are transmitted is controlled based on the transmission rate and the service class of the packets.Type: GrantFiled: November 2, 2000Date of Patent: October 2, 2007Assignee: Airvana, Inc.Inventors: Firas Abi-Nassif, Dae-Young Kim, Pierre A. Humblet, M. Vedat Eyuboglu
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Publication number: 20070189285Abstract: An apparatus and method for transferring data bursts in an optical burst switching network are provided.Type: ApplicationFiled: July 31, 2006Publication date: August 16, 2007Applicant: Research and Industrial Cooperation GroupInventors: Jung Yul Choi, Min Ho Kang
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Patent number: 7233599Abstract: The present invention relates to high speed communications, in particular, to an interface device between a transmitting device and a receiving device of a transmission system, wherein the transmitting device is capable of automatic compensation of cross-talk timing errors in the interface device, for a group of signals, by using information stored in a storage attached to that interface device. Preferably, the data stored in said storage comprises data on interconnections between said first and second plurality of terminals and data on crosstalk timing errors in said transmission lines relating to a specific data pattern, for each of said stored interconnection.Type: GrantFiled: March 6, 2002Date of Patent: June 19, 2007Assignee: Patentica IP LtdInventors: Alexander Roger Deas, Igor Anatolievich Abrosimov
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Patent number: 7197050Abstract: The transmitting unit comprises means for obtaining a sequence of data blocks to be transmitted on a channel, means for receiving information acknowledging the blocks of the sequence from an addressee unit, and means for controlling the transmission of the blocks of the sequence on the channel on the basis of transmission-control information including the acknowledgement information received from the addressee unit, as well as an estimated quantity relating to a speed of movement of the mobile station.Type: GrantFiled: March 12, 2002Date of Patent: March 27, 2007Assignee: Nortel Networks LimitedInventor: Thierry Lucidarme
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Patent number: 7190674Abstract: In a packet scheduler, an arithmetic-operation controlling means designates output ports in a time-sharing manner and a parallel arithmetic operation means performs an arithmetic operation common with the queues of each designated output port to obtain packet output completion due times (evaluation factors) of the top packets of queues of each output port. Intra-port selecting means selects the evaluation factor of a packet that is to be preferentially output for each output port based on the result of the arithmetic operations. Then inter-port selecting means determines one to be most-preferentially output from the top packets selected based on the selected evaluation factors and the bandwidths for the output ports. Therefore, an apparatus for controlling packet output having such a packet scheduler can realize accurately control bandwidths of a plurality of queues, high-speed processing and the reduced size thereby being incorporated in hardware.Type: GrantFiled: October 25, 2002Date of Patent: March 13, 2007Assignee: Fujitsu LimitedInventors: Takahiro Kobayakawa, Hiroaki Yamashita
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Patent number: 7133361Abstract: A communications system includes a plurality of communications channels for transporting packets. The system also includes a gateway that is coupled to the communications channels. The gateway is configured to buffer a packet that is received over one of the communications channel from a first host in a queue and to determine a window value for maximizing transmission rate based upon occupancy of the queue. The gateway is configured to a second host according to a prescribed protocol to force use of the determined window value in the second host over another one of the communications channels. The present invention has particular applicability to an asymmetric bandwidth network, such as a two-way satellite system.Type: GrantFiled: September 26, 2001Date of Patent: November 7, 2006Assignee: Hughes Network Systems, Inc.Inventors: Gabriel Olariu, Douglas Dillon, Frank Kelly
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Patent number: 7103056Abstract: A multiple phase cell dispatch scheme, in which each phase uses a simple and fair (e.g., round robin) arbitration methods, is described. VOQs of an input module and outgoing links of the input module are matched in a first phase. An outgoing link of an input module is matched with an outgoing link of a central module in a second phase. The arbiters become desynchronized under stable conditions which contributes to the switch's high throughput characteristic. Using this dispatch scheme, a scalable multiple-stage switch able to operate at high throughput, without needing to resort to speeding up the switching fabric and without needing to use buffers in the second stage, is possible. The cost of speed-up and the cell out-of-sequence problems that may occur when buffers are used in the second stage are therefore avoided. A hierarchical arbitration scheme used in the input modules reduces the time needed for scheduling and reduces connection lines.Type: GrantFiled: June 1, 2001Date of Patent: September 5, 2006Assignee: Polytechnic UniversityInventors: Hung-Hsiang Jonathan Chao, Eiji Oki
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Patent number: 7079485Abstract: A digital switching system comprises: (a) a line card layer containing a plurality of real or virtual line cards; (b) a switch card layer containing a plurality of real or virtual switch cards; and (c) an interface layer interposed between the line card layer and the switch card layer for providing serialization support services so that one or more of the line cards and switch cards can be operatively and conveniently disposed in a first shelf or on a first backplane that is spaced apart from a second shelf or from a second backplane supporting others of the line cards and/or switch cards. Such an arrangement allows for scalable expansion of the switching system in terms of number of lines served and/or transmission rates served. The flexibility of the system is owed in part to payload data being carried within payload-carrying regions of so-called ZCell signals as the payload data moves between the line card layer and the switch fabric layer.Type: GrantFiled: May 1, 2001Date of Patent: July 18, 2006Assignee: Integrated Device Technology, Inc.Inventors: Onchuen (Daryn) Lau, Chris D. Bergen, Robert J. Divivier, Gene K. Chui, Christopher I. W. Norrie, Matthew D. Ornes, King-Shing (Frank) Chui
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Patent number: 7065089Abstract: The present invention provides a system and method of mediating cell traffic between an asynchronous transmission mode (ATM) network and an adjacent network, each cell in said cell traffic having a set of transmission parameters related to the ATM network and a respective ATM connection for the cell.Type: GrantFiled: December 21, 2001Date of Patent: June 20, 2006Assignee: Alcatel Canada Inc.Inventors: Timothy Harris Kuhl, Mark Jason Thibodeau
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Patent number: 7065098Abstract: Data which must be memory equalized across a redundant, high availability system utilizing processor-based components is structured in memory segments which form data packets for a data link between active and standby components. Direct memory access is employed to copy memory segments within the active component into a queue for the data link, which transfers memory segments without utilizing the processor within the active component while automatically verifying data integrity and acknowledging successful data transfers. The direct memory access copying of memory segments to the queue may be triggered for changed memory segments by either the processor or specialized hardware within the active component, or may be run in a continuous loop sequencing through a predefined range of memory segments. The standby component may thus be kept abreast of changes to data within memory segments, such as changes to call states or resource allocation records relating to call processing.Type: GrantFiled: April 20, 2001Date of Patent: June 20, 2006Assignee: Raze Technologies, Inc.Inventors: Paul F. Struhsaker, Sanjay D. Kulkarni, James S. Denton
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Patent number: 7054267Abstract: Packets are scheduled for transmission over a communication link in a network, using a Largest Weighted Delay First (LWDF) scheduling policy. A delay measure Wi, i=1, 2, . . . N, is computed for each of N packets, each associated with a corresponding one of N data flows and located in a head position in a corresponding one of N data flow queues. The computed delay measures are then weighted using a set of positive weights ?1, ?2, . . . , ?N. The packet having the largest weighted delay Wi/?i associated therewith is then selected for transmission. In an embodiment configured to meet a quality of service (QoS) requirement specified in terms of a deadline Ti and an allowed deadline violation probability ?i, e.g., a requirement specified by P(Wi>Ti)??i, the weights ?i in the set of positive weights ?1, ?2, . . . , ?N may be given by ?i=?Ti/log ?i. The invention can also be used to meet other types of QoS requirements, including, e.g., requirements based on packet loss probabilities.Type: GrantFiled: September 10, 1999Date of Patent: May 30, 2006Assignee: Lucent Technologies Inc.Inventors: Kavita Ramanan, Aleksandr Stoylar
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Patent number: 7046661Abstract: A pipeline-based matching scheduling approach for input-buffered switches relaxes the timing constraint for arbitration with matching schemes, such as CRRD and CMSD. In the new approach, arbitration may operate in a pipelined manner. Each sub-scheduler is allowed to take more than one time slot for its matching. Every time slot, one of them provides a matching result(s). The sub-scheduler can use a matching scheme such as CRRD and CMSD.Type: GrantFiled: July 23, 2001Date of Patent: May 16, 2006Assignee: Polytechnic UniversityInventors: Eiji Oki, Hung-Hsiang Jonathan Chao, Roberto Rojas-Cessa
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Patent number: 7046688Abstract: There is provided a packet scheduler for managing output awaiting packets stored in a plural of queue blocks each having a weighting coefficient settled based on an output guaranteeing bandwidth, whereby an output order for the head packets is stored in respective queue blocks. The packet scheduler includes means for controlling selection of a queue having a packet to be sent at the highest priority, based on scheduled output time information obtained by calculation using management information of the output awaiting packets and the weighting coefficient of each queue, and means for correcting processing carried out in the controlling means based on the current time information. The arrangement enables to ensure assignment of vacant bandwidth in a fair manner while suppressing erroneous operation deriving from deviation of a scheduled packet output time from the real time caused by a calculation error or the like in WFQ calculation.Type: GrantFiled: September 7, 2001Date of Patent: May 16, 2006Assignee: Fujitsu LimitedInventors: Kensaku Amou, Tetsumei Tsuruoka
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Patent number: 7023866Abstract: In a method of fair queue servicing at a queuing point in a multi-service class packet switched network, incoming packets are received in buffers and outgoing packets are scheduled by a weighted fair queue scheduler. Real-time information of buffer usage along with the minimum bandwidth requirement is used to dynamically modify the weights of the weighted fair queue scheduler.Type: GrantFiled: October 29, 2001Date of Patent: April 4, 2006Assignee: Alcatel Canada Inc.Inventors: Natalie Giroux, Raymond R. Liao, Mustapha Aissaoui
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Patent number: 7016352Abstract: A multiport switching device includes an Internal Rules Checker (IRC) that determines forwarding addresses for packets received at the device. The determined forwarding addresses may include a new MAC destination address that is to substituted for the MAC destination address of the received packet. In one implementation, the new MAC destination address is transmitted from the IRC to the dequeuing logic by transmitting pairs of adjacent words through the switch output queues. In other implementations, the new MAC destination address is transmitted from the IRC to the dequeuing logic by transmitting an index field to the output queuing logic or by having the IRC write the new MAC destination address directly to memory.Type: GrantFiled: March 23, 2001Date of Patent: March 21, 2006Assignee: Advanced Micro Devices, Inc.Inventors: Peter Ka-Fai Chow, Somnath Viswanath, Shr-Jie Tzeng
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Patent number: 7012896Abstract: A LAN switch has a backplane matrix in which each controller has a dedicated packet bus for propagating packet data. Each bus has a root interfacing with the transmitting (root) controller and a plurality of leaves interfacing with receiving (leaf) controllers. This configuration enables each controller to simultaneously transmit packet data on the root of a bus and receive packet data off a plurality of leaves of other buses without contention. An efficient filtering and stalling system employed at the receive side of the backplane prevents the highly parallel traffic from causing receive side congestion.Type: GrantFiled: September 17, 1998Date of Patent: March 14, 2006Assignee: AlcatelInventors: Christopher Haywood, Geoffrey C. Stone