Pattern Mask Patents (Class 378/35)
  • Patent number: 7644387
    Abstract: A semiconductor mask correcting device is provided with an image acquiring unit acquiring a mask image, an extraction unit extracting only a main pattern from the mask data, an inspection unit inspecting a defective portion by comparing the extracted main pattern with a main pattern which is obtained from the mask image after a drawing by matching to each other, and a correction unit correcting the defective portion specified by the inspection unit, wherein the extraction unit includes a recognition section recognizing the main pattern and the assist pattern as a figure, a specification section specifying the assist pattern from figures which is recognized on the basis of a predetermined condition, and a main pattern extracting section extracting as the main pattern a figure other than the assist pattern.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: January 5, 2010
    Assignee: SII Nano Technology Inc.
    Inventor: Kokoro Kato
  • Patent number: 7634754
    Abstract: A method for generating a simulated aerial image of a mask projected by an optical system includes determining a coherence characteristic of the optical system. A coherent decomposition of the optical system is computed based on the coherence characteristic. The decomposition includes a series of expansion functions having angular and radial components that are expressed as explicit functions. The expansion functions are convolved with a transmission function of the mask in order to generate the simulated aerial image.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: December 15, 2009
    Assignee: Applied Materials, Israel, Ltd.
    Inventor: Haim Feldman
  • Patent number: 7623935
    Abstract: Some embodiments of the invention are directed to techniques for electrochemically fabricating multi-layer three-dimensional structures where selective patterning of at least one or more layers occurs via a mask which is formed using data representing cross-sections of the three-dimensional structure which has been modified to place it in a polygonal form which defines only regions of positive area. The regions of positive area are regions where structural material is to be located or regions where structural material is not to be located depending on whether the mask will be used, for example, in selectively depositing a structural material or a sacrificial material. The modified data may take the form of adjacent or slightly overlapped relative narrow rectangular structures where the width of the structures is related to a desired formation resolution. The spacing between centers of adjacent rectangles may be uniform or may be a variable.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: November 24, 2009
    Assignee: University of Southern California
    Inventors: Adam L. Cohen, Jeffrey A. Thompson
  • Patent number: 7613538
    Abstract: A method of contact lithography includes predicting distortions likely to occur in transferring a pattern from a mold to a substrate during a contact lithography process; and modifying the mold to compensate for the distortions. A contact lithography system includes a design subsystem configured to generate data describing a lithography pattern; an analysis subsystem configured to identify one or more distortions likely to occur when using a mold created from the data; and a mold modification subsystem configured to modify the data to compensate for the one or more distortions identified by the analysis subsystem.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: November 3, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wei Wu, Duncan Stewart, Shih-Yuan Wang, R. Stanley Williams
  • Patent number: 7608367
    Abstract: The present invention is directed to the use of vitreous carbon as a substrate material for providing masks for X-ray lithography. The new substrate also enables a small thickness of the mask absorber used to pattern the resist, and this enables improved mask accuracy. An alternative embodiment comprised the use of vitreous carbon as a LIGA substrate wherein the VC wafer blank is etched in a reactive ion plasma after which an X-ray resist is bonded. This surface treatment provides a surface enabling good adhesion of the X-ray photoresist and subsequent nucleation and adhesion of the electrodeposited metal for LIGA mold-making while the VC substrate practically eliminates secondary radiation effects that lead to delamination of the X-ray resist form the substrate, the loss of isolated resist features, and the formation of a resist layer adjacent to the substrate that is insoluble in the developer.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: October 27, 2009
    Assignee: Sandia Corporation
    Inventors: Georg Aigeldinger, Dawn M. Skala, Stewart K. Griffiths, Albert Alec Talin, Matthew W. Losey, Chu-Yeu Peter Yang
  • Patent number: 7609805
    Abstract: A mask used for a Lithographie, Galvanofomung, and Abformung (LIGA) process, a method for manufacturing the mask, and a method for manufacturing a microstructure using a LIGA process.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: October 27, 2009
    Assignees: Samsung Electronics Co., Ltd., Seoul National University Industry Foundation
    Inventors: Chan-wook Baik, Yong-wan Jin, Gun-sik Park, Jong-min Kim, Young-min Shin, Jin-kyu So
  • Patent number: 7595207
    Abstract: To improve product yield, light is scanned on a layer on a substrate through a mask. A pattern is formed on the substrate by the exposure of the layer. The direction of scanning is substantially perpendicular to a longitudinal direction of the pattern. The capacitance difference due to coupling of the pattern to be formed and a conductive layer formed through an insulation layer is reduced. Thus, failures of a display device are reduced and the product yield is increased.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: September 29, 2009
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Soon-Il Ahn, Byoung-Sun Na, Jeong-Young Lee, You-Lee Song
  • Patent number: 7592612
    Abstract: A method (and structure) for controlling a beam used to generate a pattern on a target surface includes generating a beam of charged particles and directing the beam to a mask surface and causing the beam to be either absorbed by or reflected from the mask surface, thereby either precluding or allowing the beam to strike the target surface, based on a reflection characteristic of the mask surface.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: September 22, 2009
    Assignee: International Business Machiens Corporation
    Inventor: Rudolf M. Tromp
  • Publication number: 20090233239
    Abstract: A reticle for use in a semiconductor lithographic system includes at least two separated reticle parts. Each part includes a pattern to be transferred lithographically to a substrate. At least one of the two separated reticle parts is independently replaceable.
    Type: Application
    Filed: March 14, 2008
    Publication date: September 17, 2009
    Inventors: Vlad Temchenko, Jens Schneider
  • Patent number: 7590966
    Abstract: A method and system for a high-speed datapath for a high-performance pattern generator such as an analog SLM for generating the image is disclosed. The data path has provisions for completely independent parallel data flows giving true scalability to arbitrarily high throughput. In an exemplary embodiment areas on the SLM are assigned to specific rasterizing and fracturing processors. There is an overlap between fields for blending of the edges in the pattern and for computation of interaction between features in the pattern. The datapath has data integrity checks and a recovery mode when an error condition is raised, allowing it to recover from most errors without creating new errors.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: September 15, 2009
    Assignee: Micronic Laser Systems AB
    Inventors: Torbjorn Sandstrom, Anders Thurèn
  • Patent number: 7587704
    Abstract: Methods and systems are disclosed to inspect a manufactured lithographic mask, to extract physical mask data from mask inspection data, to determine systematic mask error data based on differences between the physical mask data and mask layout data, to generate systematic mask error parameters based on the systematic mask error data, to create an individual mask error model with systematic mask error parameters, to predict patterning performance of the lithographic process using a particular mask and/or a particular projection system, and to predict process corrections that optimize patterning performance and thus the final device yield.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: September 8, 2009
    Assignee: Brion Technologies, Inc.
    Inventors: Jun Ye, Stefan Hunsche
  • Patent number: 7576328
    Abstract: Enlargement of faulty pixel portions caused by irradiation of radiation is prevented in a radiation image detector equipped with a charge generating layer for generating charges when the radiation is irradiated thereon. Radiation irradiation suppressing members, for suppressing the irradiation of radiation, are provided at faulty pixel portions, which are detected in advance.
    Type: Grant
    Filed: January 16, 2008
    Date of Patent: August 18, 2009
    Assignee: FUJIFILM Corporation
    Inventor: Kenji Matsumoto
  • Patent number: 7562337
    Abstract: A method is provided for performing optical proximity correction (“OPC”) verification in which features of concern of a photomask are identified using data relating to shapes of the photomask, an aerial image to be obtained using the photomask, or a photoresist image to be obtained in a photoimageable layer using the photomask. A plurality of areas of the photomask, aerial image or photoresist image are identified which incorporate the identified features of concern, where the plurality of identified areas occupy substantially less area than the total area of the photomask that is occupied by features. Enhanced OPC verification limited to the plurality of identified areas is then performed to identify problems of at least one of the photomask, aerial image or photoresist image.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: July 14, 2009
    Assignee: International Business Machines Corporation
    Inventors: James A. Bruce, Gregory J. Dick, Donald P. Perley, Jacek G. Smolinski
  • Patent number: 7549142
    Abstract: Devices and methods are provided that include advantages such as the ability to identify sizes, shapes and locations of frequently unwanted additional features that occur as a result of photolithographic interference. The additional feature information is obtained through use of simulation methods with reduced processing time or solving a system of equations. This allows a user to quickly find information about additional feature printing before the features are printed, and before the reticle is made.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: June 16, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Husayn Alvarez-Gomariz, John R. C. Futrell
  • Patent number: 7549143
    Abstract: Devices and methods are provided that include advantages such as the ability to identify sizes, shapes and locations of frequently unwanted additional features that occur as a result of photolithographic interference. The additional feature information is obtained through use of simulation methods with reduced processing time or solving a system of equations. This allows a user to quickly find information about additional feature printing before the features are printed, and before the reticle is made.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: June 16, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Husayn Alvarez-Gomariz, John R. C. Futrell
  • Patent number: 7549140
    Abstract: A method of generating a mask of use in printing a target pattern on a substrate. The method includes the steps of (a) determining a maximum width of features to be imaged on the substrate utilizing phase-structures formed in the mask; (b) identifying all features contained in the target pattern having a width which is equal to or less than the maximum width; (c) extracting all features having a width which is equal to or less than the maximum width from the target pattern; (d) forming phase-structures in the mask corresponding to all features identified in step (b); and (e) forming opaque structures in the mask for all features remaining in target pattern after performing step (c).
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: June 16, 2009
    Assignee: ASML Masktools B. V.
    Inventors: Doug Van Den Broeke, Jang Fung Chen, Thomas Laidig, Kurt E. Wampler, Stephen Hsu
  • Patent number: 7539970
    Abstract: A method of manufacturing a mask includes designing a second mask data pattern for forming a first mask data pattern, creating a first emulation pattern, which is determined from the second mask data pattern, using a first emulation, creating a second emulation pattern, which is determined from the first emulation pattern, using a second emulation, comparing a pattern, in which the first and second emulation patterns overlap, with the first mask data pattern, and manufacturing a mask layer, which corresponds to the second mask data pattern, according to results of the comparison.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: May 26, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Gon Jung, Gi-Sung Yeo, Young-Mi Lee, Han-Ku Cho
  • Publication number: 20090130569
    Abstract: The invention concerns a process for forming an optical component comprising: a—formation of a multi-layer stack (32, 34) with an adjustment layer (30) made of a metal-semiconductor mix formed in or on the stack, b—etching a part of the multi-layer stack, including at least a part of the adjustment layer, c—an annealing step to contract the adjustment layer within less than 1 nm.
    Type: Application
    Filed: April 24, 2006
    Publication date: May 21, 2009
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventor: Etienne Quesnel
  • Patent number: 7536671
    Abstract: In a mask for forming a fine pattern to completely transfer a first and a second pattern from the mask onto a receiving object, and a method of forming the mask, the mask includes a first pattern, a second pattern, and a supplemental pattern. The first pattern repeats in a first direction. The second pattern is arranged between and parallel to the first pattern and has a first width W1. The supplemental pattern is disposed between the first pattern and the second pattern, and is spaced apart by a first distance D1 in the first direction from the second pattern.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: May 19, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-pil Shin, Young-Ile Kim, Moon-hyun Yoo
  • Patent number: 7528929
    Abstract: An immersion lithographic projection apparatus is disclosed in which liquid is provided between a projection system of the apparatus and a substrate. The use of both liquidphobic and liquidphilic layers on various elements of the apparatus is provided to help prevent formation of bubbles in the liquid and to help reduce residue on the elements after being in contact with the liquid.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: May 5, 2009
    Assignee: ASML Netherlands B.V.
    Inventors: Bob Streefkerk, Johannes Jacobus Matheus Baselmans, Richard Joseph Bruls, Marcel Mathijs Theodore Marie Dierichs, Sjoerd Nicolaas Lambertus Donders, Christiaan Alexander Hoogendam, Hans Jansen, Erik Roelof Loopstra, Jeroen Johannes Sophia Maria Mertens, Johannes Catharinus Hubertus Mulkens, Ronald Walther Jeanne Severijns, Sergei Shulepov, Herman Boom, Timotheus Franciscus Sengers
  • Patent number: 7499149
    Abstract: A holographic mask includes a plurality of pixels each imparting a calculated phase and/or amplitude change to the projection beam to provide an image that is parallel to the mask. The holographic mask is used displaced from the best object plane of the projection lens.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: March 3, 2009
    Assignee: ASML Netherlands B.V.
    Inventors: Bernardus Hendrikus Wilhelmus Hendriks, Jan Evert Van Der Werf
  • Patent number: 7495744
    Abstract: When exposing a substrate by projecting a pattern image onto the substrate via a projection optical system (PL) and liquid (1), an exposure method includes a determination of a liquid immersion condition to be performed to the substrate, such as a liquid type, depending on a film (SP) formed as a liquid contact surface of the substrate. The liquid type is selected by switching between a first liquid supply section (11) and a third liquid supply section (21). It is possible to smoothly perform immersion exposure for the substrate (P) on which a different photo-resist layer is provided.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: February 24, 2009
    Assignee: Nikon Corporation
    Inventor: Hiroyuki Nagaksaka
  • Patent number: 7493590
    Abstract: Optical proximity correction methods and apparatus are disclosed. A simulated geometry representing one or more printed features from a reticle is generated using an optical proximity correction (OPC) model that takes into account a reticle design and one or more parameters from a process window of a stepper. An error function is formed that measures a deviation between the simulated geometry and a desired design of the one or more printed features. The error function takes into account parameters (p0 . . . pJ) from across the process window in addition to, or in lieu of, a best focus and a best exposure for the stepper. The reticle design is adjusted in a way that reduces the deviation as measured by the error function, thereby producing an adjusted reticle design.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: February 17, 2009
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Carl Hess, Ruifang Shi, Gaurav Verma
  • Patent number: 7483119
    Abstract: In exposing substrate by projecting an image of a pattern onto substrate via projection optical system and liquid, side surface and underside surface of substrate are applied with liquid-repellent treatment. By such a configuration, an exposure method by which when exposing edge areas of the substrate, the exposure can be performed in a condition that a liquid immersion region is formed well and that flowing out of the liquid to the outside of the substrate stage are prevented is provided.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: January 27, 2009
    Assignee: Nikon Corporation
    Inventors: Soichi Owa, Nobutaka Magome, Shigeru Hirukawa, Yoshihiko Kudo, Jiro Inoue, Hiroyuki Nagasaka
  • Patent number: 7480890
    Abstract: A method of correcting a mask pattern is described. A testing mask including a plurality of original patterns configured according to an original drawing data is provided. The original patterns in the testing mask are transferred to a photo-resistant layer to form a plurality of first post-development patterns and measure first dimensions of the first post-development patterns. A pattern shrink process is performed on the first post-development patterns to form a plurality of first post-shrink patterns and measure second dimensions of the first post-shrink patterns. The bias of each the first dimensions and the second dimensions are calculated. The original drawing data, the first sizes, the second sizes and the bias are collected to set a database. The data of the database is used to establish an optical proximity correction (OPC) model. According to the OPC model, an original drawing data is corrected to obtain a corrected drawing data.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: January 20, 2009
    Assignee: Powerchip Semiconductor Corp.
    Inventor: Li-Tung Hsiao
  • Patent number: 7475383
    Abstract: Provided is a method of fabricating a photo mask. The method includes preparing a model group including optical proximity correction (OPC) models and generating a preliminary mask layout using an integrated circuit (IC) layout. A contour image may be produced from the preliminary mask layout through a simulation using an optical model. Subsequently, the preliminary mask layout may be compared with the contour image and the comparison result may be analyzed to produce analysis data for providing criteria used in selecting an OPC model. An OPC model suitable for the preliminary mask layout may be selected from the model group based on the analysis data. An OPC process may be performed on the preliminary mask layout using the selected OPC model to generate a mask layout.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: January 6, 2009
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Sung-Soo Suh, Young-Seog Kang, In-Sung Kim
  • Patent number: 7456931
    Abstract: A method of optimizing adjustable settings of adjustable elements of a projection system in a lithographic apparatus is disclosed that includes determining an object spectrum for a pattern and an illumination arrangement, determining a symmetry of the object spectrum, constructing a merit function for a wavefront in a pupil plane of the projection system with the settings of the adjustable elements as variables with reference to the symmetry, and optimizing the merit function.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: November 25, 2008
    Assignee: ASML Netherlands B.V.
    Inventors: Laurentius Cornelius De Winter, Jozef Maria Finders, Maria Johanna Agnes Rubingh
  • Patent number: 7458058
    Abstract: Verifying a process margin for a mask pattern includes receiving the mask pattern for patterning features on a semiconductor wafer. The mask pattern is modified according to a wafer pattern model operable to estimate a wafer pattern resulting from the mask pattern. An intermediate stage model is selected to apply to a portion of the mask pattern, where the intermediate stage model is operable to estimate an intermediate stage of the wafer pattern. A process margin of the portion is verified by selecting a test of the intermediate stage model, and performing the test on the portion to verify the process margin of the portion.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: November 25, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Ashesh Parikh, William R. McKee, Thomas J. Aton
  • Patent number: 7448018
    Abstract: A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: November 4, 2008
    Assignee: International Business Machines Corporation
    Inventors: Fook-Luen Heng, Mark Alan Lavin, Jin-Fuw Lee, Chieh-yu Lin, Jawahar Pundalik Nayak, Rama Nand Singh
  • Patent number: 7440078
    Abstract: A lithographic system combining an interference exposure unit and a lithography unit. The lithography unit can comprise an array of individually controllable elements. The lithography system can be arranged such that a pitch of the lines exposed by the interference exposure unit is an integer multiple of a size of an exposure area of the lithography unit corresponding to a single individually controllable element.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: October 21, 2008
    Assignee: ASML Netherlands B.V.
    Inventors: Arno Jan Bleeker, Kars Zeger Troost
  • Patent number: 7433015
    Abstract: An immersion lithography apparatus includes a liquid supply system configured to supply a liquid to a space through which a beam of radiation passes, the liquid having an optical property that can be tuned by a tuner. The space may be located between the projection system and the substrate. The tuner is arranged to adjust one or more properties of the liquid such as the shape, composition, refractive index and/or absorptivity as a function of space and/or time in order to change the imaging performance of the lithography apparatus.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: October 7, 2008
    Assignees: ASML Netherlands B.V., Carl Zeiss SMT AG
    Inventors: Johannes Catharinus Hubertus Mulkens, Johannes Jacobus Matheus Baselmans, Paul Graupner, Erik Roelof Loopstra, Bob Streefkerk
  • Patent number: 7430731
    Abstract: Some embodiments of the invention are directed to techniques for electrochemically fabricating multi-layer three-dimensional structures where selective patterning of at least one or more layers occurs via a mask which is formed using data representing cross-sections of the three-dimensional structure which has been modified to place it in a polygonal form which defines only regions of positive area. The regions of positive area are regions where structural material is to be located or regions where structural material is not to be located depending on whether the mask will be used, for example, in selectively depositing a structural material or a sacrificial material. The modified data may take the form of adjacent or slightly overlapped relative narrow rectangular structures where the width of the structures is related to a desired formation resolution. The spacing between centers of adjacent rectangles may be uniform or may be a variable.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: September 30, 2008
    Assignee: University of Southern California
    Inventors: Adam L. Cohen, Jeffrey A. Thompson
  • Publication number: 20080235651
    Abstract: One embodiment provides a system that can enable a designer to determine the effects of subsequent processes at design time. During operation, the system may receive a test layout and an optical model that models an optical system, but which does not model the effects of subsequent processes, such as optical proximity correction (OPC). The system may generate a first dataset using the test layout and the optical model. Next, the system may apply OPC to the test layout, and generate a second dataset using the corrected test layout and the optical model. The system may then use the first dataset and the second dataset to adjust the optical model to obtain a second optical model that models the effects of subsequent processes.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 25, 2008
    Inventors: Jianliang Li, Qilang Yan, Lawrence S. Melvin
  • Publication number: 20080233512
    Abstract: A liquid recovery system is used by an immersion exposure apparatus. The liquid recovery system comprises: a plate that has a first surface and a second surface on the side opposite the first surface; and a liquid recovery part, at least part of which opposes the second surface with a first gap interposed therebetween. The liquid recovery system recovers the liquid on a movable object that opposes the first surface of the plate via the liquid recovery part.
    Type: Application
    Filed: March 17, 2008
    Publication date: September 25, 2008
    Applicant: NIKON CORPORATION
    Inventors: Yasufumi Nishii, Hiroyuki Nagasaka, Takeshi Okuyama
  • Patent number: 7428037
    Abstract: There is provided an optical component. The optical component includes a material having a surface that heats to a maximum temperature (Tmax) when subjected to radiation. The material has a temperature-dependent coefficient of thermal expansion (?(T)) of about zero at a temperature T0 that is approximately equal to Tmax. The optical component is suitable for use in any of an illumination system, a projection objective or a projection exposure system, as employed, for example, for EUV microlithography.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: September 23, 2008
    Assignee: Carl Zeiss SMT AG
    Inventors: Timo Laufer, Jean-Noel Fehr, Harald Kirchner, Andreas Ochse
  • Patent number: 7423721
    Abstract: A vacuum operated lithographic apparatus includes a vacuum housing for providing a vacuum environment to a support constructed to support a patterning device, or a substrate table, or a projection system, or any combination thereof. An interior of the vacuum housing includes a plurality of transport circuits for transporting fluids and/or electrical signals for use in a first process mode for lithographic processing. At least one of the transport circuits is adapted to transport energy towards the interior of the vacuum housing to stimulate outgassing in the vacuum housing for use in a second process mode for bringing the lithographic apparatus into a vacuum operating condition.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: September 9, 2008
    Assignee: ASML Netherlands B.V.
    Inventors: Antonius Johannes Josephus Van Dijsseldonk, Mustafa Amhaouch, Wilhelmus Josephus Box, Johannes Henricus Wilhelmus Jacobs, Hernes Jacobs, Marius Ravensbergen, Martinus Arnoldus Henricus Terken, Robert Gordon Livesey, Franciscus Catharina Bernardus Marinus Van Vroonhoven
  • Patent number: 7420650
    Abstract: In the present invention, in the photolithography process in which a certain processing condition has been already set, a resist film on a substrate is exposed to light using a mask, which reduces only zero-order light of a light source at a predetermined light reduction rate and transmits the light, and then heated and developed so that the film on the substrate is reduced. Thereafter, the reduction in film thickness of the resist film is measured. The measured reduction in film thickness is then converted into a line width of a resist pattern on the already-set processing condition by a correlation function between the reduction in film thickness and the line width. Based on the converted line width, the temperature setting of the heating temperature at the time of heating after the exposure is performed. Consequently, the condition setting in the photolithography process is appropriately performed, resulting in improved uniformity of the line width of the resist pattern within the substrate.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: September 2, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Michio Tanaka, Masahide Tadokoro
  • Patent number: 7417707
    Abstract: An intermediary layer is introduced between a lens and a wafer for an immersion lithography process. A non-supercritical gas is provided and condensed to form a layer of liquid between the lens and the wafer. The substrate may be irradiated through the lens and intermediary layer. In addition, the intermediary layer may then be evaporated. The non-supercritical gas may include superheated steam which may be condensed to form a layer of water between the lens and the wafer. The wafer may be irradiated with one of a EUV light and UV light. A system for introduction of an intermediary layer between a lens and a wafer for an immersion lithography process is also provided. The wafer for use in the immersion lithography process may includes a hydrophobic and hydrophilic surfaces to provide enhanced contact angles between the wafer and the intermediary liquid layer condensed on the wafer and to reduce light aberration provided from a light source through the intermediary liquid layer.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: August 26, 2008
    Inventor: Blaise L. Corbett
  • Patent number: 7418694
    Abstract: A method for generating test patterns utilized in manufacturing a semiconductor device includes creating mini-data concerning a partial area pattern used in designing the semiconductor device, subjecting the mini-data to data processing in accordance with a condition of a manufacturing process of the semiconductor device, thereby creating processed mini-data, extracting a marginless point in the processed mini-data where a process margin is less than a predetermined threshold in a manufacturing process of the semiconductor device, determining a class of the marginless point in accordance with a criticality and a category of the marginless point, determining a parameter and a range of the parameter used for the marginless point in accordance with the class of the marginless point, and generating a plurality of test patterns to which different values of the parameter are respectively applied within the range.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: August 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Sachiko Kobayashi, Atsuhiko Ikeuchi
  • Patent number: 7413831
    Abstract: When producing an exposure mask including a stack of reflective layers for reflecting extreme ultraviolet light, an absorber film for covering a light reflection plane of the stack of reflective layers with a predetermined pattern, and a buffer film interposed therebetween, the swing effect and the bulk effect that occur on a transferred portion of the predetermined pattern are specified in accordance with characteristic values of forming materials of the absorber film and the buffer film and optical conditions when exposing, and a forming film thickness of the absorber film is decided in consideration of the specified swing effect and the specified bulk effect so that the line width variation of the pattern and/or pattern shift of the pattern are at their minimum values.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: August 19, 2008
    Assignee: Sony Corporation
    Inventor: Minoru Sugawara
  • Patent number: 7414700
    Abstract: A method for the removal of a deposition on an optical element of an apparatus including the optical element includes providing an H2 containing gas in at least part of the apparatus includes producing hydrogen radicals from H2 from the H2 containing gas; and bringing the optical element with deposition into contact with at least part of the hydrogen radicals and removing at least part of the deposition. Further, a method for the protection of an optical element of an apparatus including the optical element includes providing a cap layer to the optical element by a deposition process; and during or after use of the apparatus, removing at least part of the cap layer from the optical element in a removal process as described above. The methods can be applied in a lithographic apparatus.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: August 19, 2008
    Assignee: ASML Netherlands B.V.
    Inventors: Maarten Marinus Johannes Wilhelmus Van Herpen, Vadim Yevgenyevich Banine, Johannes Hubertus Josephina Moors, Carolus Ida Maria Antonius Spee, Derk Jan Wilfred Klunder
  • Patent number: 7405809
    Abstract: An illumination system for scannertype microlithography along a scanning direction with a light source emitting a wavelength especially ?193 nm. The illumination system includes a plurality of raster elements. The plurality of raster elements is imaged into an image plane of the illumination system to produce a plurality of images being partially superimposed on a field in the image plane. The field defines a non-rectangular intensity profile in the scanning direction.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: July 29, 2008
    Assignee: Carl Zeiss SMT AG
    Inventors: Joachim Hainz, Wolfgang Singer, Erich Schubert
  • Patent number: 7404167
    Abstract: A method of forming photo masks having rectangular patterns and a method for forming a semiconductor structure using the photo masks is provided. The method for forming the photo masks includes determining a minimum spacing and identifying vertical conductive feature patterns having a spacing less than the minimum spacing value. The method further includes determining a first direction to expand and a second direction to shrink, and checking against design rules to see if the design rules are violated for each of the vertical conductive feature patterns identified. If designed rules are not violated, the identified vertical conductive feature pattern is replaced with a revised vertical conductive feature pattern having a rectangular shape. The photo masks are then formed. The semiconductor structure can be formed using the photo masks.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: July 22, 2008
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Harry Chuang, Kong-Beng Thei, Chih-Tsung Yao, Heng-Kai Liu, Ming-Jer Chiu, Chien-Wen Chen
  • Patent number: 7403262
    Abstract: A projection optical system used for an exposure apparatus to projecting a reduced size of an image of an object onto an image plane includes plural refractive elements that dispense with a reflective element having a substantial optical power, wherein the projection optical system forms an intermediate image.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: July 22, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yuhei Sumiyoshi
  • Patent number: 7401319
    Abstract: A hierarchical representation encapsulates the detailed internal composition of a sub-circuit using the notion of a cell definition (a CellDef). The CellDef serves as a natural unit for operational reuse. If the computation required for the analysis or manipulation (e.g. parasitic extraction, RET, design rule confirmation (DRC), or OPC) based on a CellDef or one cell instance can be applied, with no or minimal additional effort, to all or a significant subset of other instances of the cell, very substantial reduction in computational effort may be realized. Furthermore, a hierarchical representation also allows for the partitioning of the overall analysis/manipulation task into a collection of subtasks, e.g. one per CellDef. Multiple jobs may then be distributed across a large number of computational nodes on a network for concurrent execution. While this may not reduce the aggregate computational time, a major reduction in the overall turnaround time (TAT) is in itself extremely beneficial.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: July 15, 2008
    Assignee: Invarium, Inc.
    Inventors: Chi-Song Horng, Devendra Joshi, Anwei Liu
  • Patent number: 7379154
    Abstract: A thick pellicle is allowed to have a non-flat shape and its shape is characterized to calculate corrections to be applied in exposures to compensate for the optical effects of the pellicle. The pellicle may be mounted so as to adopt a one-dimensional shape under the influence of gravity to make the compensation easier.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: May 27, 2008
    Assignee: ASML Netherlands, B.V.
    Inventors: Richard Joseph Bruls, Orlando Serapio Cicilia, Hendrikus Alphonsus Ludovicus Van Dijck, Gerardus Carolus Johannus Hofmans, Tammo Uitterdijk
  • Publication number: 20080116397
    Abstract: A method and system for particle beam lithography, such as electron beam (EB) lithography, is disclosed. The method and system include selecting one of a plurality of cell patterns from a stencil mask and partially exposing the cell pattern to a particle beam, such as an electron beam, so as to selectively project a portion of the cell pattern on a substrate.
    Type: Application
    Filed: November 21, 2006
    Publication date: May 22, 2008
    Applicant: Cadence Design Systems, Inc.
    Inventors: Kenji Yoshida, Takashi Mitsuhashi, Shohei Matsushita, Akira Fujimura
  • Patent number: 7368744
    Abstract: The use of photon sieves may be as a pupil defining element in an illumination system; a field of defining elements in an illumination system; a pupil lens element in a projection lens; a color correction system in the projection system; or as a transmitting diffractive element for EUV.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: May 6, 2008
    Assignee: ASML Netherlands B.V.
    Inventor: Johannes Catharinus Hubertus Mulkens
  • Patent number: 7352438
    Abstract: The mask in a lithographic apparatus is clamped on a first side using a first clamping device and on a second side, different from the first side, using a second clamping device. The clamping forces are preferably applied using thin membranes. The first clamp clamps the substrate in directions parallel to the plane of the patterning device, perpendicular to the plane of the patterning device and rotationally. The second clamping device clamps the patterning device only in directions parallel to the plane of the substrate.
    Type: Grant
    Filed: February 14, 2006
    Date of Patent: April 1, 2008
    Assignee: ASML Netherlands B.V.
    Inventors: Bernardus Antonius Johannes Luttikhuis, Erik Roelof Loopsta, Harmen Klaas Van Der Schoot, Fransicus Mathijs Jacobs
  • Publication number: 20080032206
    Abstract: Provided are photomask registration errors of which have been corrected and a method of correcting the registration errors of a photomask. The photomask includes a photomask substrate, an optical pattern formed on one surface of the photomask substrate, and a plurality of stress generation portions formed in the photomask substrate. A method of correcting the registration errors of a photomask includes the steps of forming an optical pattern on a photomask substrate, measuring the registration errors of the optical pattern, and forming a plurality of stress generation portions in the photomask substrate so that the stress generation portions correspond to the measured registration errors.
    Type: Application
    Filed: November 1, 2006
    Publication date: February 7, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Myoung-Soo Lee, Suk-Jong Bae, Jung-Hoon Lee, Seong-Woo Choi, Byung-Gook Kim